From: Timo Kreuzer Date: Wed, 22 Dec 2010 16:14:58 +0000 (+0000) Subject: [NDK] Add IMAGE_FILE_MACHINE_NATIVE X-Git-Tag: backups/ros-branch-0_3_13@51035~320 X-Git-Url: https://git.reactos.org/?p=reactos.git;a=commitdiff_plain;h=b1730a09db39bd0302505a68c0b43e982b839129 [NDK] Add IMAGE_FILE_MACHINE_NATIVE [NTOS] Remove IMAGE_FILE_MACHINE_NATIVE and IMAGE_FILE_MACHINE_ARCHITECTURE definitions, use only the former svn path=/trunk/; revision=50098 --- diff --git a/reactos/include/ndk/rtltypes.h b/reactos/include/ndk/rtltypes.h index 45ccf9af7f0..6d393c2b1e0 100644 --- a/reactos/include/ndk/rtltypes.h +++ b/reactos/include/ndk/rtltypes.h @@ -143,6 +143,19 @@ Author: C_ASSERT(HEAP_CREATE_VALID_MASK == 0x0007F0FF); #endif +// +// Native image architecture +// +#if defined(_M_IX86) +#define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_I386 +#elif defined(_M_ARM) +#define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_ARM +#elif defined(_M_AMD64) +#define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_AMD64 +#else +#error Define these please! +#endif + // // Registry Keys // diff --git a/reactos/ntoskrnl/ex/init.c b/reactos/ntoskrnl/ex/init.c index ee7cc3c2f55..b3039cb2593 100644 --- a/reactos/ntoskrnl/ex/init.c +++ b/reactos/ntoskrnl/ex/init.c @@ -1286,8 +1286,8 @@ ExpInitializeExecutive(IN ULONG Cpu, SharedUserData->NtMinorVersion = NtMinorVersion; /* Set the machine type */ - SharedUserData->ImageNumberLow = IMAGE_FILE_MACHINE_ARCHITECTURE; - SharedUserData->ImageNumberHigh = IMAGE_FILE_MACHINE_ARCHITECTURE; + SharedUserData->ImageNumberLow = IMAGE_FILE_MACHINE_NATIVE; + SharedUserData->ImageNumberHigh = IMAGE_FILE_MACHINE_NATIVE; } VOID diff --git a/reactos/ntoskrnl/include/internal/amd64/ke.h b/reactos/ntoskrnl/include/internal/amd64/ke.h index fc4fe24b494..ffb3f15c4b6 100644 --- a/reactos/ntoskrnl/include/internal/amd64/ke.h +++ b/reactos/ntoskrnl/include/internal/amd64/ke.h @@ -75,8 +75,6 @@ extern ULONG KeI386FxsrPresent; extern ULONG KeI386CpuType; extern ULONG KeI386CpuStep; -#define IMAGE_FILE_MACHINE_ARCHITECTURE IMAGE_FILE_MACHINE_AMD64 - // // INT3 is 1 byte long // @@ -171,7 +169,7 @@ FORCEINLINE VOID KeRegisterInterruptHandler(IN ULONG Vector, IN PVOID Handler) -{ +{ UCHAR Entry; PKIDTENTRY64 Idt; @@ -207,8 +205,8 @@ KeQueryInterruptHandler(IN ULONG Vector) Idt = &KeGetPcr()->IdtBase[Entry]; /* Return the address */ - return (PVOID)((ULONG64)Idt->OffsetHigh << 32 | - (ULONG64)Idt->OffsetMiddle << 16 | + return (PVOID)((ULONG64)Idt->OffsetHigh << 32 | + (ULONG64)Idt->OffsetMiddle << 16 | (ULONG64)Idt->OffsetLow); } diff --git a/reactos/ntoskrnl/include/internal/arm/ke.h b/reactos/ntoskrnl/include/internal/arm/ke.h index b5b8fe7f5d3..3fbe4eb3ad9 100644 --- a/reactos/ntoskrnl/include/internal/arm/ke.h +++ b/reactos/ntoskrnl/include/internal/arm/ke.h @@ -10,8 +10,6 @@ #define PCR_ENTRY 0 #define PDR_ENTRY 2 -#define IMAGE_FILE_MACHINE_ARCHITECTURE IMAGE_FILE_MACHINE_ARM - // // BKPT is 4 bytes long // @@ -104,7 +102,7 @@ KiSystemService(IN PKTHREAD Thread, VOID KiApcInterrupt( - VOID + VOID ); #include "mm.h" diff --git a/reactos/ntoskrnl/include/internal/i386/ke.h b/reactos/ntoskrnl/include/internal/i386/ke.h index bd30dfa8d74..7aa98846ca5 100644 --- a/reactos/ntoskrnl/include/internal/i386/ke.h +++ b/reactos/ntoskrnl/include/internal/i386/ke.h @@ -10,8 +10,6 @@ #define DR_MASK(x) (1 << (x)) #define DR_REG_MASK 0x4F -#define IMAGE_FILE_MACHINE_ARCHITECTURE IMAGE_FILE_MACHINE_I386 - // // INT3 is 1 byte long // @@ -33,7 +31,7 @@ #define KiGetLinkedTrapFrame(x) \ (PKTRAP_FRAME)((x)->Edx) - + #define KeGetContextReturnRegister(Context) \ ((Context)->Eax) @@ -77,7 +75,7 @@ #define KTE_SKIP_PM_BIT (((KTRAP_EXIT_SKIP_BITS) { { .SkipPreviousMode = TRUE } }).Bits) #define KTE_SKIP_SEG_BIT (((KTRAP_EXIT_SKIP_BITS) { { .SkipSegments = TRUE } }).Bits) #define KTE_SKIP_VOL_BIT (((KTRAP_EXIT_SKIP_BITS) { { .SkipVolatiles = TRUE } }).Bits) - + typedef union _KTRAP_EXIT_SKIP_BITS { struct @@ -165,7 +163,7 @@ typedef struct _KV8086_STACK_FRAME FX_SAVE_AREA NpxArea; KV86_FRAME V86Frame; } KV8086_STACK_FRAME, *PKV8086_STACK_FRAME; - + // // Registers an interrupt handler with an IDT vector // @@ -173,7 +171,7 @@ FORCEINLINE VOID KeRegisterInterruptHandler(IN ULONG Vector, IN PVOID Handler) -{ +{ UCHAR Entry; ULONG_PTR Address; PKIPCR Pcr = (PKIPCR)KeGetPcr(); @@ -388,7 +386,7 @@ NTAPI VdmDispatchBop( IN PKTRAP_FRAME TrapFrame ); - + BOOLEAN FASTCALL KiVdmOpcodePrefix( @@ -609,7 +607,7 @@ KiSystemCallTrampoline(IN PVOID Handler, IN ULONG StackBytes) { NTSTATUS Result; - + /* * This sequence does a RtlCopyMemory(Stack - StackBytes, Arguments, StackBytes) * and then calls the function associated with the system call. @@ -705,7 +703,7 @@ NTSTATUS FORCEINLINE KiConvertToGuiThread(VOID) { - NTSTATUS Result; + NTSTATUS Result; PVOID StackFrame; /* @@ -769,7 +767,7 @@ KiSwitchToBootStack(IN ULONG_PTR InitialStack) "subl %1, %%esp\n" "pushl %2\n" "jmp _KiSystemStartupBootStack@0\n" - : + : : "c"(InitialStack), "i"(NPX_FRAME_LENGTH + KTRAP_FRAME_ALIGN + KTRAP_FRAME_LENGTH), "i"(CR0_EM | CR0_TS | CR0_MP) @@ -825,7 +823,7 @@ KiEndInterrupt(IN KIRQL Irql, /* Disable interrupts and end the interrupt */ _disable(); HalEndSystemInterrupt(Irql, TrapFrame); - + /* Exit the interrupt */ KiEoiHelper(TrapFrame); } diff --git a/reactos/ntoskrnl/include/internal/powerpc/ke.h b/reactos/ntoskrnl/include/internal/powerpc/ke.h index ec19a3f1332..4edfbf4ce94 100644 --- a/reactos/ntoskrnl/include/internal/powerpc/ke.h +++ b/reactos/ntoskrnl/include/internal/powerpc/ke.h @@ -35,8 +35,6 @@ typedef struct _KIRQ_TRAPFRAME extern ULONG KePPCCacheAlignment; -#define IMAGE_FILE_MACHINE_ARCHITECTURE IMAGE_FILE_MACHINE_POWERPC - //#define KD_BREAKPOINT_TYPE //#define KD_BREAKPOINT_SIZE //#define KD_BREAKPOINT_VALUE diff --git a/reactos/ntoskrnl/kd64/kddata.c b/reactos/ntoskrnl/kd64/kddata.c index 895753a98d2..3d2be608f59 100644 --- a/reactos/ntoskrnl/kd64/kddata.c +++ b/reactos/ntoskrnl/kd64/kddata.c @@ -378,7 +378,7 @@ DBGKD_GET_VERSION64 KdVersionBlock = #else DBGKD_VERS_FLAG_DATA, #endif - IMAGE_FILE_MACHINE_ARCHITECTURE, + IMAGE_FILE_MACHINE_NATIVE, PACKET_TYPE_MAX, 0, 0, diff --git a/reactos/ntoskrnl/mm/ARM3/miarm.h b/reactos/ntoskrnl/mm/ARM3/miarm.h index cfa99d77330..4c17cd27973 100644 --- a/reactos/ntoskrnl/mm/ARM3/miarm.h +++ b/reactos/ntoskrnl/mm/ARM3/miarm.h @@ -85,31 +85,21 @@ C_ASSERT(SYSTEM_PD_SIZE == PAGE_SIZE); #define PTE_COUNT PTE_PER_PAGE #endif -#ifdef _M_IX86 -#define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_I386 -#elif _M_ARM -#define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_ARM -#elif _M_AMD64 -#define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_AMD64 -#else -#error Define these please! -#endif - // // Protection Bits part of the internal memory manager Protection Mask // Taken from http://www.reactos.org/wiki/Techwiki:Memory_management_in_the_Windows_XP_kernel // and public assertions. // #define MM_ZERO_ACCESS 0 -#define MM_READONLY 1 -#define MM_EXECUTE 2 -#define MM_EXECUTE_READ 3 +#define MM_READONLY 1 +#define MM_EXECUTE 2 +#define MM_EXECUTE_READ 3 #define MM_READWRITE 4 -#define MM_WRITECOPY 5 -#define MM_EXECUTE_READWRITE 6 -#define MM_EXECUTE_WRITECOPY 7 -#define MM_NOCACHE 8 -#define MM_DECOMMIT 0x10 +#define MM_WRITECOPY 5 +#define MM_EXECUTE_READWRITE 6 +#define MM_EXECUTE_WRITECOPY 7 +#define MM_NOCACHE 8 +#define MM_DECOMMIT 0x10 #define MM_NOACCESS (MM_DECOMMIT | MM_NOCACHE) #define MM_INVALID_PROTECTION 0xFFFFFFFF @@ -122,7 +112,7 @@ C_ASSERT(SYSTEM_PD_SIZE == PAGE_SIZE); // // For example, in the logical attributes, we want to express read-only as a flag // but on x86, it is writability that must be set. On the other hand, on x86, just -// like in the kernel, it is disabling the caches that requires a special flag, +// like in the kernel, it is disabling the caches that requires a special flag, // while on certain architectures such as ARM, it is enabling the cache which // requires a flag. // @@ -171,10 +161,10 @@ extern const ULONG MmProtectToValue[32]; // #define MI_IS_SESSION_IMAGE_ADDRESS(Address) \ (((Address) >= MiSessionImageStart) && ((Address) < MiSessionImageEnd)) - + #define MI_IS_SESSION_ADDRESS(Address) \ (((Address) >= MmSessionBase) && ((Address) < MiSessionSpaceEnd)) - + #define MI_IS_SESSION_PTE(Pte) \ ((((PMMPTE)Pte) >= MiSessionBasePte) && (((PMMPTE)Pte) < MiSessionLastPte)) @@ -186,7 +176,7 @@ extern const ULONG MmProtectToValue[32]; #define MI_IS_PAGE_TABLE_OR_HYPER_ADDRESS(Address) \ (((PVOID)(Address) >= (PVOID)PTE_BASE) && ((PVOID)(Address) <= (PVOID)MmHyperSpaceEnd)) - + // // Corresponds to MMPTE_SOFTWARE.Protection // @@ -537,14 +527,14 @@ FORCEINLINE MiDetermineUserGlobalPteMask(IN PVOID PointerPte) { MMPTE TempPte; - + /* Start fresh */ TempPte.u.Long = 0; - + /* Make it valid and accessed */ TempPte.u.Hard.Valid = TRUE; MI_MAKE_ACCESSED_PAGE(&TempPte); - + /* Is this for user-mode? */ if ((PointerPte <= (PVOID)MiHighestUserPte) || ((PointerPte >= (PVOID)MiAddressToPde(NULL)) && @@ -553,9 +543,9 @@ MiDetermineUserGlobalPteMask(IN PVOID PointerPte) /* Set the owner bit */ MI_MAKE_OWNER_PAGE(&TempPte); } - + /* FIXME: We should also set the global bit */ - + /* Return the protection */ return TempPte.u.Long; } @@ -574,10 +564,10 @@ MI_MAKE_HARDWARE_PTE_KERNEL(IN PMMPTE NewPte, ASSERT(MappingPte > MiHighestUserPte); ASSERT(!MI_IS_SESSION_PTE(MappingPte)); ASSERT((MappingPte < (PMMPTE)PDE_BASE) || (MappingPte > (PMMPTE)PDE_TOP)); - + /* Start fresh */ *NewPte = ValidKernelPte; - + /* Set the protection and page */ NewPte->u.Hard.PageFrameNumber = PageFrameNumber; NewPte->u.Long |= MmProtectToPteMask[ProtectionMask]; @@ -611,10 +601,10 @@ MI_MAKE_HARDWARE_PTE_USER(IN PMMPTE NewPte, { /* Only valid for kernel, non-session PTEs */ ASSERT(MappingPte <= MiHighestUserPte); - + /* Start fresh */ *NewPte = ValidKernelPte; - + /* Set the protection and page */ NewPte->u.Hard.Owner = TRUE; NewPte->u.Hard.PageFrameNumber = PageFrameNumber; @@ -635,7 +625,7 @@ MI_MAKE_PROTOTYPE_PTE(IN PMMPTE NewPte, /* Mark this as a prototype */ NewPte->u.Long = 0; NewPte->u.Proto.Prototype = 1; - + /* * Prototype PTEs are only valid in paged pool by design, this little trick * lets us only use 28 bits for the adress of the PTE @@ -658,7 +648,7 @@ BOOLEAN MI_IS_PHYSICAL_ADDRESS(IN PVOID Address) { PMMPDE PointerPde; - + /* Large pages are never paged out, always physically resident */ PointerPde = MiAddressToPde(Address); return ((PointerPde->u.Hard.LargePage) && (PointerPde->u.Hard.Valid)); @@ -785,11 +775,11 @@ MiUnlockProcessWorkingSet(IN PEPROCESS Process, ASSERT(MI_WS_OWNER(Process)); /* This can't be checked because Vm is used by MAREAs) */ //ASSERT(Process->Vm.Flags.AcquiredUnsafe == 0); - + /* The thread doesn't own it anymore */ ASSERT(Thread->OwnsProcessWorkingSetExclusive == TRUE); Thread->OwnsProcessWorkingSetExclusive = FALSE; - + /* FIXME: Actually release it (we can't because Vm is used by MAREAs) */ /* Unblock APCs */ @@ -806,15 +796,15 @@ MiLockWorkingSet(IN PETHREAD Thread, { /* Block APCs */ KeEnterGuardedRegion(); - + /* Working set should be in global memory */ ASSERT(MI_IS_SESSION_ADDRESS((PVOID)WorkingSet) == FALSE); - + /* Thread shouldn't already be owning something */ ASSERT(!MM_ANY_WS_LOCK_HELD(Thread)); - + /* FIXME: Actually lock it (we can't because Vm is used by MAREAs) */ - + /* Which working set is this? */ if (WorkingSet == &MmSystemCacheWs) { @@ -848,7 +838,7 @@ MiUnlockWorkingSet(IN PETHREAD Thread, { /* Working set should be in global memory */ ASSERT(MI_IS_SESSION_ADDRESS((PVOID)WorkingSet) == FALSE); - + /* Which working set is this? */ if (WorkingSet == &MmSystemCacheWs) { @@ -870,7 +860,7 @@ MiUnlockWorkingSet(IN PETHREAD Thread, (Thread->OwnsProcessWorkingSetShared)); Thread->OwnsProcessWorkingSetExclusive = FALSE; } - + /* FIXME: Actually release it (we can't because Vm is used by MAREAs) */ /* Unblock APCs */ @@ -947,7 +937,7 @@ NTAPI MiInitializeMemoryEvents( VOID ); - + PFN_NUMBER NTAPI MxGetNextPage( @@ -960,21 +950,21 @@ MmInitializeMemoryLimits( IN PLOADER_PARAMETER_BLOCK LoaderBlock, IN PBOOLEAN IncludeType ); - + PFN_NUMBER NTAPI MiPagesInLoaderBlock( IN PLOADER_PARAMETER_BLOCK LoaderBlock, IN PBOOLEAN IncludeType ); - + VOID FASTCALL MiSyncARM3WithROS( IN PVOID AddressStart, IN PVOID AddressEnd ); - + NTSTATUS NTAPI MmArmAccessFault( @@ -1170,7 +1160,7 @@ MiDeleteSystemPageableVm( IN ULONG Flags, OUT PPFN_NUMBER ValidPages ); - + PLDR_DATA_TABLE_ENTRY NTAPI MiLookupDataTableEntry( @@ -1318,7 +1308,7 @@ MiLocateSubsection( IN PMMVAD Vad, IN ULONG_PTR Vpn ); - + // // MiRemoveZeroPage will use inline code to zero out the page manually if only // free pages are available. In some scenarios, we don't/can't run that piece of