From: Thomas Faber Date: Wed, 13 Mar 2019 11:36:23 +0000 (+0100) Subject: [UNIATA] Update to version 46e8. CORE-15843 X-Git-Tag: 0.4.13-dev~215 X-Git-Url: https://git.reactos.org/?p=reactos.git;a=commitdiff_plain;h=b91cf860cd04be4bbfcfa9cb9a479010554362d2 [UNIATA] Update to version 46e8. CORE-15843 --- diff --git a/drivers/storage/ide/uniata/atacmd_map.h b/drivers/storage/ide/uniata/atacmd_map.h index 6332feb3c38..9158bc8c5d8 100644 --- a/drivers/storage/ide/uniata/atacmd_map.h +++ b/drivers/storage/ide/uniata/atacmd_map.h @@ -1,5 +1,5 @@ -// Build Version 0.46e3 +// Build Version 0.46e6 UCHAR const AtaCommands48[256] = { diff --git a/drivers/storage/ide/uniata/atapi.h b/drivers/storage/ide/uniata/atapi.h index 405cfb8467a..a190e340136 100644 --- a/drivers/storage/ide/uniata/atapi.h +++ b/drivers/storage/ide/uniata/atapi.h @@ -253,6 +253,7 @@ typedef union _IDE_REGISTERS_2 { #define DFLAGS_HIDDEN 0x8000 // Hidden device, available only with special IOCTLs // via communication virtual device #define DFLAGS_MANUAL_CHS 0x10000 // For devices those have no IDENTIFY commands +#define DFLAGS_LBA32plus 0x20000 // Device is larger than LBA32 //#define DFLAGS_ 0x10000 // // // Used to disable 'advanced' features. diff --git a/drivers/storage/ide/uniata/bm_devs.h b/drivers/storage/ide/uniata/bm_devs.h index 89da4f15505..1de82b2f6ec 100644 --- a/drivers/storage/ide/uniata/bm_devs.h +++ b/drivers/storage/ide/uniata/bm_devs.h @@ -155,7 +155,7 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = { PCI_DEV_HW_SPEC_BM( 2920, 8086, 0x00, ATA_SA300, "Intel ICH9" , I6CH | UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 2926, 8086, 0x00, ATA_SA300, "Intel ICH9" , I6CH2 | UNIATA_SATA ), - PCI_DEV_HW_SPEC_BM( 2921, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ),/* ??? */ + PCI_DEV_HW_SPEC_BM( 2921, 8086, 0x00, ATA_SA300, "Intel ICH9" , I6CH2 | UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 2922, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ), PCI_DEV_HW_SPEC_BM( 2923, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ), PCI_DEV_HW_SPEC_BM( 2925, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ), @@ -244,12 +244,12 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = { PCI_DEV_HW_SPEC_BM( 23a6, 8086, 0x00, ATA_SA300, "COLETOCRK" , UNIATA_SATA | UNIATA_AHCI ), PCI_DEV_HW_SPEC_BM( 2360, 197b, 0x00, ATA_SA300, "JMB360" , UNIATA_SATA | UNIATA_AHCI ), - PCI_DEV_HW_SPEC_BM( 2361, 197b, 0x00, ATA_UDMA6, "JMB361" , 0 ), + PCI_DEV_HW_SPEC_BM( 2361, 197b, 0x00, ATA_SA300, "JMB361" , UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 2362, 197b, 0x00, ATA_SA300, "JMB362" , UNIATA_SATA | UNIATA_AHCI ), - PCI_DEV_HW_SPEC_BM( 2363, 197b, 0x00, ATA_UDMA6, "JMB363" , 0 ), - PCI_DEV_HW_SPEC_BM( 2365, 197b, 0x00, ATA_UDMA6, "JMB365" , 0 ), - PCI_DEV_HW_SPEC_BM( 2366, 197b, 0x00, ATA_UDMA6, "JMB366" , 0 ), - PCI_DEV_HW_SPEC_BM( 2368, 197b, 0x00, ATA_UDMA6, "JMB368" , 0 ), + PCI_DEV_HW_SPEC_BM( 2363, 197b, 0x00, ATA_SA300, "JMB363" , UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 2365, 197b, 0x00, ATA_SA300, "JMB365" , UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 2366, 197b, 0x00, ATA_SA300, "JMB366" , UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 2368, 197b, 0x00, ATA_SA300, "JMB368" , UNIATA_SATA ), /* PCI_DEV_HW_SPEC_BM( 5040, 11ab, 0x00, ATA_SA150, "Marvell 88SX5040" , UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 5041, 11ab, 0x00, ATA_SA150, "Marvell 88SX5041" , UNIATA_SATA ), diff --git a/drivers/storage/ide/uniata/bsmaster.h b/drivers/storage/ide/uniata/bsmaster.h index 1e2332d75ec..ac055b3be28 100644 --- a/drivers/storage/ide/uniata/bsmaster.h +++ b/drivers/storage/ide/uniata/bsmaster.h @@ -1,6 +1,6 @@ /*++ -Copyright (c) 2002-2014 Alexandr A. Telyatnikov (Alter) +Copyright (c) 2002-2018 Alexandr A. Telyatnikov (Alter) Module Name: bsmaster.h @@ -94,6 +94,9 @@ Licence: #define ATA_MAX_IOLBA28 DEF_U64(0x0fffff80) #define ATA_MAX_LBA28 DEF_U64(0x0fffffff) +#define ATA_MAX_IOLBA32 DEF_U64(0xffffff80) +#define ATA_MAX_LBA32 DEF_U64(0xffffffff) + #define ATA_DMA_ENTRIES 256 /* PAGESIZE/2/sizeof(BM_DMA_ENTRY)*/ #define ATA_DMA_EOT 0x80000000 @@ -1588,11 +1591,7 @@ AtapiChipInit( IN ULONG c ); -#ifdef __REACTOS__ -extern ULONG_PTR -#else -extern ULONG -#endif +extern ULONGIO_PTR NTAPI AtapiGetIoRange( IN PVOID HwDeviceExtension, diff --git a/drivers/storage/ide/uniata/config.h b/drivers/storage/ide/uniata/config.h index b59de064676..0f21a9337ea 100644 --- a/drivers/storage/ide/uniata/config.h +++ b/drivers/storage/ide/uniata/config.h @@ -103,6 +103,8 @@ #define CRNT_ILK_TYPE (PVOID) #define CRNT_ILK_PTYPE (PVOID*) #define REGRTL_STR_PTYPE (PWCHAR) + #define UlongToPtr(u) ((PVOID)((ULONG)(u))) + #define PtrToUlong(u) ((ULONG)((PVOID)(u))) #endif //USE_REACTOS_DDK /* Are we under GNU C (mingw) ??? */ diff --git a/drivers/storage/ide/uniata/id_ata.cpp b/drivers/storage/ide/uniata/id_ata.cpp index e8e5d009f28..26d9257ad03 100644 --- a/drivers/storage/ide/uniata/id_ata.cpp +++ b/drivers/storage/ide/uniata/id_ata.cpp @@ -1,6 +1,6 @@ /*++ -Copyright (c) 2002-2016 Alexandr A. Telyatnikov (Alter) +Copyright (c) 2002-2018 Alexandr A. Telyatnikov (Alter) Module Name: id_ata.cpp @@ -282,7 +282,7 @@ AtapiWritePort##sz( \ ASSERT(FALSE); /* We should never get here */ \ } \ if(!res->MemIo) { \ - ScsiPortWritePort##_Type((_type*)(ULONG_PTR)(res->Addr), data); \ + ScsiPortWritePort##_Type((_type*)(ULONGIO_PTR)(res->Addr), data); \ } else { \ /*KdPrint(("r_mem @ (%x) %x\n", _port, port));*/ \ ScsiPortWriteRegister##_Type((_type*)(ULONG_PTR)(res->Addr), data); \ @@ -319,7 +319,7 @@ AtapiWritePortEx##sz( \ ASSERT(FALSE); /* We should never get here */ \ } \ if(!res->MemIo) { \ - ScsiPortWritePort##_Type((_type*)(ULONG_PTR)(res->Addr+offs), data); \ + ScsiPortWritePort##_Type((_type*)(ULONGIO_PTR)(res->Addr+offs), data); \ } else { \ /*KdPrint(("r_mem @ (%x) %x\n", _port, port));*/ \ ScsiPortWriteRegister##_Type((_type*)(ULONG_PTR)(res->Addr+offs), data); \ @@ -355,7 +355,7 @@ AtapiReadPort##sz( \ } \ if(!res->MemIo) { \ /*KdPrint(("r_io @ (%x) %x\n", _port, res->Addr));*/ \ - return ScsiPortReadPort##_Type((_type*)(ULONG_PTR)(res->Addr)); \ + return ScsiPortReadPort##_Type((_type*)(ULONGIO_PTR)(res->Addr)); \ } else { \ /*KdPrint(("r_mem @ (%x) %x\n", _port, res->Addr));*/ \ return ScsiPortReadRegister##_Type((_type*)(ULONG_PTR)(res->Addr)); \ @@ -390,7 +390,7 @@ AtapiReadPortEx##sz( \ ASSERT(FALSE); /* We should never get here */ \ } \ if(!res->MemIo) { \ - return ScsiPortReadPort##_Type((_type*)(ULONG_PTR)(res->Addr+offs)); \ + return ScsiPortReadPort##_Type((_type*)(ULONGIO_PTR)(res->Addr+offs)); \ } else { \ /*KdPrint(("r_mem @ (%x) %x\n", _port, port));*/ \ return ScsiPortReadRegister##_Type((_type*)(ULONG_PTR)(res->Addr+offs)); \ @@ -435,7 +435,7 @@ AtapiReadBuffer##sz( \ } \ if(!res->MemIo) { \ /*KdPrint(("r_io @ (%x) %x\n", _port, res->Addr));*/ \ - ScsiPortReadPortBuffer##_Type((_type*)(ULONG_PTR)(res->Addr), (_type*)Buffer, Count); \ + ScsiPortReadPortBuffer##_Type((_type*)(ULONGIO_PTR)(res->Addr), (_type*)Buffer, Count); \ return; \ } \ while(Count) { \ @@ -480,7 +480,7 @@ AtapiWriteBuffer##sz( \ } \ if(!res->MemIo) { \ /*KdPrint(("r_io @ (%x) %x\n", _port, res->Addr));*/ \ - ScsiPortWritePortBuffer##_Type((_type*)(ULONG_PTR)(res->Addr), (_type*)Buffer, Count); \ + ScsiPortWritePortBuffer##_Type((_type*)(ULONGIO_PTR)(res->Addr), (_type*)Buffer, Count); \ return; \ } \ while(Count) { \ @@ -2093,6 +2093,10 @@ IssueIdentify( } } + if(NumOfSectors > ATA_MAX_IOLBA28) { + KdPrint2((PRINT_PREFIX "2TB threshold, force LBA64 WRITE requirement\n")); + LunExt->DeviceFlags |= DFLAGS_LBA32plus; + } } // if(LunExt->DeviceFlags & DFLAGS_LBA_ENABLED) // fill IdentifyData with bogus geometry @@ -5183,14 +5187,25 @@ ServiceInterrupt: chan->AhciLastIS & ~(ATA_AHCI_P_IX_DHR | ATA_AHCI_P_IX_PS | ATA_AHCI_P_IX_DS | ATA_AHCI_P_IX_SDB), chan->AhciLastSError)); if(chan->AhciLastIS & ~ATA_AHCI_P_IX_OF) { - //KdPrint3((PRINT_PREFIX "Err mask (%#x)\n", chan->AhciLastIS & ~ATA_AHCI_P_IX_OF)); - // We have some other error except Overflow - // Just signal ERROR, operation will be aborted in ERROR branch. - statusByte |= IDE_STATUS_ERROR; - AtaReq->ahci.in_serror = chan->AhciLastSError; - if(chan->AhciLastSError & (ATA_SE_HANDSHAKE_ERR | ATA_SE_LINKSEQ_ERR | ATA_SE_TRANSPORT_ERR | ATA_SE_UNKNOWN_FIS)) { - KdPrint2((PRINT_PREFIX "Unrecoverable\n")); - NoRetry = TRUE; + + if((chan->AhciLastIS == ATA_AHCI_P_IX_INF) && + !(statusByte & IDE_STATUS_ERROR) && + !chan->AhciLastSError && + srb && (srb->SrbFlags & SRB_FLAGS_DATA_IN) + ) { + KdPrint3((PRINT_PREFIX "ATA_AHCI_P_IX_INF on READ, assume underflow\n")); + // continue processing in regular way + } else { + + //KdPrint3((PRINT_PREFIX "Err mask (%#x)\n", chan->AhciLastIS & ~ATA_AHCI_P_IX_OF)); + // We have some other error except Overflow + // Just signal ERROR, operation will be aborted in ERROR branch. + statusByte |= IDE_STATUS_ERROR; + AtaReq->ahci.in_serror = chan->AhciLastSError; + if(chan->AhciLastSError & (ATA_SE_HANDSHAKE_ERR | ATA_SE_LINKSEQ_ERR | ATA_SE_TRANSPORT_ERR | ATA_SE_UNKNOWN_FIS)) { + KdPrint2((PRINT_PREFIX "Unrecoverable\n")); + NoRetry = TRUE; + } } } else { // We have only Overflow. Abort operation and continue @@ -6896,13 +6911,23 @@ IdeReadWrite( AtaReq->TransferLength = Srb->DataTransferLength; // Set up 1st block. switch(Srb->Cdb[0]) { - case SCSIOP_READ: case SCSIOP_WRITE: + if(LunExt->DeviceFlags & DFLAGS_LBA32plus) { + KdPrint2((PRINT_PREFIX "Attention: SCSIOP_WRITE on 2TB\n")); + //return SRB_STATUS_ERROR; + } + // FALLTHROUGH + case SCSIOP_READ: MOV_DD_SWP(startingSector, ((PCDB)Srb->Cdb)->CDB10.LBA); MOV_SWP_DW2DD(AtaReq->bcount, ((PCDB)Srb->Cdb)->CDB10.TransferBlocks); break; - case SCSIOP_READ12: case SCSIOP_WRITE12: + if(LunExt->DeviceFlags & DFLAGS_LBA32plus) { + KdPrint2((PRINT_PREFIX "Attention: SCSIOP_WRITE12 on 2TB\n")); + //return SRB_STATUS_ERROR; + } + // FALLTHROUGH + case SCSIOP_READ12: MOV_DD_SWP(startingSector, ((PCDB)Srb->Cdb)->CDB12READWRITE.LBA); MOV_DD_SWP(AtaReq->bcount, ((PCDB)Srb->Cdb)->CDB12READWRITE.NumOfBlocks); break; @@ -10374,7 +10399,7 @@ UniataInitAtaCommands() case IDE_COMMAND_WRITE_LOG_DMA48: case IDE_COMMAND_TRUSTED_RCV_DMA: case IDE_COMMAND_TRUSTED_SEND_DMA: - case IDE_COMMAND_DATA_SET_MGMT: + case IDE_COMMAND_DATA_SET_MGMT: // TRIM //KdPrint2((PRINT_PREFIX "DMA ")); flags |= ATA_CMD_FLAG_DMA; } diff --git a/drivers/storage/ide/uniata/id_dma.cpp b/drivers/storage/ide/uniata/id_dma.cpp index 9ce765552ba..309e9040fa3 100644 --- a/drivers/storage/ide/uniata/id_dma.cpp +++ b/drivers/storage/ide/uniata/id_dma.cpp @@ -293,11 +293,7 @@ AtapiDmaSetup( return FALSE; } //KdPrint2((PRINT_PREFIX " checkpoint 3\n" )); -#ifdef __REACTOS__ if((ULONG_PTR)data & deviceExtension->AlignmentMask) { -#else - if((ULONG)data & deviceExtension->AlignmentMask) { -#endif KdPrint2((PRINT_PREFIX "AtapiDmaSetup: unaligned data: %#x (%#x)\n", data, deviceExtension->AlignmentMask)); return FALSE; } @@ -345,11 +341,7 @@ retry_DB_IO: return FALSE; } -#ifdef __REACTOS__ dma_count = min(count, (PAGE_SIZE - ((ULONG_PTR)data & PAGE_MASK))); -#else - dma_count = min(count, (PAGE_SIZE - ((ULONG)data & PAGE_MASK))); -#endif data += dma_count; count -= dma_count; i = 0; @@ -444,11 +436,7 @@ retry_DB_IO: *((PULONG)&(AtaReq->ahci.ahci_cmd_ptr->prd_tab[i].DBC_ULONG)) = ((dma_count-1) & 0x3fffff); //AtaReq->ahci.ahci_cmd_ptr->prd_tab[i].I = 1; // interrupt when ready KdPrint2((PRINT_PREFIX " ph data[%d]=%x:%x (%x)\n", i, dma_baseu, dma_base, AtaReq->ahci.ahci_cmd_ptr->prd_tab[i].DBC)); -#ifdef __REACTOS__ if(((ULONG_PTR)&(AtaReq->ahci.ahci_cmd_ptr->prd_tab) & ~PAGE_MASK) != ((ULONG_PTR)&(AtaReq->ahci.ahci_cmd_ptr->prd_tab[i]) & ~PAGE_MASK)) { -#else - if(((ULONG)&(AtaReq->ahci.ahci_cmd_ptr->prd_tab) & ~PAGE_MASK) != ((ULONG)&(AtaReq->ahci.ahci_cmd_ptr->prd_tab[i]) & ~PAGE_MASK)) { -#endif KdPrint2((PRINT_PREFIX "PRD table crosses page boundary! %x vs %x\n", &AtaReq->ahci.ahci_cmd_ptr->prd_tab, &(AtaReq->ahci.ahci_cmd_ptr->prd_tab[i]) )); //AtaReq->Flags |= REQ_FLAG_DMA_DBUF_PRD; @@ -456,11 +444,7 @@ retry_DB_IO: } else { AtaReq->dma_tab[i].base = dma_base; AtaReq->dma_tab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT; -#ifdef __REACTOS__ if(((ULONG_PTR)&(AtaReq->dma_tab) & ~PAGE_MASK) != ((ULONG_PTR)&(AtaReq->dma_tab[i]) & ~PAGE_MASK)) { -#else - if(((ULONG)&(AtaReq->dma_tab) & ~PAGE_MASK) != ((ULONG)&(AtaReq->dma_tab[i]) & ~PAGE_MASK)) { -#endif KdPrint2((PRINT_PREFIX "DMA table crosses page boundary! %x vs %x\n", &AtaReq->dma_tab, &(AtaReq->dma_tab[i]) )); //AtaReq->Flags |= REQ_FLAG_DMA_DBUF_PRD; @@ -2276,10 +2260,13 @@ setup_drive_ite: UCHAR reg40; GetPciConfig1(0x40, reg40); + /* + This is done on chip-init phase if(reg40 & 0x08) { // 80-pin check udmamode = min(udmamode, 2); } + */ /* Nothing to do to setup mode, the controller snoop SET_FEATURE cmd. */ if(apiomode >= 4) apiomode = 4; diff --git a/drivers/storage/ide/uniata/id_init.cpp b/drivers/storage/ide/uniata/id_init.cpp index f27ddc3a2a2..2eaa98e696c 100644 --- a/drivers/storage/ide/uniata/id_init.cpp +++ b/drivers/storage/ide/uniata/id_init.cpp @@ -1,6 +1,6 @@ /*++ -Copyright (c) 2004-2016 Alexandr A. Telyatnikov (Alter) +Copyright (c) 2004-2018 Alexandr A. Telyatnikov (Alter) Module Name: id_init.cpp @@ -279,19 +279,26 @@ UniataChipDetectChannels( } break; #endif // this code is removed from newer FreeBSD +#if 0 case ATA_JMICRON_ID: /* New JMicron PATA controllers */ if(deviceExtension->DevID == ATA_JMB361 || deviceExtension->DevID == ATA_JMB363 || + deviceExtension->DevID == ATA_JMB365 || + deviceExtension->DevID == ATA_JMB366 || deviceExtension->DevID == ATA_JMB368) { - if(BMList[deviceExtension->DevIndex].channel) { - KdPrint2((PRINT_PREFIX "New JMicron has no 2nd chan\n")); - return FALSE; - } - deviceExtension->NumberChannels = 1; - KdPrint2((PRINT_PREFIX "New JMicron PATA 1 chan\n")); + + ULONG tmp32, port_mask; + + port_mask = BMList[deviceExtension->DevIndex].channel; + + GetPciConfig4(0x40, tmp32); + + deviceExtension->NumberChannels = 2; + //KdPrint2((PRINT_PREFIX "New JMicron PATA 1 chan\n")); } break; +#endif // this code is unnecessary since port mapping is implemented case ATA_CYRIX_ID: if(ChipType == CYRIX_OLD) { UCHAR tmp8; @@ -350,17 +357,10 @@ UniataChipDetect( ULONG ChipFlags; ULONG tmp32; UCHAR tmp8; -#ifdef __REACTOS__ ULONG_PTR BaseMemAddress; ULONG_PTR BaseIoAddress1; ULONG_PTR BaseIoAddress2; ULONG_PTR BaseIoAddressBM; -#else - ULONG BaseMemAddress; - ULONG BaseIoAddress1; - ULONG BaseIoAddress2; - ULONG BaseIoAddressBM; -#endif BOOLEAN MemIo = FALSE; BOOLEAN IsPata = FALSE; @@ -1210,11 +1210,7 @@ for_ugly_chips: tmp8 = AtapiReadPortEx1(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressBM_0),IDX_BM_Status); KdPrint2((PRINT_PREFIX "BM status: %x\n", tmp8)); /* cleanup */ -#ifdef __REACTOS__ ScsiPortFreeDeviceBase(HwDeviceExtension, (PCHAR)(ULONG_PTR)BaseIoAddressBM); -#else - ScsiPortFreeDeviceBase(HwDeviceExtension, (PCHAR)BaseIoAddressBM); -#endif UniataInitIoResEx(&deviceExtension->BaseIoAddressBM_0, 0, 0, FALSE); if(tmp8 == 0xff) { @@ -1334,7 +1330,7 @@ for_ugly_chips: } break; case ATA_JMICRON_ID: - /* New JMicron PATA controllers */ + /* New JMicron PATA/SATA controllers */ GetPciConfig1(0xdf, tmp8); if(tmp8 & 0x40) { KdPrint((" Check JMicron AHCI\n")); @@ -1342,13 +1338,16 @@ for_ugly_chips: ChipFlags |= UNIATA_AHCI; deviceExtension->HwFlags |= UNIATA_AHCI; } else { - KdPrint((" JMicron PATA\n")); + KdPrint((" JMicron PATA/SATA\n")); } } else { +#if 0 // do not touch, see Linux sources /* set controller configuration to a combined setup we support */ SetPciConfig4(0x40, 0x80c0a131); SetPciConfig4(0x80, 0x01200000); - //KdPrint((" JMicron Combined (not supported yet)\n")); +#endif + //GetPciConfig1(0x40, tmp32); + KdPrint((" JMicron Combined\n")); //return STATUS_NOT_FOUND; } break; @@ -2648,6 +2647,85 @@ AtapiChipInit( } } break; + case ATA_JMICRON_ID: + /* New JMicron PATA controllers */ + if(deviceExtension->DevID == ATA_JMB361 || + deviceExtension->DevID == ATA_JMB363 || + deviceExtension->DevID == ATA_JMB365 || + deviceExtension->DevID == ATA_JMB366 || + deviceExtension->DevID == ATA_JMB368) { + KdPrint2((PRINT_PREFIX "JMicron\n")); + + ULONG c_swp = 0; + ULONG reg40, reg80; + + GetPciConfig4(0x40, reg40); + KdPrint2((PRINT_PREFIX "reg 40: %x\n", reg40)); + + c_swp = (reg40 & (1<<22)) ? 1 : 0; // 1=swap, 0=keep + KdPrint2((PRINT_PREFIX "c_swp: %x\n", c_swp)); + + GetPciConfig4(0x80, reg80); + KdPrint2((PRINT_PREFIX "reg 80: %x\n", reg80)); + + if(c == CHAN_NOT_SPECIFIED) { + UCHAR P1mode; + + P1mode = (reg80 & (1<<24)) ? ATA_UDMA6 : ATA_SA300; + KdPrint2((PRINT_PREFIX "p1 mode: %x\n", P1mode)); + + if(reg40 & (1 << 23)) { + KdPrint2((PRINT_PREFIX "SATA+PATA0\n")); + deviceExtension->chan[0 ^ c_swp].MaxTransferMode = P1mode; + deviceExtension->chan[1 ^ c_swp].MaxTransferMode = ATA_UDMA6; + deviceExtension->chan[1 ^ c_swp].ChannelCtrlFlags |= CTRFLAGS_NO_SLAVE; + + } else { + KdPrint2((PRINT_PREFIX "SATA+SATA\n")); + deviceExtension->chan[0 ^ c_swp].MaxTransferMode = P1mode; + //deviceExtension->chan[0 ^ c_swp].ChannelCtrlFlags |= CTRFLAGS_NO_SLAVE; + deviceExtension->chan[1 ^ c_swp].MaxTransferMode = ATA_SA300; + deviceExtension->chan[1 ^ c_swp].ChannelCtrlFlags |= CTRFLAGS_NO_SLAVE; + } + + } else { + /* + deviceExtension->chan[0 ^ c_swp].lun[0]->SATA_lun_map = + deviceExtension->chan[0 ^ c_swp].lun[0]->SATA_lun_map = 0; + deviceExtension->chan[1 ^ c_swp].lun[0]->SATA_lun_map = + deviceExtension->chan[1 ^ c_swp].lun[0]->SATA_lun_map = 1; + */ + KdPrint2((PRINT_PREFIX "chan %d\n", c)); + chan = &deviceExtension->chan[c]; + + UCHAR ph_channel = (UCHAR)(c ^ c_swp); + //c_swp = chan->lun[0]->SATA_lun_map; + if(chan->MaxTransferMode >= ATA_SA150) { + KdPrint2((PRINT_PREFIX "SATA, map -> %x\n", ph_channel)); + } else { + KdPrint2((PRINT_PREFIX "PATA, map -> %x\n", ph_channel)); + if(!ph_channel) { + if(!(reg40 & (1<<5))) { + KdPrint2((PRINT_PREFIX "disabled\n", ph_channel)); + } else + if(!(reg40 & (1<<3))) { + KdPrint2((PRINT_PREFIX "40-pin\n")); + chan->MaxTransferMode = min(deviceExtension->MaxTransferMode, ATA_UDMA2); + } + } else { + if(!(reg80 & (1<<21))) { + KdPrint2((PRINT_PREFIX "disabled\n", ph_channel)); + } else + if(!(reg80 & (1<<19))) { + KdPrint2((PRINT_PREFIX "40-pin\n")); + chan->MaxTransferMode = min(deviceExtension->MaxTransferMode, ATA_UDMA2); + } + } + } + } + + } + break; default: if(c != CHAN_NOT_SPECIFIED) { // We don't know how to check for 80-pin cable on unknown controllers. @@ -2661,7 +2739,8 @@ AtapiChipInit( // In all places separate channels are inited after common controller init // The only exception is probe. But there we may need info about 40/80 pin and MaxTransferRate - if(CheckCable && !(ChipFlags & (UNIATA_NO80CHK | UNIATA_SATA))) { + // Do not check UNIATA_SATA here since we may have controller with mixed ports + if(CheckCable && !(ChipFlags & (UNIATA_NO80CHK/* | UNIATA_SATA*/))) { for(c=0; cNumberChannels; c++) { AtapiChipInit(HwDeviceExtension, DeviceNumber, c); } diff --git a/drivers/storage/ide/uniata/id_probe.cpp b/drivers/storage/ide/uniata/id_probe.cpp index 57c0aa2eb42..0a36684d7f0 100644 --- a/drivers/storage/ide/uniata/id_probe.cpp +++ b/drivers/storage/ide/uniata/id_probe.cpp @@ -149,7 +149,7 @@ UniataEnableIoPCI( Get PCI address by ConfigInfo and RID */ #ifdef __REACTOS__ -ULONG_PTR +ULONGIO_PTR #else ULONG #endif @@ -936,7 +936,7 @@ UniataFindCompatBusMasterController1( { return UniataFindBusMasterController( HwDeviceExtension, - (PVOID)0x00000000, + UlongToPtr(0x00000000), BusInformation, ArgumentString, ConfigInfo, @@ -957,11 +957,7 @@ UniataFindCompatBusMasterController2( { return UniataFindBusMasterController( HwDeviceExtension, -#ifdef __REACTOS__ UlongToPtr(0x80000000), -#else - (PVOID)0x80000000, -#endif BusInformation, ArgumentString, ConfigInfo, @@ -1079,11 +1075,7 @@ UniataFindBusMasterController( KdPrint2((PRINT_PREFIX "AdapterInterfaceType: Isa\n")); } if(InDriverEntry) { -#ifdef __REACTOS__ i = PtrToUlong(Context); -#else - i = (ULONG)Context; -#endif if(i & 0x80000000) { AltInit = TRUE; } @@ -1099,11 +1091,7 @@ UniataFindBusMasterController( } if(i >= BMListLen) { KdPrint2((PRINT_PREFIX "unexpected device arrival\n")); -#ifdef __REACTOS__ i = PtrToUlong(Context); -#else - i = (ULONG)Context; -#endif if(FirstMasterOk) { channel = 1; } @@ -2565,22 +2553,14 @@ retryIdentifier: if(BaseIoAddress2) { if(hasPCI) { -#ifdef __REACTOS__ (*ConfigInfo->AccessRanges)[1].RangeStart = ScsiPortConvertUlongToPhysicalAddress((ULONG_PTR)BaseIoAddress2); -#else - (*ConfigInfo->AccessRanges)[1].RangeStart = ScsiPortConvertUlongToPhysicalAddress((ULONG)BaseIoAddress2); -#endif (*ConfigInfo->AccessRanges)[1].RangeLength = ATA_ALTIOSIZE; (*ConfigInfo->AccessRanges)[1].RangeInMemory = FALSE; } else { // NT4 and NT3.51 on ISA-only hardware definitly fail floppy.sys load // when this range is claimed by other driver. // However, floppy should use only 0x3f0-3f5,3f7 -#ifdef __REACTOS__ - if((ULONG_PTR)BaseIoAddress2 >= 0x3f0 && (ULONG_PTR)BaseIoAddress2 <= 0x3f7) { -#else - if((ULONG)BaseIoAddress2 >= 0x3f0 && (ULONG)BaseIoAddress2 <= 0x3f7) { -#endif + if((ULONGIO_PTR)BaseIoAddress2 >= 0x3f0 && (ULONGIO_PTR)BaseIoAddress2 <= 0x3f7) { KdPrint2((PRINT_PREFIX "!!! Possible AltStatus vs Floppy IO range interference !!!\n")); } KdPrint2((PRINT_PREFIX "Do not expose to OS on old ISA\n")); diff --git a/drivers/storage/ide/uniata/id_sata.cpp b/drivers/storage/ide/uniata/id_sata.cpp index 25fa089ea8b..c39b0a83fa1 100644 --- a/drivers/storage/ide/uniata/id_sata.cpp +++ b/drivers/storage/ide/uniata/id_sata.cpp @@ -903,11 +903,7 @@ UniataAhciDetect( ULONG v_Mn, v_Mj; #endif //_DEBUG ULONG NumberChannels; -#ifdef __REACTOS__ ULONG_PTR BaseMemAddress; -#else - ULONG BaseMemAddress; -#endif BOOLEAN MemIo = FALSE; BOOLEAN found = FALSE; diff --git a/drivers/storage/ide/uniata/uniata_ver.h b/drivers/storage/ide/uniata/uniata_ver.h index 2a6ad98c708..2dc11c5d901 100644 --- a/drivers/storage/ide/uniata/uniata_ver.h +++ b/drivers/storage/ide/uniata/uniata_ver.h @@ -1,10 +1,10 @@ -#define UNIATA_VER_STR "46e5" -#define UNIATA_VER_DOT 0.46.5.5 +#define UNIATA_VER_STR "46e8" +#define UNIATA_VER_DOT 0.46.5.8 #define UNIATA_VER_MJ 0 #define UNIATA_VER_MN 46 #define UNIATA_VER_SUB_MJ 5 -#define UNIATA_VER_SUB_MN 5 -#define UNIATA_VER_DOT_COMMA 0,46,5,5 -#define UNIATA_VER_DOT_STR "0.46.5.5" -#define UNIATA_VER_YEAR 2017 -#define UNIATA_VER_YEAR_STR "2017" +#define UNIATA_VER_SUB_MN 8 +#define UNIATA_VER_DOT_COMMA 0,46,5,8 +#define UNIATA_VER_DOT_STR "0.46.5.8" +#define UNIATA_VER_YEAR 2019 +#define UNIATA_VER_YEAR_STR "2019"