From e2ae1410f22764539b646b454ee5ce2cc023fa87 Mon Sep 17 00:00:00 2001 From: Timo Kreuzer Date: Tue, 5 May 2015 20:35:27 +0000 Subject: [PATCH] [NTOSKRNL] Clean up some obsolete architecture specific Mm definitions svn path=/trunk/; revision=67567 --- reactos/ntoskrnl/include/internal/amd64/mm.h | 30 +-- reactos/ntoskrnl/include/internal/arm/mm.h | 13 +- reactos/ntoskrnl/include/internal/i386/mm.h | 36 +--- reactos/ntoskrnl/mm/i386/page.c | 2 + reactos/ntoskrnl/mm/i386/pagepae.c | 190 ++----------------- reactos/ntoskrnl/mm/powerpc/page.c | 31 --- 6 files changed, 38 insertions(+), 264 deletions(-) diff --git a/reactos/ntoskrnl/include/internal/amd64/mm.h b/reactos/ntoskrnl/include/internal/amd64/mm.h index 63f740a2aea..3beea74f77d 100644 --- a/reactos/ntoskrnl/include/internal/amd64/mm.h +++ b/reactos/ntoskrnl/include/internal/amd64/mm.h @@ -1,27 +1,26 @@ /* - * kernel internal memory managment definitions for amd64 + * kernel internal memory management definitions for amd64 */ #pragma once +#define _MI_PAGING_LEVELS 4 + /* Memory layout base addresses */ -#define MI_LOWEST_VAD_ADDRESS (PVOID)0x000000007FF00000ULL +#define MI_LOWEST_VAD_ADDRESS (PVOID)0x0000000000010000ULL #define MI_USER_PROBE_ADDRESS (PVOID)0x000007FFFFFF0000ULL #define MI_DEFAULT_SYSTEM_RANGE_START (PVOID)0xFFFF080000000000ULL #define MI_REAL_SYSTEM_RANGE_START 0xFFFF800000000000ULL -#define MI_PAGE_TABLE_BASE 0xFFFFF68000000000ULL #define HYPER_SPACE 0xFFFFF70000000000ULL #define HYPER_SPACE_END 0xFFFFF77FFFFFFFFFULL -#define MI_SHARED_SYSTEM_PAGE 0xFFFFF78000000000ULL #define MI_SYSTEM_CACHE_WS_START 0xFFFFF78000001000ULL -#define MI_LOADER_MAPPINGS 0xFFFFF80000000000ULL -#define MI_PAGED_SYSTEM_START 0xFFFFF88000000000ULL #define MI_PAGED_POOL_START (PVOID)0xFFFFF8A000000000ULL -#define MI_PAGED_POOL_END 0xFFFFF8BFFFFFFFFFULL -#define MI_SESSION_SPACE_START 0xFFFFF90000000000ULL +//#define MI_PAGED_POOL_END 0xFFFFF8BFFFFFFFFFULL +//#define MI_SESSION_SPACE_START 0xFFFFF90000000000ULL #define MI_SESSION_VIEW_END 0xFFFFF97FFF000000ULL #define MI_SESSION_SPACE_END 0xFFFFF97FFFFFFFFFULL #define MM_SYSTEM_SPACE_START 0xFFFFF98000000000ULL #define MI_PFN_DATABASE 0xFFFFFA8000000000ULL +#define MI_NONPAGED_POOL_END (PVOID)0xFFFFFFFFFFBFFFFFULL #define MI_HIGHEST_SYSTEM_ADDRESS (PVOID)0xFFFFFFFFFFFFFFFFULL /* WOW64 address definitions */ @@ -39,7 +38,6 @@ #define MI_DUMMY_PTE (MI_MAPPING_RANGE_END + PAGE_SIZE) #define MI_VAD_BITMAP (MI_DUMMY_PTE + PAGE_SIZE) #define MI_WORKING_SET_LIST (MI_VAD_BITMAP + PAGE_SIZE) -#define MI_NONPAGED_POOL_END 0 /* Memory sizes */ #define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255*1024*1024) >> PAGE_SHIFT) @@ -68,20 +66,14 @@ #define MmSystemRangeStart ((PVOID)MI_REAL_SYSTEM_RANGE_START) /* Misc constants */ -#define _MI_PAGING_LEVELS 4 #define MI_NUMBER_SYSTEM_PTES 22000 #define MI_MAX_FREE_PAGE_LISTS 4 -#define NR_SECTION_PAGE_TABLES 1024 -#define NR_SECTION_PAGE_ENTRIES 1024 #define MI_HYPERSPACE_PTES (256 - 1) #define MI_ZERO_PTES (32) /* FIXME - different architectures have different cache line sizes... */ -#define MM_CACHE_LINE_SIZE 32 #define MI_MAX_ZERO_BITS 53 /* Helper macros */ -#define PAGE_MASK(x) ((x)&(~0xfff)) -#define PAE_PAGE_MASK(x) ((x)&(~0xfffLL)) #define IS_ALIGNED(addr, align) (((ULONG64)(addr) & (align - 1)) == 0) #define IS_PAGE_ALIGNED(addr) IS_ALIGNED(addr, PAGE_SIZE) @@ -135,14 +127,6 @@ #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1) #endif -// FIXME!!! -#define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \ - ((x) / (4*1024*1024)) -#define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \ - ((((x)) % (4*1024*1024)) / (4*1024)) - -//#define TEB_BASE 0x7FFDE000 - /* On x64, these are the same */ #define MMPDE MMPTE #define PMMPDE PMMPTE diff --git a/reactos/ntoskrnl/include/internal/arm/mm.h b/reactos/ntoskrnl/include/internal/arm/mm.h index d75ba15493f..537456515f4 100644 --- a/reactos/ntoskrnl/include/internal/arm/mm.h +++ b/reactos/ntoskrnl/include/internal/arm/mm.h @@ -1,3 +1,6 @@ +/* + * kernel internal memory management definitions for arm + */ #pragma once #define _MI_PAGING_LEVELS 2 @@ -124,9 +127,6 @@ typedef enum _ARM_DOMAIN /* Easy accessing PFN in PTE */ #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber) -#define NR_SECTION_PAGE_TABLES 1024 -#define NR_SECTION_PAGE_ENTRIES 256 - /* See PDR definition */ #define MI_HYPERSPACE_PTES (256 - 1) #define MI_ZERO_PTES (32) @@ -159,10 +159,3 @@ typedef enum _ARM_DOMAIN #define MiPteToAddress(x) ((PVOID)((ULONG)(x) << 10)) #define MiPdeToAddress(x) ((PVOID)((ULONG)(x) << 18)) -#define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \ - ((x) / (4*1024*1024)) - -#define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \ - ((((x)) % (4*1024*1024)) / (4*1024)) - -#define MM_CACHE_LINE_SIZE 64 diff --git a/reactos/ntoskrnl/include/internal/i386/mm.h b/reactos/ntoskrnl/include/internal/i386/mm.h index 499294770a1..fa9514273ad 100644 --- a/reactos/ntoskrnl/include/internal/i386/mm.h +++ b/reactos/ntoskrnl/include/internal/i386/mm.h @@ -1,7 +1,6 @@ /* - * Lowlevel memory managment definitions + * kernel internal memory management definitions for x86 */ - #pragma once #ifdef _PAE_ @@ -10,17 +9,9 @@ #define _MI_PAGING_LEVELS 2 #endif -#define PAGE_MASK(x) ((x)&(~0xfff)) -#define PAE_PAGE_MASK(x) ((x)&(~0xfffLL)) - /* MMPTE related defines */ #define MM_EMPTY_PTE_LIST ((ULONG)0xFFFFF) #define MM_EMPTY_LIST ((ULONG_PTR)-1) - -/* Base addresses of PTE and PDE */ -#define PAGETABLE_MAP (0xc0000000) -#define PAGEDIRECTORY_MAP (0xc0000000 + (PAGETABLE_MAP / (1024))) - /* FIXME: These are different for PAE */ #define PTE_BASE 0xC0000000 #define PDE_BASE 0xC0300000 @@ -30,18 +21,17 @@ #define HYPER_SPACE_END 0xC07FFFFF #define PTE_PER_PAGE 0x400 +#define PDE_PER_PAGE 0x400 /* Converting address to a corresponding PDE or PTE entry */ #define MiAddressToPde(x) \ - ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PAGEDIRECTORY_MAP)) + ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE)) #define MiAddressToPte(x) \ - ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PAGETABLE_MAP)) + ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE)) #define MiAddressToPteOffset(x) \ ((((ULONG)(x)) << 10) >> 22) -// -// Convert a PTE into a corresponding address -// +/* Convert a PTE into a corresponding address */ #define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10)) #define MiPdeToAddress(PDE) ((PVOID)((ULONG)(PDE) << 20)) #define MiPdeToPte(PDE) ((PMMPTE)MiPteToAddress(PDE)) @@ -56,6 +46,7 @@ /* Easy accessing PFN in PTE */ #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber) +/* Macros for portable PTE modification */ #define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.Global = 0) #define MI_MAKE_DIRTY_PAGE(x) ((x)->u.Hard.Dirty = 1) #define MI_MAKE_ACCESSED_PAGE(x) ((x)->u.Hard.Accessed = 1) @@ -77,17 +68,6 @@ #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1) #endif -#define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \ - ((x) / (4*1024*1024)) - -#define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \ - ((((x)) % (4*1024*1024)) / (4*1024)) - -#define NR_SECTION_PAGE_TABLES 1024 -#define NR_SECTION_PAGE_ENTRIES 1024 - -#define TEB_BASE 0x7FFDE000 - #define MI_HYPERSPACE_PTES (256 - 1) #define MI_ZERO_PTES (32) #define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE @@ -104,7 +84,3 @@ #define MMPDE MMPTE #define PMMPDE PMMPTE -/* -* FIXME - different architectures have different cache line sizes... -*/ -#define MM_CACHE_LINE_SIZE 32 diff --git a/reactos/ntoskrnl/mm/i386/page.c b/reactos/ntoskrnl/mm/i386/page.c index fa923745edb..51fde6e1c3b 100644 --- a/reactos/ntoskrnl/mm/i386/page.c +++ b/reactos/ntoskrnl/mm/i386/page.c @@ -44,6 +44,8 @@ #define PTE_TO_PFN(X) ((X) >> PAGE_SHIFT) #define PFN_TO_PTE(X) ((X) << PAGE_SHIFT) +#define PAGE_MASK(x) ((x)&(~0xfff)) + const ULONG MmProtectToPteMask[32] = diff --git a/reactos/ntoskrnl/mm/i386/pagepae.c b/reactos/ntoskrnl/mm/i386/pagepae.c index b6c255dabd4..fdc44864a87 100644 --- a/reactos/ntoskrnl/mm/i386/pagepae.c +++ b/reactos/ntoskrnl/mm/i386/pagepae.c @@ -38,16 +38,14 @@ #define PA_ACCESSED (1 << PA_BIT_ACCESSED) #define PA_GLOBAL (1 << PA_BIT_GLOBAL) -#define PAGETABLE_MAP (0xc0000000) -#define PAGEDIRECTORY_MAP (0xc0000000 + (PAGETABLE_MAP / (1024))) - -#define PAE_PAGEDIRECTORY_MAP (0xc0000000 + (PAGETABLE_MAP / (512))) +#define PAGEDIRECTORY_MAP (0xc0000000 + (PTE_BASE / (1024))) +#define PAE_PAGEDIRECTORY_MAP (0xc0000000 + (PTE_BASE / (512))) #define HYPERSPACE (Ke386Pae ? 0xc0800000 : 0xc0400000) #define IS_HYPERSPACE(v) (((ULONG)(v) >= HYPERSPACE && (ULONG)(v) < HYPERSPACE + 0x400000)) -ULONG MmGlobalKernelPageDirectory[1024]; -ULONGLONG MmGlobalKernelPageDirectoryForPAE[2048]; +static ULONG MmGlobalKernelPageDirectory[1024]; +static ULONGLONG MmGlobalKernelPageDirectoryForPAE[2048]; #define PTE_TO_PFN(X) ((X) >> PAGE_SHIFT) #define PFN_TO_PTE(X) ((X) << PAGE_SHIFT) @@ -55,6 +53,9 @@ ULONGLONG MmGlobalKernelPageDirectoryForPAE[2048]; #define PAE_PTE_TO_PFN(X) (PAE_PAGE_MASK(X) >> PAGE_SHIFT) #define PAE_PFN_TO_PTE(X) ((X) << PAGE_SHIFT) +#define PAGE_MASK(x) ((x)&(~0xfff)) +#define PAE_PAGE_MASK(x) ((x)&(~0xfffLL)) + extern BOOLEAN Ke386Pae; extern BOOLEAN Ke386NoExecute; @@ -155,7 +156,7 @@ ProtectToPTE(ULONG flProtect) #define ADDR_TO_PDE(v) (PULONG)(PAGEDIRECTORY_MAP + \ ((((ULONG)(v)) / (1024 * 1024))&(~0x3))) -#define ADDR_TO_PTE(v) (PULONG)(PAGETABLE_MAP + ((((ULONG)(v) / 1024))&(~0x3))) +#define ADDR_TO_PTE(v) (PULONG)(PTE_BASE + ((((ULONG)(v) / 1024))&(~0x3))) #define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE))) @@ -166,7 +167,7 @@ ProtectToPTE(ULONG flProtect) #define PAE_ADDR_TO_PDE(v) (PULONGLONG) (PAE_PAGEDIRECTORY_MAP + \ ((((ULONG_PTR)(v)) / (512 * 512))&(~0x7))) -#define PAE_ADDR_TO_PTE(v) (PULONGLONG) (PAGETABLE_MAP + ((((ULONG_PTR)(v) / 512))&(~0x7))) +#define PAE_ADDR_TO_PTE(v) (PULONGLONG) (PTE_BASE + ((((ULONG_PTR)(v) / 512))&(~0x7))) #define PAE_ADDR_TO_PDTE_OFFSET(v) (((ULONG_PTR)(v)) / (512 * 512 * PAGE_SIZE)) @@ -221,11 +222,11 @@ MmCreateProcessAddressSpace(IN ULONG MinWs, { PageDir = (PULONGLONG)MmCreateHyperspaceMapping(Pfn[i+1]); memcpy(PageDir, &MmGlobalKernelPageDirectoryForPAE[i * 512], 512 * sizeof(ULONGLONG)); - if (PAE_ADDR_TO_PDTE_OFFSET(PAGETABLE_MAP) == i) + if (PAE_ADDR_TO_PDTE_OFFSET(PTE_BASE) == i) { for (j = 0; j < 4; j++) { - PageDir[PAE_ADDR_TO_PDE_PAGE_OFFSET(PAGETABLE_MAP) + j] = PAE_PFN_TO_PTE(Pfn[1+j]) | PA_PRESENT | PA_READWRITE; + PageDir[PAE_ADDR_TO_PDE_PAGE_OFFSET(PTE_BASE) + j] = PAE_PFN_TO_PTE(Pfn[1+j]) | PA_PRESENT | PA_READWRITE; } } if (PAE_ADDR_TO_PDTE_OFFSET(HYPERSPACE) == i) @@ -245,8 +246,8 @@ MmCreateProcessAddressSpace(IN ULONG MinWs, MmGlobalKernelPageDirectory + ADDR_TO_PDE_OFFSET(MmSystemRangeStart), (1024 - ADDR_TO_PDE_OFFSET(MmSystemRangeStart)) * sizeof(ULONG)); - DPRINT("Addr %x\n",ADDR_TO_PDE_OFFSET(PAGETABLE_MAP)); - PageDirectory[ADDR_TO_PDE_OFFSET(PAGETABLE_MAP)] = PFN_TO_PTE(Pfn[0]) | PA_PRESENT | PA_READWRITE; + DPRINT("Addr %x\n",ADDR_TO_PDE_OFFSET(PTE_BASE)); + PageDirectory[ADDR_TO_PDE_OFFSET(PTE_BASE)] = PFN_TO_PTE(Pfn[0]) | PA_PRESENT | PA_READWRITE; PageDirectory[ADDR_TO_PDE_OFFSET(HYPERSPACE)] = PFN_TO_PTE(Pfn[1]) | PA_PRESENT | PA_READWRITE; MmDeleteHyperspaceMapping(PageDirectory); @@ -334,7 +335,7 @@ MmGetPageTableForProcessForPAE(PEPROCESS Process, PVOID Address, BOOLEAN Create) DPRINT("MmGetPageTableForProcessForPAE(%x %x %d)\n", Process, Address, Create); - if (Address >= (PVOID)PAGETABLE_MAP && Address < (PVOID)((ULONG_PTR)PAGETABLE_MAP + 0x800000)) + if (Address >= (PVOID)PTE_BASE && Address < (PVOID)((ULONG_PTR)PTE_BASE + 0x800000)) { ASSERT(FALSE); } @@ -535,14 +536,14 @@ BOOLEAN MmUnmapPageTable(PULONG Pt) { if (Ke386Pae) { - if ((PULONGLONG)Pt >= (PULONGLONG)PAGETABLE_MAP && (PULONGLONG)Pt < (PULONGLONG)PAGETABLE_MAP + 4*512*512) + if ((PULONGLONG)Pt >= (PULONGLONG)PTE_BASE && (PULONGLONG)Pt < (PULONGLONG)PTE_BASE + 4*512*512) { return TRUE; } } else { - if (Pt >= (PULONG)PAGETABLE_MAP && Pt < (PULONG)PAGETABLE_MAP + 1024*1024) + if (Pt >= (PULONG)PTE_BASE && Pt < (PULONG)PTE_BASE + 1024*1024) { return TRUE; } @@ -1272,7 +1273,7 @@ MmCreateVirtualMappingUnsafe(PEPROCESS Process, if (Pte != 0LL) { if (Address > MmSystemRangeStart || - (Pt >= (PULONGLONG)PAGETABLE_MAP && Pt < (PULONGLONG)PAGETABLE_MAP + 4*512*512)) + (Pt >= (PULONGLONG)PTE_BASE && Pt < (PULONGLONG)PTE_BASE + 4*512*512)) { MiFlushTlb((PULONG)Pt, Address); } @@ -1337,7 +1338,7 @@ MmCreateVirtualMappingUnsafe(PEPROCESS Process, if (Pte != 0) { if (Address > MmSystemRangeStart || - (Pt >= (PULONG)PAGETABLE_MAP && Pt < (PULONG)PAGETABLE_MAP + 1024*1024)) + (Pt >= (PULONG)PTE_BASE && Pt < (PULONG)PTE_BASE + 1024*1024)) { MiFlushTlb(Pt, Address); } @@ -1492,157 +1493,6 @@ MmSetPageProtect(PEPROCESS Process, PVOID Address, ULONG flProtect) } } -PVOID -NTAPI -MmCreateHyperspaceMapping(PFN_NUMBER Page) -{ - PVOID Address; - ULONG i; - - if (Ke386Pae) - { - ULONGLONG Entry; - ULONGLONG ZeroEntry = 0LL; - PULONGLONG Pte; - - Entry = PFN_TO_PTE(Page) | PA_PRESENT | PA_READWRITE; - Pte = PAE_ADDR_TO_PTE(HYPERSPACE) + Page % 1024; - - if (Page & 1024) - { - for (i = Page %1024; i < 1024; i++, Pte++) - { - if (0LL == ExfInterlockedCompareExchange64UL(Pte, &Entry, &ZeroEntry)) - { - break; - } - } - if (i >= 1024) - { - Pte = PAE_ADDR_TO_PTE(HYPERSPACE); - for (i = 0; i < Page % 1024; i++, Pte++) - { - if (0LL == ExfInterlockedCompareExchange64UL(Pte, &Entry, &ZeroEntry)) - { - break; - } - } - if (i >= Page % 1024) - { - ASSERT(FALSE); - } - } - } - else - { - for (i = Page %1024; (LONG)i >= 0; i--, Pte--) - { - if (0LL == ExfInterlockedCompareExchange64UL(Pte, &Entry, &ZeroEntry)) - { - break; - } - } - if ((LONG)i < 0) - { - Pte = PAE_ADDR_TO_PTE(HYPERSPACE) + 1023; - for (i = 1023; i > Page % 1024; i--, Pte--) - { - if (0LL == ExfInterlockedCompareExchange64UL(Pte, &Entry, &ZeroEntry)) - { - break; - } - } - if (i <= Page % 1024) - { - ASSERT(FALSE); - } - } - } - } - else - { - ULONG Entry; - PULONG Pte; - Entry = PFN_TO_PTE(Page) | PA_PRESENT | PA_READWRITE; - Pte = ADDR_TO_PTE(HYPERSPACE) + Page % 1024; - if (Page & 1024) - { - for (i = Page % 1024; i < 1024; i++, Pte++) - { - if (0 == InterlockedCompareExchange((PLONG)Pte, (LONG)Entry, 0)) - { - break; - } - } - if (i >= 1024) - { - Pte = ADDR_TO_PTE(HYPERSPACE); - for (i = 0; i < Page % 1024; i++, Pte++) - { - if (0 == InterlockedCompareExchange((PLONG)Pte, (LONG)Entry, 0)) - { - break; - } - } - if (i >= Page % 1024) - { - ASSERT(FALSE); - } - } - } - else - { - for (i = Page % 1024; (LONG)i >= 0; i--, Pte--) - { - if (0 == InterlockedCompareExchange((PLONG)Pte, (LONG)Entry, 0)) - { - break; - } - } - if ((LONG)i < 0) - { - Pte = ADDR_TO_PTE(HYPERSPACE) + 1023; - for (i = 1023; i > Page % 1024; i--, Pte--) - { - if (0 == InterlockedCompareExchange((PLONG)Pte, (LONG)Entry, 0)) - { - break; - } - } - if (i <= Page % 1024) - { - ASSERT(FALSE); - } - } - } - } - Address = (PVOID)((ULONG_PTR)HYPERSPACE + i * PAGE_SIZE); - __invlpg(Address); - return Address; -} - -PFN_NUMBER -NTAPI -MmDeleteHyperspaceMapping(PVOID Address) -{ - PFN_NUMBER Pfn; - ASSERT (IS_HYPERSPACE(Address)); - if (Ke386Pae) - { - ULONGLONG Entry = 0LL; - Entry = (ULONG)ExfpInterlockedExchange64UL(PAE_ADDR_TO_PTE(Address), &Entry); - Pfn = PAE_PTE_TO_PFN(Entry); - } - else - { - ULONG Entry; - Entry = InterlockedExchange((PLONG)ADDR_TO_PTE(Address), 0); - Pfn = PTE_TO_PFN(Entry); - } - __invlpg(Address); - return Pfn; -} - VOID INIT_FUNCTION NTAPI @@ -1657,7 +1507,7 @@ MmInitGlobalKernelPageDirectory(VOID) PULONGLONG CurrentPageDirectory = (PULONGLONG)PAE_PAGEDIRECTORY_MAP; for (i = PAE_ADDR_TO_PDE_OFFSET(MmSystemRangeStart); i < 4 * 512; i++) { - if (!(i >= PAE_ADDR_TO_PDE_OFFSET(PAGETABLE_MAP) && i < PAE_ADDR_TO_PDE_OFFSET(PAGETABLE_MAP) + 4) && + if (!(i >= PAE_ADDR_TO_PDE_OFFSET(PTE_BASE) && i < PAE_ADDR_TO_PDE_OFFSET(PTE_BASE) + 4) && !(i >= PAE_ADDR_TO_PDE_OFFSET(HYPERSPACE) && i < PAE_ADDR_TO_PDE_OFFSET(HYPERSPACE) + 2) && 0LL == MmGlobalKernelPageDirectoryForPAE[i] && 0LL != CurrentPageDirectory[i]) { @@ -1675,7 +1525,7 @@ MmInitGlobalKernelPageDirectory(VOID) PULONG CurrentPageDirectory = (PULONG)PAGEDIRECTORY_MAP; for (i = ADDR_TO_PDE_OFFSET(MmSystemRangeStart); i < 1024; i++) { - if (i != ADDR_TO_PDE_OFFSET(PAGETABLE_MAP) && + if (i != ADDR_TO_PDE_OFFSET(PTE_BASE) && i != ADDR_TO_PDE_OFFSET(HYPERSPACE) && 0 == MmGlobalKernelPageDirectory[i] && 0 != CurrentPageDirectory[i]) { diff --git a/reactos/ntoskrnl/mm/powerpc/page.c b/reactos/ntoskrnl/mm/powerpc/page.c index 2d3db202e26..fb646fbb184 100644 --- a/reactos/ntoskrnl/mm/powerpc/page.c +++ b/reactos/ntoskrnl/mm/powerpc/page.c @@ -445,37 +445,6 @@ MmSetPageProtect(PEPROCESS Process, PVOID Address, ULONG flProtect) #endif } -PVOID -NTAPI -MmCreateHyperspaceMapping(PFN_NUMBER Page) -{ - PVOID Address; - ppc_map_info_t info = { 0 }; - - Address = (PVOID)((ULONG_PTR)HYPERSPACE * PAGE_SIZE); - info.proc = 0; - info.addr = (vaddr_t)Address; - info.flags = MMU_KRW; - MmuMapPage(&info, 1); - - return Address; -} - -PFN_NUMBER -NTAPI -MmDeleteHyperspaceMapping(PVOID Address) -{ - ppc_map_info_t info = { 0 }; - ASSERT (IS_HYPERSPACE(Address)); - - info.proc = 0; - info.addr = (vaddr_t)Address; - - MmuUnmapPage(&info, 1); - - return (PFN_NUMBER)info.phys; -} - VOID INIT_FUNCTION NTAPI -- 2.17.1