From f1bf14da620fcedb40a1517dfdcd96fa567ed9b1 Mon Sep 17 00:00:00 2001 From: Aleksandar Andrejevic Date: Mon, 11 May 2015 02:49:25 +0000 Subject: [PATCH] [FAST486] Don't perform privilege checks while reading the IDT, GDT or TSS. svn path=/trunk/; revision=67648 --- reactos/lib/fast486/common.c | 39 ++++++++++++++++++++++------------ reactos/lib/fast486/common.inl | 19 +++++++++++------ reactos/lib/fast486/opgroups.c | 3 ++- 3 files changed, 39 insertions(+), 22 deletions(-) diff --git a/reactos/lib/fast486/common.c b/reactos/lib/fast486/common.c index 36c69d457d2..6e499afbc4b 100644 --- a/reactos/lib/fast486/common.c +++ b/reactos/lib/fast486/common.c @@ -123,7 +123,7 @@ Fast486ReadMemory(PFAST486_STATE State, { /* We can't prefetch without possibly violating page permissions */ State->PrefetchValid = FALSE; - return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size); + return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size, TRUE); } } @@ -131,7 +131,8 @@ Fast486ReadMemory(PFAST486_STATE State, if (Fast486ReadLinearMemory(State, State->PrefetchAddress, State->PrefetchCache, - FAST486_CACHE_SIZE)) + FAST486_CACHE_SIZE, + TRUE)) { State->PrefetchValid = TRUE; @@ -150,7 +151,7 @@ Fast486ReadMemory(PFAST486_STATE State, #endif { /* Read from the linear address */ - return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size); + return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size, TRUE); } } @@ -236,7 +237,7 @@ Fast486WriteMemory(PFAST486_STATE State, #endif /* Write to the linear address */ - return Fast486WriteLinearMemory(State, LinearAddress, Buffer, Size); + return Fast486WriteLinearMemory(State, LinearAddress, Buffer, Size, TRUE); } static inline BOOLEAN @@ -253,7 +254,8 @@ Fast486GetIntVector(PFAST486_STATE State, State->Idtr.Address + Number * sizeof(*IdtEntry), IdtEntry, - sizeof(*IdtEntry))) + sizeof(*IdtEntry), + FALSE)) { /* Exception occurred */ return FALSE; @@ -325,7 +327,8 @@ Fast486InterruptInternal(PFAST486_STATE State, State->TaskReg.Base, &Tss, State->TaskReg.Limit >= sizeof(FAST486_TSS) - ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS))) + ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS), + FALSE)) { /* Exception occurred */ return FALSE; @@ -622,7 +625,8 @@ Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Se State->TaskReg.Base, &OldTss, State->TaskReg.Limit >= sizeof(FAST486_TSS) - ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS))) + ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS), + FALSE)) { /* Exception occurred */ return FALSE; @@ -649,7 +653,8 @@ Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Se if (!Fast486ReadLinearMemory(State, State->Gdtr.Address + GET_SEGMENT_INDEX(Selector), &NewTssDescriptor, - sizeof(NewTssDescriptor))) + sizeof(NewTssDescriptor), + FALSE)) { /* Exception occurred */ return FALSE; @@ -703,7 +708,8 @@ Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Se NewTssAddress, &NewTss, NewTssLimit >= sizeof(FAST486_TSS) - ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS))) + ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS), + FALSE)) { /* Exception occurred */ return FALSE; @@ -718,7 +724,8 @@ Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Se State->Gdtr.Address + GET_SEGMENT_INDEX(State->TaskReg.Selector), &OldTssDescriptor, - sizeof(OldTssDescriptor))) + sizeof(OldTssDescriptor), + FALSE)) { /* Exception occurred */ return FALSE; @@ -730,7 +737,8 @@ Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Se State->Gdtr.Address + GET_SEGMENT_INDEX(State->TaskReg.Selector), &OldTssDescriptor, - sizeof(OldTssDescriptor))) + sizeof(OldTssDescriptor), + FALSE)) { /* Exception occurred */ return FALSE; @@ -789,7 +797,8 @@ Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Se State->TaskReg.Base, &OldTss, State->TaskReg.Limit >= sizeof(FAST486_TSS) - ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS))) + ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS), + FALSE)) { /* Exception occurred */ return FALSE; @@ -802,7 +811,8 @@ Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Se if (!Fast486WriteLinearMemory(State, State->Gdtr.Address + GET_SEGMENT_INDEX(Selector), &NewTssDescriptor, - sizeof(NewTssDescriptor))) + sizeof(NewTssDescriptor), + FALSE)) { /* Exception occurred */ return FALSE; @@ -1041,7 +1051,8 @@ Fast486CallGate(PFAST486_STATE State, State->TaskReg.Base, &Tss, State->TaskReg.Limit >= sizeof(FAST486_TSS) - ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS))) + ? sizeof(FAST486_TSS) : sizeof(FAST486_LEGACY_TSS), + FALSE)) { /* Exception occurred */ return FALSE; diff --git a/reactos/lib/fast486/common.inl b/reactos/lib/fast486/common.inl index fed138650f8..3fd2a4efcba 100644 --- a/reactos/lib/fast486/common.inl +++ b/reactos/lib/fast486/common.inl @@ -150,7 +150,8 @@ FASTCALL Fast486ReadLinearMemory(PFAST486_STATE State, ULONG LinearAddress, PVOID Buffer, - ULONG Size) + ULONG Size, + BOOLEAN CheckPrivilege) { /* Check if paging is enabled */ if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PG) @@ -177,7 +178,7 @@ Fast486ReadLinearMemory(PFAST486_STATE State, PageLength -= PageOffset; } - if (!TableEntry.Present || (!TableEntry.Usermode && (Cpl > 0))) + if (CheckPrivilege && (!TableEntry.Present || (!TableEntry.Usermode && (Cpl > 0)))) { State->ControlRegisters[FAST486_REG_CR2] = Page + PageOffset; @@ -219,7 +220,8 @@ FASTCALL Fast486WriteLinearMemory(PFAST486_STATE State, ULONG LinearAddress, PVOID Buffer, - ULONG Size) + ULONG Size, + BOOLEAN CheckPrivilege) { /* Check if paging is enabled */ if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PG) @@ -246,9 +248,10 @@ Fast486WriteLinearMemory(PFAST486_STATE State, PageLength -= PageOffset; } - if ((!TableEntry.Present || (!TableEntry.Usermode && (Cpl > 0))) + if (CheckPrivilege + && ((!TableEntry.Present || (!TableEntry.Usermode && (Cpl > 0))) || ((State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_WP) - && !TableEntry.Writeable)) + && !TableEntry.Writeable))) { State->ControlRegisters[FAST486_REG_CR2] = Page + PageOffset; @@ -503,7 +506,8 @@ Fast486ReadDescriptorEntry(PFAST486_STATE State, State->Gdtr.Address + GET_SEGMENT_INDEX(Selector), Entry, - sizeof(*Entry))) + sizeof(*Entry), + FALSE)) { /* Exception occurred */ *EntryValid = FALSE; @@ -524,7 +528,8 @@ Fast486ReadDescriptorEntry(PFAST486_STATE State, State->Ldtr.Base + GET_SEGMENT_INDEX(Selector), Entry, - sizeof(*Entry))) + sizeof(*Entry), + FALSE)) { /* Exception occurred */ *EntryValid = FALSE; diff --git a/reactos/lib/fast486/opgroups.c b/reactos/lib/fast486/opgroups.c index a6112735d6a..f540904481c 100644 --- a/reactos/lib/fast486/opgroups.c +++ b/reactos/lib/fast486/opgroups.c @@ -1979,7 +1979,8 @@ FAST486_OPCODE_HANDLER(Fast486ExtOpcodeGroup0F00) Fast486WriteLinearMemory(State, State->Gdtr.Address + GET_SEGMENT_INDEX(Selector), &GdtEntry, - sizeof(GdtEntry)); + sizeof(GdtEntry), + FALSE /* We already made sure CPL is 0 */); } break; -- 2.17.1