Can't sleep so write more source codes! add scan bus functions to get power caps...
authorevb <evb@svn.reactos.org>
Sun, 18 Jul 2010 18:58:33 +0000 (18:58 +0000)
committerevb <evb@svn.reactos.org>
Sun, 18 Jul 2010 18:58:33 +0000 (18:58 +0000)
commit8091e98e96e3be0cf7cf545e9e49f62ce90571f3
treecda7ebe09ca61aec519aa6ff47381c57f3249c20
parenta6017cd9b2f5a39d7befd81b791c95ba0a4191c1
Can't sleep so write more source codes! add scan bus functions to get power caps (PciGetEnhancedCapabilities) and AGP caps, use PciReadDeviceCapability util function, now can get wake levels, PCI power state plus target AGP ID. Now can find PCI Device that can't sleep neither! Ha-ha!
Support PCI_HACK_NO_PM_CAPS, PCI_HACK_PRESERVE_COMMAND, PCI_HACK_DONT_DISABLE_DECOES
Add scan bus function to set power for PCI, for now to power up (PciSetPowerManagedDevicePowerState), with support for device that is critical/broken (PciCanDisableDecodes)
Check spec-correct with PciStallForPowerChange after define PciPowerDelayTable for D0<->D3 crossmatrix spec timings (add PciReadDeviceConfig for support)
If bad spec timing use PCI verifier support (PciVerifierRetrieveFailureData) + STATUS_DEVICE_PROTOCOL_ERROR
Add PciVerifierFailureTable with all failure type
Almost the time for resource discovery of BARs!

svn path=/trunk/; revision=48107
reactos/drivers/bus/pcix/enum.c
reactos/drivers/bus/pcix/pci.h
reactos/drivers/bus/pcix/pci/config.c
reactos/drivers/bus/pcix/pcivrify.c
reactos/drivers/bus/pcix/power.c
reactos/drivers/bus/pcix/utils.c