drivers/base/kdrosdbg/arm/kdbg.c

   1 /*
   2  * PROJECT:         ReactOS Kernel
   3  * LICENSE:         BSD - See COPYING.ARM in the top level directory
   4  * FILE:            drivers/base/kdcom/arm/kdbg.c
   5  * PURPOSE:         Serial Port Kernel Debugging Transport Library
   6  * PROGRAMMERS:     ReactOS Portable Systems Group
   7  */
   8
   9 /* INCLUDES *******************************************************************/
  10
  11 #define NOEXTAPI
  12 #include <ntifs.h>
  13 #include <halfuncs.h>
  14 #include <stdio.h>
  15 #include <arc/arc.h>
  16 #include <windbgkd.h>
  17 #include <kddll.h>
  18 #include <ioaccess.h>
  19 #include <arm/peripherals/pl011.h>
  20
  21 #define NDEBUG
  22 #include <debug.h>
  23
  24 /* GLOBALS ********************************************************************/
  25
  26 typedef struct _KD_PORT_INFORMATION
  27 {
  28     ULONG ComPort;
  29     ULONG BaudRate;
  30     ULONG BaseAddress;
  31 } KD_PORT_INFORMATION, *PKD_PORT_INFORMATION;
  32
  33 KD_PORT_INFORMATION DefaultPort = {0, 0, 0};
  34
  35 //
  36 // We need to build this in the configuration root and use KeFindConfigurationEntry
  37 // to recover it later.
  38 //
  39 #define HACK 24000000
  40
  41 /* REACTOS FUNCTIONS **********************************************************/
  42
  43 BOOLEAN
  44 NTAPI
  45 KdPortInitializeEx(IN PKD_PORT_INFORMATION PortInformation,
  46                    IN ULONG Unknown1,
  47                    IN ULONG Unknown2)
  48 {
  49     ULONG Divider, Remainder, Fraction;
  50     ULONG Baudrate = PortInformation->BaudRate;
  51
  52     //
  53     // Calculate baudrate clock divider and remainder
  54     //
  55     Divider   = HACK / (16 * Baudrate);
  56     Remainder = HACK % (16 * Baudrate);
  57
  58     //
  59     // Calculate the fractional part
  60     //
  61     Fraction  = (8 * Remainder / Baudrate) >> 1;
  62     Fraction += (8 * Remainder / Baudrate) & 1;
  63
  64     //
  65     // Disable interrupts
  66     //
  67     WRITE_REGISTER_ULONG(UART_PL011_CR, 0);
  68
  69     //
  70     // Set the baud rate
  71     //
  72     WRITE_REGISTER_ULONG(UART_PL011_IBRD, Divider);
  73     WRITE_REGISTER_ULONG(UART_PL011_FBRD, Fraction);
  74
  75     //
  76     // Set 8 bits for data, 1 stop bit, no parity, FIFO enabled
  77     //
  78     WRITE_REGISTER_ULONG(UART_PL011_LCRH,
  79                          UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN);
  80
  81     //
  82     // Clear and enable FIFO
  83     //
  84     WRITE_REGISTER_ULONG(UART_PL011_CR,
  85                          UART_PL011_CR_UARTEN |
  86                          UART_PL011_CR_TXE |
  87                          UART_PL011_CR_RXE);
  88
  89     //
  90     // Done
  91     //
  92     return TRUE;
  93 }
  94
  95 BOOLEAN
  96 NTAPI
  97 KdPortGetByteEx(IN PKD_PORT_INFORMATION PortInformation,
  98                 OUT PUCHAR ByteReceived)
  99 {
 100     UNIMPLEMENTED;
 101     while (TRUE);
 102     return FALSE;
 103 }
 104
 105 VOID
 106 NTAPI
 107 KdPortPutByteEx(IN PKD_PORT_INFORMATION PortInformation,
 108                 IN UCHAR ByteToSend)
 109 {
 110     //
 111     // Wait for ready
 112     //
 113     while ((READ_REGISTER_ULONG(UART_PL01x_FR) & UART_PL01x_FR_TXFF) != 0);
 114
 115     //
 116     // Send the character
 117     //
 118     WRITE_REGISTER_ULONG(UART_PL01x_DR, ByteToSend);
 119 }
 120
 121 /* EOF */