reactos/ntoskrnl/mm/ARM3/miarm.h

   1 /*
   2  * PROJECT:         ReactOS Kernel
   3  * LICENSE:         BSD - See COPYING.ARM in the top level directory
   4  * FILE:            ntoskrnl/mm/ARM3/miarm.h
   5  * PURPOSE:         ARM Memory Manager Header
   6  * PROGRAMMERS:     ReactOS Portable Systems Group
   7  */
   8
   9 #define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255*1024*1024) >> PAGE_SHIFT)
  10 #define MI_MIN_PAGES_FOR_SYSPTE_TUNING         ((19*1024*1024) >> PAGE_SHIFT)
  11 #define MI_MIN_PAGES_FOR_SYSPTE_BOOST          ((32*1024*1024) >> PAGE_SHIFT)
  12 #define MI_MAX_INIT_NONPAGED_POOL_SIZE         (128 * 1024 * 1024)
  13 #define MI_MAX_NONPAGED_POOL_SIZE              (128 * 1024 * 1024)
  14 #define MI_MAX_FREE_PAGE_LISTS                 4
  15
  16 #define MI_MIN_INIT_PAGED_POOLSIZE             (32 * 1024 * 1024)
  17
  18 #define MI_SESSION_VIEW_SIZE                   (20 * 1024 * 1024)
  19 #define MI_SESSION_POOL_SIZE                   (16 * 1024 * 1024)
  20 #define MI_SESSION_IMAGE_SIZE                  (8 * 1024 * 1024)
  21 #define MI_SESSION_WORKING_SET_SIZE            (4 * 1024 * 1024)
  22 #define MI_SESSION_SIZE                        (MI_SESSION_VIEW_SIZE + \
  23                                                 MI_SESSION_POOL_SIZE + \
  24                                                 MI_SESSION_IMAGE_SIZE + \
  25                                                 MI_SESSION_WORKING_SET_SIZE)
  26
  27 #define MI_SYSTEM_VIEW_SIZE                    (16 * 1024 * 1024)
  28
  29 #define MI_SYSTEM_CACHE_WS_START               (PVOID)0xC0C00000
  30 #define MI_PAGED_POOL_START                    (PVOID)0xE1000000
  31 #define MI_NONPAGED_POOL_END                   (PVOID)0xFFBE0000
  32 #define MI_DEBUG_MAPPING                       (PVOID)0xFFBFF000
  33
  34 #define MI_MIN_SECONDARY_COLORS                 8
  35 #define MI_SECONDARY_COLORS                     64
  36 #define MI_MAX_SECONDARY_COLORS                 1024
  37
  38 #define MM_HIGHEST_VAD_ADDRESS \
  39     (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE))
  40
  41 /* Make the code cleaner with some definitions for size multiples */
  42 #define _1KB (1024)
  43 #define _1MB (1024 * _1KB)
  44
  45 /* Area mapped by a PDE */
  46 #define PDE_MAPPED_VA   (PTE_COUNT * PAGE_SIZE)
  47
  48 /* Size of a PDE directory, and size of a page table */
  49 #define PDE_SIZE (PDE_COUNT * sizeof(MMPDE))
  50 #define PT_SIZE  (PTE_COUNT * sizeof(MMPTE))
  51
  52 /* Architecture specific count of PDEs in a directory, and count of PTEs in a PT */
  53 #ifdef _M_IX86
  54 #define PD_COUNT  1
  55 #define PDE_COUNT 1024
  56 #define PTE_COUNT 1024
  57 #elif _M_ARM
  58 #define PD_COUNT  1
  59 #define PDE_COUNT 4096
  60 #define PTE_COUNT 256
  61 #else
  62 #error Define these please!
  63 #endif
  64
  65 #ifdef _M_IX86
  66 #define IMAGE_FILE_MACHINE_NATIVE   IMAGE_FILE_MACHINE_I386
  67 #elif _M_ARM
  68 #define IMAGE_FILE_MACHINE_NATIVE   IMAGE_FILE_MACHINE_ARM
  69 #elif _M_AMD64
  70 #define IMAGE_FILE_MACHINE_NATIVE   IMAGE_FILE_MACHINE_AMD64
  71 #else
  72 #error Define these please!
  73 #endif
  74
  75 //
  76 // Protection Bits part of the internal memory manager Protection Mask
  77 // Taken from http://www.reactos.org/wiki/Techwiki:Memory_management_in_the_Windows_XP_kernel
  78 // and public assertions.
  79 //
  80 #define MM_ZERO_ACCESS         0
  81 #define MM_READONLY            1
  82 #define MM_EXECUTE             2
  83 #define MM_EXECUTE_READ        3
  84 #define MM_READWRITE           4
  85 #define MM_WRITECOPY           5
  86 #define MM_EXECUTE_READWRITE   6
  87 #define MM_EXECUTE_WRITECOPY   7
  88 #define MM_NOCACHE             8
  89 #define MM_DECOMMIT            0x10
  90 #define MM_NOACCESS            (MM_DECOMMIT | MM_NOCACHE)
  91
  92 //
  93 // Specific PTE Definitions that map to the Memory Manager's Protection Mask Bits
  94 // The Memory Manager's definition define the attributes that must be preserved
  95 // and these PTE definitions describe the attributes in the hardware sense. This
  96 // helps deal with hardware differences between the actual boolean expression of
  97 // the argument.
  98 //
  99 // For example, in the logical attributes, we want to express read-only as a flag
 100 // but on x86, it is writability that must be set. On the other hand, on x86, just
 101 // like in the kernel, it is disabling the caches that requires a special flag,
 102 // while on certain architectures such as ARM, it is enabling the cache which
 103 // requires a flag.
 104 //
 105 #if defined(_M_IX86) || defined(_M_AMD64)
 106 //
 107 // Access Flags
 108 //
 109 #define PTE_READONLY            0
 110 #define PTE_EXECUTE             0 // Not worrying about NX yet
 111 #define PTE_EXECUTE_READ        0 // Not worrying about NX yet
 112 #define PTE_READWRITE           0x2
 113 #define PTE_WRITECOPY           0x200
 114 #define PTE_EXECUTE_READWRITE   0x0
 115 #define PTE_EXECUTE_WRITECOPY   0x200
 116 //
 117 // Cache flags
 118 //
 119 #define PTE_ENABLE_CACHE        0
 120 #define PTE_DISABLE_CACHE       0x10
 121 #define PTE_WRITECOMBINED_CACHE 0x10
 122 #elif defined(_M_ARM)
 123 #else
 124 #error Define these please!
 125 #endif
 126 static const
 127 ULONG
 128 MmProtectToPteMask[32] =
 129 {
 130     //
 131     // These are the base MM_ protection flags
 132     //
 133     0,
 134     PTE_READONLY            | PTE_ENABLE_CACHE,
 135     PTE_EXECUTE             | PTE_ENABLE_CACHE,
 136     PTE_EXECUTE_READ        | PTE_ENABLE_CACHE,
 137     PTE_READWRITE           | PTE_ENABLE_CACHE,
 138     PTE_WRITECOPY           | PTE_ENABLE_CACHE,
 139     PTE_EXECUTE_READWRITE   | PTE_ENABLE_CACHE,
 140     PTE_EXECUTE_WRITECOPY   | PTE_ENABLE_CACHE,
 141     //
 142     // These OR in the MM_NOCACHE flag
 143     //
 144     0,
 145     PTE_READONLY            | PTE_DISABLE_CACHE,
 146     PTE_EXECUTE             | PTE_DISABLE_CACHE,
 147     PTE_EXECUTE_READ        | PTE_DISABLE_CACHE,
 148     PTE_READWRITE           | PTE_DISABLE_CACHE,
 149     PTE_WRITECOPY           | PTE_DISABLE_CACHE,
 150     PTE_EXECUTE_READWRITE   | PTE_DISABLE_CACHE,
 151     PTE_EXECUTE_WRITECOPY   | PTE_DISABLE_CACHE,
 152     //
 153     // These OR in the MM_DECOMMIT flag, which doesn't seem supported on x86/64/ARM
 154     //
 155     0,
 156     PTE_READONLY            | PTE_ENABLE_CACHE,
 157     PTE_EXECUTE             | PTE_ENABLE_CACHE,
 158     PTE_EXECUTE_READ        | PTE_ENABLE_CACHE,
 159     PTE_READWRITE           | PTE_ENABLE_CACHE,
 160     PTE_WRITECOPY           | PTE_ENABLE_CACHE,
 161     PTE_EXECUTE_READWRITE   | PTE_ENABLE_CACHE,
 162     PTE_EXECUTE_WRITECOPY   | PTE_ENABLE_CACHE,
 163     //
 164     // These OR in the MM_NOACCESS flag, which seems to enable WriteCombining?
 165     //
 166     0,
 167     PTE_READONLY            | PTE_WRITECOMBINED_CACHE,
 168     PTE_EXECUTE             | PTE_WRITECOMBINED_CACHE,
 169     PTE_EXECUTE_READ        | PTE_WRITECOMBINED_CACHE,
 170     PTE_READWRITE           | PTE_WRITECOMBINED_CACHE,
 171     PTE_WRITECOPY           | PTE_WRITECOMBINED_CACHE,
 172     PTE_EXECUTE_READWRITE   | PTE_WRITECOMBINED_CACHE,
 173     PTE_EXECUTE_WRITECOPY   | PTE_WRITECOMBINED_CACHE,
 174 };
 175
 176 //
 177 // Assertions for session images, addresses, and PTEs
 178 //
 179 #define MI_IS_SESSION_IMAGE_ADDRESS(Address) \
 180     (((Address) >= MiSessionImageStart) && ((Address) < MiSessionImageEnd))
 181
 182 #define MI_IS_SESSION_ADDRESS(Address) \
 183     (((Address) >= MmSessionBase) && ((Address) < MiSessionSpaceEnd))
 184
 185 #define MI_IS_SESSION_PTE(Pte) \
 186     ((((PMMPTE)Pte) >= MiSessionBasePte) && (((PMMPTE)Pte) < MiSessionLastPte))
 187
 188 //
 189 // Corresponds to MMPTE_SOFTWARE.Protection
 190 //
 191 #ifdef _M_IX86
 192 #define MM_PTE_SOFTWARE_PROTECTION_BITS   5
 193 #elif _M_ARM
 194 #define MM_PTE_SOFTWARE_PROTECTION_BITS   5
 195 #elif _M_AMD64
 196 #define MM_PTE_SOFTWARE_PROTECTION_BITS   5
 197 #else
 198 #error Define these please!
 199 #endif
 200
 201 //
 202 // Creates a software PTE with the given protection
 203 //
 204 #define MI_MAKE_SOFTWARE_PTE(p, x)          ((p)->u.Long = (x << MM_PTE_SOFTWARE_PROTECTION_BITS))
 205
 206 //
 207 // Marks a PTE as deleted
 208 //
 209 #define MI_SET_PFN_DELETED(x)               ((x)->PteAddress = (PMMPTE)((ULONG_PTR)(x)->PteAddress | 1))
 210 #define MI_IS_PFN_DELETED(x)                ((ULONG_PTR)((x)->PteAddress) & 1)
 211
 212 //
 213 // Special values for LoadedImports
 214 //
 215 #define MM_SYSLDR_NO_IMPORTS   (PVOID)0xFFFFFFFE
 216 #define MM_SYSLDR_BOOT_LOADED  (PVOID)0xFFFFFFFF
 217 #define MM_SYSLDR_SINGLE_ENTRY 0x1
 218
 219 //
 220 // PFN List Sentinel
 221 //
 222 #define LIST_HEAD 0xFFFFFFFF
 223
 224 //
 225 // Special IRQL value (found in assertions)
 226 //
 227 #define MM_NOIRQL (KIRQL)0xFFFFFFFF
 228
 229 //
 230 // FIXFIX: These should go in ex.h after the pool merge
 231 //
 232 #ifdef _M_AMD64
 233 #define POOL_BLOCK_SIZE 16
 234 #else
 235 #define POOL_BLOCK_SIZE  8
 236 #endif
 237 #define POOL_LISTS_PER_PAGE (PAGE_SIZE / POOL_BLOCK_SIZE)
 238 #define BASE_POOL_TYPE_MASK 1
 239 #define POOL_MAX_ALLOC (PAGE_SIZE - (sizeof(POOL_HEADER) + POOL_BLOCK_SIZE))
 240
 241 typedef struct _POOL_DESCRIPTOR
 242 {
 243     POOL_TYPE PoolType;
 244     ULONG PoolIndex;
 245     ULONG RunningAllocs;
 246     ULONG RunningDeAllocs;
 247     ULONG TotalPages;
 248     ULONG TotalBigPages;
 249     ULONG Threshold;
 250     PVOID LockAddress;
 251     PVOID PendingFrees;
 252     LONG PendingFreeDepth;
 253     SIZE_T TotalBytes;
 254     SIZE_T Spare0;
 255     LIST_ENTRY ListHeads[POOL_LISTS_PER_PAGE];
 256 } POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
 257
 258 typedef struct _POOL_HEADER
 259 {
 260     union
 261     {
 262         struct
 263         {
 264 #ifdef _M_AMD64
 265             ULONG PreviousSize:8;
 266             ULONG PoolIndex:8;
 267             ULONG BlockSize:8;
 268             ULONG PoolType:8;
 269 #else
 270             USHORT PreviousSize:9;
 271             USHORT PoolIndex:7;
 272             USHORT BlockSize:9;
 273             USHORT PoolType:7;
 274 #endif
 275         };
 276         ULONG Ulong1;
 277     };
 278 #ifdef _M_AMD64
 279     ULONG PoolTag;
 280 #endif
 281     union
 282     {
 283 #ifdef _M_AMD64
 284         PEPROCESS ProcessBilled;
 285 #else
 286         ULONG PoolTag;
 287 #endif
 288         struct
 289         {
 290             USHORT AllocatorBackTraceIndex;
 291             USHORT PoolTagHash;
 292         };
 293     };
 294 } POOL_HEADER, *PPOOL_HEADER;
 295
 296 C_ASSERT(sizeof(POOL_HEADER) == POOL_BLOCK_SIZE);
 297 C_ASSERT(POOL_BLOCK_SIZE == sizeof(LIST_ENTRY));
 298
 299 extern ULONG ExpNumberOfPagedPools;
 300 extern POOL_DESCRIPTOR NonPagedPoolDescriptor;
 301 extern PPOOL_DESCRIPTOR ExpPagedPoolDescriptor[16 + 1];
 302 extern PVOID PoolTrackTable;
 303
 304 //
 305 // END FIXFIX
 306 //
 307
 308 typedef struct _MI_LARGE_PAGE_DRIVER_ENTRY
 309 {
 310     LIST_ENTRY Links;
 311     UNICODE_STRING BaseName;
 312 } MI_LARGE_PAGE_DRIVER_ENTRY, *PMI_LARGE_PAGE_DRIVER_ENTRY;
 313
 314 typedef enum _MMSYSTEM_PTE_POOL_TYPE
 315 {
 316     SystemPteSpace,
 317     NonPagedPoolExpansion,
 318     MaximumPtePoolTypes
 319 } MMSYSTEM_PTE_POOL_TYPE;
 320
 321 typedef enum _MI_PFN_CACHE_ATTRIBUTE
 322 {
 323     MiNonCached,
 324     MiCached,
 325     MiWriteCombined,
 326     MiNotMapped
 327 } MI_PFN_CACHE_ATTRIBUTE, *PMI_PFN_CACHE_ATTRIBUTE;
 328
 329 typedef struct _PHYSICAL_MEMORY_RUN
 330 {
 331     ULONG BasePage;
 332     ULONG PageCount;
 333 } PHYSICAL_MEMORY_RUN, *PPHYSICAL_MEMORY_RUN;
 334
 335 typedef struct _PHYSICAL_MEMORY_DESCRIPTOR
 336 {
 337     ULONG NumberOfRuns;
 338     ULONG NumberOfPages;
 339     PHYSICAL_MEMORY_RUN Run[1];
 340 } PHYSICAL_MEMORY_DESCRIPTOR, *PPHYSICAL_MEMORY_DESCRIPTOR;
 341
 342 typedef struct _MMCOLOR_TABLES
 343 {
 344     PFN_NUMBER Flink;
 345     PVOID Blink;
 346     PFN_NUMBER Count;
 347 } MMCOLOR_TABLES, *PMMCOLOR_TABLES;
 348
 349 typedef struct _MI_LARGE_PAGE_RANGES
 350 {
 351     PFN_NUMBER StartFrame;
 352     PFN_NUMBER LastFrame;
 353 } MI_LARGE_PAGE_RANGES, *PMI_LARGE_PAGE_RANGES;
 354
 355 extern MMPTE HyperTemplatePte;
 356 extern MMPTE ValidKernelPde;
 357 extern MMPTE ValidKernelPte;
 358 extern BOOLEAN MmLargeSystemCache;
 359 extern BOOLEAN MmZeroPageFile;
 360 extern BOOLEAN MmProtectFreedNonPagedPool;
 361 extern BOOLEAN MmTrackLockedPages;
 362 extern BOOLEAN MmTrackPtes;
 363 extern BOOLEAN MmDynamicPfn;
 364 extern BOOLEAN MmMirroring;
 365 extern BOOLEAN MmMakeLowMemory;
 366 extern BOOLEAN MmEnforceWriteProtection;
 367 extern ULONG MmAllocationFragment;
 368 extern ULONG MmConsumedPoolPercentage;
 369 extern ULONG MmVerifyDriverBufferType;
 370 extern ULONG MmVerifyDriverLevel;
 371 extern WCHAR MmVerifyDriverBuffer[512];
 372 extern WCHAR MmLargePageDriverBuffer[512];
 373 extern LIST_ENTRY MiLargePageDriverList;
 374 extern BOOLEAN MiLargePageAllDrivers;
 375 extern ULONG MmVerifyDriverBufferLength;
 376 extern ULONG MmLargePageDriverBufferLength;
 377 extern ULONG MmSizeOfNonPagedPoolInBytes;
 378 extern ULONG MmMaximumNonPagedPoolInBytes;
 379 extern PFN_NUMBER MmMaximumNonPagedPoolInPages;
 380 extern PFN_NUMBER MmSizeOfPagedPoolInPages;
 381 extern PVOID MmNonPagedSystemStart;
 382 extern PVOID MmNonPagedPoolStart;
 383 extern PVOID MmNonPagedPoolExpansionStart;
 384 extern PVOID MmNonPagedPoolEnd;
 385 extern ULONG MmSizeOfPagedPoolInBytes;
 386 extern PVOID MmPagedPoolStart;
 387 extern PVOID MmPagedPoolEnd;
 388 extern PVOID MmSessionBase;
 389 extern ULONG MmSessionSize;
 390 extern PMMPTE MmFirstReservedMappingPte, MmLastReservedMappingPte;
 391 extern PMMPTE MiFirstReservedZeroingPte;
 392 extern MI_PFN_CACHE_ATTRIBUTE MiPlatformCacheAttributes[2][MmMaximumCacheType];
 393 extern PPHYSICAL_MEMORY_DESCRIPTOR MmPhysicalMemoryBlock;
 394 extern ULONG MmBootImageSize;
 395 extern PMMPTE MmSystemPtesStart[MaximumPtePoolTypes];
 396 extern PMMPTE MmSystemPtesEnd[MaximumPtePoolTypes];
 397 extern PMEMORY_ALLOCATION_DESCRIPTOR MxFreeDescriptor;
 398 extern MEMORY_ALLOCATION_DESCRIPTOR MxOldFreeDescriptor;
 399 extern ULONG MxPfnAllocation;
 400 extern MM_PAGED_POOL_INFO MmPagedPoolInfo;
 401 extern RTL_BITMAP MiPfnBitMap;
 402 extern KGUARDED_MUTEX MmPagedPoolMutex;
 403 extern PVOID MmPagedPoolStart;
 404 extern PVOID MmPagedPoolEnd;
 405 extern PVOID MmNonPagedSystemStart;
 406 extern PVOID MiSystemViewStart;
 407 extern ULONG MmSystemViewSize;
 408 extern PVOID MmSessionBase;
 409 extern PVOID MiSessionSpaceEnd;
 410 extern PMMPTE MiSessionImagePteStart;
 411 extern PMMPTE MiSessionImagePteEnd;
 412 extern PMMPTE MiSessionBasePte;
 413 extern PMMPTE MiSessionLastPte;
 414 extern ULONG MmSizeOfPagedPoolInBytes;
 415 extern PMMPTE MmSystemPagePtes;
 416 extern PVOID MmSystemCacheStart;
 417 extern PVOID MmSystemCacheEnd;
 418 extern MMSUPPORT MmSystemCacheWs;
 419 extern SIZE_T MmAllocatedNonPagedPool;
 420 extern ULONG_PTR MmSubsectionBase;
 421 extern ULONG MmSpecialPoolTag;
 422 extern PVOID MmHyperSpaceEnd;
 423 extern PMMWSL MmSystemCacheWorkingSetList;
 424 extern ULONG MmMinimumNonPagedPoolSize;
 425 extern ULONG MmMinAdditionNonPagedPoolPerMb;
 426 extern ULONG MmDefaultMaximumNonPagedPool;
 427 extern ULONG MmMaxAdditionNonPagedPoolPerMb;
 428 extern ULONG MmSecondaryColors;
 429 extern ULONG MmSecondaryColorMask;
 430 extern ULONG MmNumberOfSystemPtes;
 431 extern ULONG MmMaximumNonPagedPoolPercent;
 432 extern ULONG MmLargeStackSize;
 433 extern PMMCOLOR_TABLES MmFreePagesByColor[FreePageList + 1];
 434 extern ULONG MmProductType;
 435 extern MM_SYSTEMSIZE MmSystemSize;
 436 extern PKEVENT MiLowMemoryEvent;
 437 extern PKEVENT MiHighMemoryEvent;
 438 extern PKEVENT MiLowPagedPoolEvent;
 439 extern PKEVENT MiHighPagedPoolEvent;
 440 extern PKEVENT MiLowNonPagedPoolEvent;
 441 extern PKEVENT MiHighNonPagedPoolEvent;
 442 extern PFN_NUMBER MmLowMemoryThreshold;
 443 extern PFN_NUMBER MmHighMemoryThreshold;
 444 extern PFN_NUMBER MiLowPagedPoolThreshold;
 445 extern PFN_NUMBER MiHighPagedPoolThreshold;
 446 extern PFN_NUMBER MiLowNonPagedPoolThreshold;
 447 extern PFN_NUMBER MiHighNonPagedPoolThreshold;
 448 extern PFN_NUMBER MmMinimumFreePages;
 449 extern PFN_NUMBER MmPlentyFreePages;
 450 extern PFN_NUMBER MiExpansionPoolPagesInitialCharge;
 451 extern PFN_NUMBER MmResidentAvailablePages;
 452 extern PFN_NUMBER MmResidentAvailableAtInit;
 453 extern ULONG MmTotalFreeSystemPtes[MaximumPtePoolTypes];
 454 extern PFN_NUMBER MmTotalSystemDriverPages;
 455 extern PVOID MiSessionImageStart;
 456 extern PVOID MiSessionImageEnd;
 457 extern PMMPTE MiHighestUserPte;
 458 extern PMMPDE MiHighestUserPde;
 459 extern PFN_NUMBER MmSystemPageDirectory[PD_COUNT];
 460
 461 #define MI_PFN_TO_PFNENTRY(x)     (&MmPfnDatabase[1][x])
 462 #define MI_PFNENTRY_TO_PFN(x)     (x - MmPfnDatabase[1])
 463
 464 //
 465 // Creates a valid kernel PTE with the given protection
 466 //
 467 FORCEINLINE
 468 VOID
 469 MI_MAKE_HARDWARE_PTE(IN PMMPTE NewPte,
 470                      IN PMMPTE MappingPte,
 471                      IN ULONG ProtectionMask,
 472                      IN PFN_NUMBER PageFrameNumber)
 473 {
 474     /* Only valid for kernel, non-session PTEs */
 475     ASSERT(MappingPte > MiHighestUserPte);
 476     ASSERT(!MI_IS_SESSION_PTE(MappingPte));
 477     ASSERT((MappingPte < (PMMPTE)PDE_BASE) || (MappingPte > (PMMPTE)PDE_TOP));
 478
 479     /* Start fresh */
 480     *NewPte = ValidKernelPte;
 481
 482     /* Set the protection and page */
 483     NewPte->u.Hard.PageFrameNumber = PageFrameNumber;
 484     NewPte->u.Long |= MmProtectToPteMask[ProtectionMask];
 485 }
 486
 487 //
 488 // Returns if the page is physically resident (ie: a large page)
 489 // FIXFIX: CISC/x86 only?
 490 //
 491 FORCEINLINE
 492 BOOLEAN
 493 MI_IS_PHYSICAL_ADDRESS(IN PVOID Address)
 494 {
 495     PMMPDE PointerPde;
 496
 497     /* Large pages are never paged out, always physically resident */
 498     PointerPde = MiAddressToPde(Address);
 499     return ((PointerPde->u.Hard.LargePage) && (PointerPde->u.Hard.Valid));
 500 }
 501
 502 NTSTATUS
 503 NTAPI
 504 MmArmInitSystem(
 505     IN ULONG Phase,
 506     IN PLOADER_PARAMETER_BLOCK LoaderBlock
 507 );
 508
 509 NTSTATUS
 510 NTAPI
 511 MiInitMachineDependent(
 512     IN PLOADER_PARAMETER_BLOCK LoaderBlock
 513 );
 514
 515 VOID
 516 NTAPI
 517 MiComputeColorInformation(
 518     VOID
 519 );
 520
 521 VOID
 522 NTAPI
 523 MiMapPfnDatabase(
 524     IN PLOADER_PARAMETER_BLOCK LoaderBlock
 525 );
 526
 527 VOID
 528 NTAPI
 529 MiInitializeColorTables(
 530     VOID
 531 );
 532
 533 VOID
 534 NTAPI
 535 MiInitializePfnDatabase(
 536     IN PLOADER_PARAMETER_BLOCK LoaderBlock
 537 );
 538
 539 BOOLEAN
 540 NTAPI
 541 MiInitializeMemoryEvents(
 542     VOID
 543 );
 544
 545 PFN_NUMBER
 546 NTAPI
 547 MxGetNextPage(
 548     IN PFN_NUMBER PageCount
 549 );
 550
 551 PPHYSICAL_MEMORY_DESCRIPTOR
 552 NTAPI
 553 MmInitializeMemoryLimits(
 554     IN PLOADER_PARAMETER_BLOCK LoaderBlock,
 555     IN PBOOLEAN IncludeType
 556 );
 557
 558 PFN_NUMBER
 559 NTAPI
 560 MiPagesInLoaderBlock(
 561     IN PLOADER_PARAMETER_BLOCK LoaderBlock,
 562     IN PBOOLEAN IncludeType
 563 );
 564
 565 VOID
 566 FASTCALL
 567 MiSyncARM3WithROS(
 568     IN PVOID AddressStart,
 569     IN PVOID AddressEnd
 570 );
 571
 572 NTSTATUS
 573 NTAPI
 574 MmArmAccessFault(
 575     IN BOOLEAN StoreInstruction,
 576     IN PVOID Address,
 577     IN KPROCESSOR_MODE Mode,
 578     IN PVOID TrapInformation
 579 );
 580
 581 NTSTATUS
 582 FASTCALL
 583 MiCheckPdeForPagedPool(
 584     IN PVOID Address
 585 );
 586
 587 VOID
 588 NTAPI
 589 MiInitializeNonPagedPool(
 590     VOID
 591 );
 592
 593 VOID
 594 NTAPI
 595 MiInitializeNonPagedPoolThresholds(
 596     VOID
 597 );
 598
 599 VOID
 600 NTAPI
 601 MiInitializePoolEvents(
 602     VOID
 603 );
 604
 605 VOID                      //
 606 NTAPI                     //
 607 InitializePool(           //
 608     IN POOL_TYPE PoolType,// FIXFIX: This should go in ex.h after the pool merge
 609     IN ULONG Threshold    //
 610 );                        //
 611
 612 VOID
 613 NTAPI
 614 MiInitializeSystemPtes(
 615     IN PMMPTE StartingPte,
 616     IN ULONG NumberOfPtes,
 617     IN MMSYSTEM_PTE_POOL_TYPE PoolType
 618 );
 619
 620 PMMPTE
 621 NTAPI
 622 MiReserveSystemPtes(
 623     IN ULONG NumberOfPtes,
 624     IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType
 625 );
 626
 627 VOID
 628 NTAPI
 629 MiReleaseSystemPtes(
 630     IN PMMPTE StartingPte,
 631     IN ULONG NumberOfPtes,
 632     IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType
 633 );
 634
 635
 636 PFN_NUMBER
 637 NTAPI
 638 MiFindContiguousPages(
 639     IN PFN_NUMBER LowestPfn,
 640     IN PFN_NUMBER HighestPfn,
 641     IN PFN_NUMBER BoundaryPfn,
 642     IN PFN_NUMBER SizeInPages,
 643     IN MEMORY_CACHING_TYPE CacheType
 644 );
 645
 646 PVOID
 647 NTAPI
 648 MiCheckForContiguousMemory(
 649     IN PVOID BaseAddress,
 650     IN PFN_NUMBER BaseAddressPages,
 651     IN PFN_NUMBER SizeInPages,
 652     IN PFN_NUMBER LowestPfn,
 653     IN PFN_NUMBER HighestPfn,
 654     IN PFN_NUMBER BoundaryPfn,
 655     IN MI_PFN_CACHE_ATTRIBUTE CacheAttribute
 656 );
 657
 658 PMDL
 659 NTAPI
 660 MiAllocatePagesForMdl(
 661     IN PHYSICAL_ADDRESS LowAddress,
 662     IN PHYSICAL_ADDRESS HighAddress,
 663     IN PHYSICAL_ADDRESS SkipBytes,
 664     IN SIZE_T TotalBytes,
 665     IN MI_PFN_CACHE_ATTRIBUTE CacheAttribute,
 666     IN ULONG Flags
 667 );
 668
 669 PVOID
 670 NTAPI
 671 MiMapLockedPagesInUserSpace(
 672     IN PMDL Mdl,
 673     IN PVOID BaseVa,
 674     IN MEMORY_CACHING_TYPE CacheType,
 675     IN PVOID BaseAddress
 676 );
 677
 678 VOID
 679 NTAPI
 680 MiUnmapLockedPagesInUserSpace(
 681     IN PVOID BaseAddress,
 682     IN PMDL Mdl
 683 );
 684
 685 VOID
 686 NTAPI
 687 MiInsertInListTail(
 688     IN PMMPFNLIST ListHead,
 689     IN PMMPFN Entry
 690 );
 691
 692 VOID
 693 NTAPI
 694 MiInsertZeroListAtBack(
 695     IN PFN_NUMBER PageIndex
 696 );
 697
 698 VOID
 699 NTAPI
 700 MiUnlinkFreeOrZeroedPage(
 701     IN PMMPFN Entry
 702 );
 703
 704 PMMPFN
 705 NTAPI
 706 MiRemoveHeadList(
 707     IN PMMPFNLIST ListHead
 708 );
 709
 710 PFN_NUMBER
 711 NTAPI
 712 MiAllocatePfn(
 713     IN PMMPTE PointerPte,
 714     IN ULONG Protection
 715 );
 716
 717 VOID
 718 NTAPI
 719 MiInitializePfn(
 720     IN PFN_NUMBER PageFrameIndex,
 721     IN PMMPTE PointerPte,
 722     IN BOOLEAN Modified
 723 );
 724
 725 VOID
 726 NTAPI
 727 MiInitializePfnForOtherProcess(
 728     IN PFN_NUMBER PageFrameIndex,
 729     IN PMMPTE PointerPte,
 730     IN PFN_NUMBER PteFrame
 731 );
 732
 733 VOID
 734 NTAPI
 735 MiDecrementShareCount(
 736     IN PMMPFN Pfn1,
 737     IN PFN_NUMBER PageFrameIndex
 738 );
 739
 740 PFN_NUMBER
 741 NTAPI
 742 MiRemoveAnyPage(
 743     IN ULONG Color
 744 );
 745
 746 PFN_NUMBER
 747 NTAPI
 748 MiRemoveZeroPage(
 749     IN ULONG Color
 750 );
 751
 752 VOID
 753 NTAPI
 754 MiInsertPageInFreeList(
 755     IN PFN_NUMBER PageFrameIndex
 756 );
 757
 758 PFN_NUMBER
 759 NTAPI
 760 MiDeleteSystemPageableVm(
 761     IN PMMPTE PointerPte,
 762     IN PFN_NUMBER PageCount,
 763     IN ULONG Flags,
 764     OUT PPFN_NUMBER ValidPages
 765 );
 766
 767 PLDR_DATA_TABLE_ENTRY
 768 NTAPI
 769 MiLookupDataTableEntry(
 770     IN PVOID Address
 771 );
 772
 773 VOID
 774 NTAPI
 775 MiInitializeDriverLargePageList(
 776     VOID
 777 );
 778
 779 VOID
 780 NTAPI
 781 MiInitializeLargePageSupport(
 782     VOID
 783 );
 784
 785 VOID
 786 NTAPI
 787 MiSyncCachedRanges(
 788     VOID
 789 );
 790
 791 BOOLEAN
 792 NTAPI
 793 MiIsPfnInUse(
 794     IN PMMPFN Pfn1
 795 );
 796
 797 /* EOF */