2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: ntoskrnl/mm/ARM3/mminit.c
5 * PURPOSE: ARM Memory Manager Initialization
6 * PROGRAMMERS: ReactOS Portable Systems Group
9 /* INCLUDES *******************************************************************/
16 #define MODULE_INVOLVED_IN_ARM3
19 /* GLOBALS ********************************************************************/
22 // These are all registry-configurable, but by default, the memory manager will
23 // figure out the most appropriate values.
25 ULONG MmMaximumNonPagedPoolPercent
;
26 SIZE_T MmSizeOfNonPagedPoolInBytes
;
27 SIZE_T MmMaximumNonPagedPoolInBytes
;
29 /* Some of the same values, in pages */
30 PFN_NUMBER MmMaximumNonPagedPoolInPages
;
33 // These numbers describe the discrete equation components of the nonpaged
34 // pool sizing algorithm.
36 // They are described on http://support.microsoft.com/default.aspx/kb/126402/ja
37 // along with the algorithm that uses them, which is implemented later below.
39 SIZE_T MmMinimumNonPagedPoolSize
= 256 * 1024;
40 ULONG MmMinAdditionNonPagedPoolPerMb
= 32 * 1024;
41 SIZE_T MmDefaultMaximumNonPagedPool
= 1024 * 1024;
42 ULONG MmMaxAdditionNonPagedPoolPerMb
= 400 * 1024;
45 // The memory layout (and especially variable names) of the NT kernel mode
46 // components can be a bit hard to twig, especially when it comes to the non
49 // There are really two components to the non-paged pool:
51 // - The initial nonpaged pool, sized dynamically up to a maximum.
52 // - The expansion nonpaged pool, sized dynamically up to a maximum.
54 // The initial nonpaged pool is physically continuous for performance, and
55 // immediately follows the PFN database, typically sharing the same PDE. It is
56 // a very small resource (32MB on a 1GB system), and capped at 128MB.
58 // Right now we call this the "ARM³ Nonpaged Pool" and it begins somewhere after
59 // the PFN database (which starts at 0xB0000000).
61 // The expansion nonpaged pool, on the other hand, can grow much bigger (400MB
62 // for a 1GB system). On ARM³ however, it is currently capped at 128MB.
64 // The address where the initial nonpaged pool starts is aptly named
65 // MmNonPagedPoolStart, and it describes a range of MmSizeOfNonPagedPoolInBytes
68 // Expansion nonpaged pool starts at an address described by the variable called
69 // MmNonPagedPoolExpansionStart, and it goes on for MmMaximumNonPagedPoolInBytes
70 // minus MmSizeOfNonPagedPoolInBytes bytes, always reaching MmNonPagedPoolEnd
71 // (because of the way it's calculated) at 0xFFBE0000.
73 // Initial nonpaged pool is allocated and mapped early-on during boot, but what
74 // about the expansion nonpaged pool? It is instead composed of special pages
75 // which belong to what are called System PTEs. These PTEs are the matter of a
76 // later discussion, but they are also considered part of the "nonpaged" OS, due
77 // to the fact that they are never paged out -- once an address is described by
78 // a System PTE, it is always valid, until the System PTE is torn down.
80 // System PTEs are actually composed of two "spaces", the system space proper,
81 // and the nonpaged pool expansion space. The latter, as we've already seen,
82 // begins at MmNonPagedPoolExpansionStart. Based on the number of System PTEs
83 // that the system will support, the remaining address space below this address
84 // is used to hold the system space PTEs. This address, in turn, is held in the
85 // variable named MmNonPagedSystemStart, which itself is never allowed to go
86 // below 0xEB000000 (thus creating an upper bound on the number of System PTEs).
88 // This means that 330MB are reserved for total nonpaged system VA, on top of
89 // whatever the initial nonpaged pool allocation is.
91 // The following URLs, valid as of April 23rd, 2008, support this evidence:
93 // http://www.cs.miami.edu/~burt/journal/NT/memory.html
94 // http://www.ditii.com/2007/09/28/windows-memory-management-x86-virtual-address-space/
96 PVOID MmNonPagedSystemStart
;
97 PVOID MmNonPagedPoolStart
;
98 PVOID MmNonPagedPoolExpansionStart
;
99 PVOID MmNonPagedPoolEnd
= MI_NONPAGED_POOL_END
;
102 // This is where paged pool starts by default
104 PVOID MmPagedPoolStart
= MI_PAGED_POOL_START
;
105 PVOID MmPagedPoolEnd
;
108 // And this is its default size
110 SIZE_T MmSizeOfPagedPoolInBytes
= MI_MIN_INIT_PAGED_POOLSIZE
;
111 PFN_NUMBER MmSizeOfPagedPoolInPages
= MI_MIN_INIT_PAGED_POOLSIZE
/ PAGE_SIZE
;
114 // Session space starts at 0xBFFFFFFF and grows downwards
115 // By default, it includes an 8MB image area where we map win32k and video card
116 // drivers, followed by a 4MB area containing the session's working set. This is
117 // then followed by a 20MB mapped view area and finally by the session's paged
118 // pool, by default 16MB.
120 // On a normal system, this results in session space occupying the region from
121 // 0xBD000000 to 0xC0000000
123 // See miarm.h for the defines that determine the sizing of this region. On an
124 // NT system, some of these can be configured through the registry, but we don't
127 PVOID MiSessionSpaceEnd
; // 0xC0000000
128 PVOID MiSessionImageEnd
; // 0xC0000000
129 PVOID MiSessionImageStart
; // 0xBF800000
130 PVOID MiSessionViewStart
; // 0xBE000000
131 PVOID MiSessionPoolEnd
; // 0xBE000000
132 PVOID MiSessionPoolStart
; // 0xBD000000
133 PVOID MmSessionBase
; // 0xBD000000
134 SIZE_T MmSessionSize
;
135 SIZE_T MmSessionViewSize
;
136 SIZE_T MmSessionPoolSize
;
137 SIZE_T MmSessionImageSize
;
140 * These are the PTE addresses of the boundaries carved out above
142 PMMPTE MiSessionImagePteStart
;
143 PMMPTE MiSessionImagePteEnd
;
144 PMMPTE MiSessionBasePte
;
145 PMMPTE MiSessionLastPte
;
148 // The system view space, on the other hand, is where sections that are memory
149 // mapped into "system space" end up.
151 // By default, it is a 16MB region.
153 PVOID MiSystemViewStart
;
154 SIZE_T MmSystemViewSize
;
156 #if (_MI_PAGING_LEVELS == 2)
158 // A copy of the system page directory (the page directory associated with the
159 // System process) is kept (double-mapped) by the manager in order to lazily
160 // map paged pool PDEs into external processes when they fault on a paged pool
163 PFN_NUMBER MmSystemPageDirectory
[PD_COUNT
];
164 PMMPTE MmSystemPagePtes
;
168 // The system cache starts right after hyperspace. The first few pages are for
169 // keeping track of the system working set list.
171 // This should be 0xC0C00000 -- the cache itself starts at 0xC1000000
173 PMMWSL MmSystemCacheWorkingSetList
= MI_SYSTEM_CACHE_WS_START
;
176 // Windows NT seems to choose between 7000, 11000 and 50000
177 // On systems with more than 32MB, this number is then doubled, and further
178 // aligned up to a PDE boundary (4MB).
180 ULONG_PTR MmNumberOfSystemPtes
;
183 // This is how many pages the PFN database will take up
184 // In Windows, this includes the Quark Color Table, but not in ARM³
186 PFN_NUMBER MxPfnAllocation
;
189 // Unlike the old ReactOS Memory Manager, ARM³ (and Windows) does not keep track
190 // of pages that are not actually valid physical memory, such as ACPI reserved
191 // regions, BIOS address ranges, or holes in physical memory address space which
192 // could indicate device-mapped I/O memory.
194 // In fact, the lack of a PFN entry for a page usually indicates that this is
195 // I/O space instead.
197 // A bitmap, called the PFN bitmap, keeps track of all page frames by assigning
198 // a bit to each. If the bit is set, then the page is valid physical RAM.
200 RTL_BITMAP MiPfnBitMap
;
203 // This structure describes the different pieces of RAM-backed address space
205 PPHYSICAL_MEMORY_DESCRIPTOR MmPhysicalMemoryBlock
;
208 // This is where we keep track of the most basic physical layout markers
210 PFN_NUMBER MmNumberOfPhysicalPages
, MmHighestPhysicalPage
, MmLowestPhysicalPage
= -1;
213 // The total number of pages mapped by the boot loader, which include the kernel
214 // HAL, boot drivers, registry, NLS files and other loader data structures is
215 // kept track of here. This depends on "LoaderPagesSpanned" being correct when
216 // coming from the loader.
218 // This number is later aligned up to a PDE boundary.
220 SIZE_T MmBootImageSize
;
223 // These three variables keep track of the core separation of address space that
224 // exists between kernel mode and user mode.
226 ULONG_PTR MmUserProbeAddress
;
227 PVOID MmHighestUserAddress
;
228 PVOID MmSystemRangeStart
;
230 /* And these store the respective highest PTE/PDE address */
231 PMMPTE MiHighestUserPte
;
232 PMMPDE MiHighestUserPde
;
233 #if (_MI_PAGING_LEVELS >= 3)
234 /* We need the highest PPE and PXE addresses */
237 /* These variables define the system cache address space */
238 PVOID MmSystemCacheStart
;
239 PVOID MmSystemCacheEnd
;
240 MMSUPPORT MmSystemCacheWs
;
243 // This is where hyperspace ends (followed by the system cache working set)
245 PVOID MmHyperSpaceEnd
;
248 // Page coloring algorithm data
250 ULONG MmSecondaryColors
;
251 ULONG MmSecondaryColorMask
;
254 // Actual (registry-configurable) size of a GUI thread's stack
256 ULONG MmLargeStackSize
= KERNEL_LARGE_STACK_SIZE
;
259 // Before we have a PFN database, memory comes straight from our physical memory
260 // blocks, which is nice because it's guaranteed contiguous and also because once
261 // we take a page from here, the system doesn't see it anymore.
262 // However, once the fun is over, those pages must be re-integrated back into
263 // PFN society life, and that requires us keeping a copy of the original layout
264 // so that we can parse it later.
266 PMEMORY_ALLOCATION_DESCRIPTOR MxFreeDescriptor
;
267 MEMORY_ALLOCATION_DESCRIPTOR MxOldFreeDescriptor
;
270 * For each page's worth bytes of L2 cache in a given set/way line, the zero and
271 * free lists are organized in what is called a "color".
273 * This array points to the two lists, so it can be thought of as a multi-dimensional
274 * array of MmFreePagesByColor[2][MmSecondaryColors]. Since the number is dynamic,
275 * we describe the array in pointer form instead.
277 * On a final note, the color tables themselves are right after the PFN database.
279 C_ASSERT(FreePageList
== 1);
280 PMMCOLOR_TABLES MmFreePagesByColor
[FreePageList
+ 1];
282 /* An event used in Phase 0 before the rest of the system is ready to go */
285 /* All the events used for memory threshold notifications */
286 PKEVENT MiLowMemoryEvent
;
287 PKEVENT MiHighMemoryEvent
;
288 PKEVENT MiLowPagedPoolEvent
;
289 PKEVENT MiHighPagedPoolEvent
;
290 PKEVENT MiLowNonPagedPoolEvent
;
291 PKEVENT MiHighNonPagedPoolEvent
;
293 /* The actual thresholds themselves, in page numbers */
294 PFN_NUMBER MmLowMemoryThreshold
;
295 PFN_NUMBER MmHighMemoryThreshold
;
296 PFN_NUMBER MiLowPagedPoolThreshold
;
297 PFN_NUMBER MiHighPagedPoolThreshold
;
298 PFN_NUMBER MiLowNonPagedPoolThreshold
;
299 PFN_NUMBER MiHighNonPagedPoolThreshold
;
302 * This number determines how many free pages must exist, at minimum, until we
303 * start trimming working sets and flushing modified pages to obtain more free
306 * This number changes if the system detects that this is a server product
308 PFN_NUMBER MmMinimumFreePages
= 26;
311 * This number indicates how many pages we consider to be a low limit of having
312 * "plenty" of free memory.
314 * It is doubled on systems that have more than 63MB of memory
316 PFN_NUMBER MmPlentyFreePages
= 400;
318 /* These values store the type of system this is (small, med, large) and if server */
320 MM_SYSTEMSIZE MmSystemSize
;
323 * These values store the cache working set minimums and maximums, in pages
325 * The minimum value is boosted on systems with more than 24MB of RAM, and cut
326 * down to only 32 pages on embedded (<24MB RAM) systems.
328 * An extra boost of 2MB is given on systems with more than 33MB of RAM.
330 PFN_NUMBER MmSystemCacheWsMinimum
= 288;
331 PFN_NUMBER MmSystemCacheWsMaximum
= 350;
333 /* FIXME: Move to cache/working set code later */
334 BOOLEAN MmLargeSystemCache
;
337 * This value determines in how many fragments/chunks the subsection prototype
338 * PTEs should be allocated when mapping a section object. It is configurable in
339 * the registry through the MapAllocationFragment parameter.
341 * The default is 64KB on systems with more than 1GB of RAM, 32KB on systems with
342 * more than 256MB of RAM, and 16KB on systems with less than 256MB of RAM.
344 * The maximum it can be set to is 2MB, and the minimum is 4KB.
346 SIZE_T MmAllocationFragment
;
349 * These two values track how much virtual memory can be committed, and when
350 * expansion should happen.
352 // FIXME: They should be moved elsewhere since it's not an "init" setting?
353 SIZE_T MmTotalCommitLimit
;
354 SIZE_T MmTotalCommitLimitMaximum
;
356 /* Internal setting used for debugging memory descriptors */
357 BOOLEAN MiDbgEnableMdDump
=
364 /* PRIVATE FUNCTIONS **********************************************************/
369 MxGetNextPage(IN PFN_NUMBER PageCount
)
373 /* Make sure we have enough pages */
374 if (PageCount
> MxFreeDescriptor
->PageCount
)
376 /* Crash the system */
377 KeBugCheckEx(INSTALL_MORE_MEMORY
,
378 MmNumberOfPhysicalPages
,
379 MxFreeDescriptor
->PageCount
,
380 MxOldFreeDescriptor
.PageCount
,
384 /* Use our lowest usable free pages */
385 Pfn
= MxFreeDescriptor
->BasePage
;
386 MxFreeDescriptor
->BasePage
+= PageCount
;
387 MxFreeDescriptor
->PageCount
-= PageCount
;
394 MiComputeColorInformation(VOID
)
396 ULONG L2Associativity
;
398 /* Check if no setting was provided already */
399 if (!MmSecondaryColors
)
401 /* Get L2 cache information */
402 L2Associativity
= KeGetPcr()->SecondLevelCacheAssociativity
;
404 /* The number of colors is the number of cache bytes by set/way */
405 MmSecondaryColors
= KeGetPcr()->SecondLevelCacheSize
;
406 if (L2Associativity
) MmSecondaryColors
/= L2Associativity
;
409 /* Now convert cache bytes into pages */
410 MmSecondaryColors
>>= PAGE_SHIFT
;
411 if (!MmSecondaryColors
)
413 /* If there was no cache data from the KPCR, use the default colors */
414 MmSecondaryColors
= MI_SECONDARY_COLORS
;
418 /* Otherwise, make sure there aren't too many colors */
419 if (MmSecondaryColors
> MI_MAX_SECONDARY_COLORS
)
421 /* Set the maximum */
422 MmSecondaryColors
= MI_MAX_SECONDARY_COLORS
;
425 /* Make sure there aren't too little colors */
426 if (MmSecondaryColors
< MI_MIN_SECONDARY_COLORS
)
428 /* Set the default */
429 MmSecondaryColors
= MI_SECONDARY_COLORS
;
432 /* Finally make sure the colors are a power of two */
433 if (MmSecondaryColors
& (MmSecondaryColors
- 1))
435 /* Set the default */
436 MmSecondaryColors
= MI_SECONDARY_COLORS
;
440 /* Compute the mask and store it */
441 MmSecondaryColorMask
= MmSecondaryColors
- 1;
442 KeGetCurrentPrcb()->SecondaryColorMask
= MmSecondaryColorMask
;
448 MiInitializeColorTables(VOID
)
451 PMMPTE PointerPte
, LastPte
;
452 MMPTE TempPte
= ValidKernelPte
;
454 /* The color table starts after the ARM3 PFN database */
455 MmFreePagesByColor
[0] = (PMMCOLOR_TABLES
)&MmPfnDatabase
[MmHighestPhysicalPage
+ 1];
457 /* Loop the PTEs. We have two color tables for each secondary color */
458 PointerPte
= MiAddressToPte(&MmFreePagesByColor
[0][0]);
459 LastPte
= MiAddressToPte((ULONG_PTR
)MmFreePagesByColor
[0] +
460 (2 * MmSecondaryColors
* sizeof(MMCOLOR_TABLES
))
462 while (PointerPte
<= LastPte
)
464 /* Check for valid PTE */
465 if (PointerPte
->u
.Hard
.Valid
== 0)
467 /* Get a page and map it */
468 TempPte
.u
.Hard
.PageFrameNumber
= MxGetNextPage(1);
469 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
471 /* Zero out the page */
472 RtlZeroMemory(MiPteToAddress(PointerPte
), PAGE_SIZE
);
479 /* Now set the address of the next list, right after this one */
480 MmFreePagesByColor
[1] = &MmFreePagesByColor
[0][MmSecondaryColors
];
482 /* Now loop the lists to set them up */
483 for (i
= 0; i
< MmSecondaryColors
; i
++)
485 /* Set both free and zero lists for each color */
486 MmFreePagesByColor
[ZeroedPageList
][i
].Flink
= 0xFFFFFFFF;
487 MmFreePagesByColor
[ZeroedPageList
][i
].Blink
= (PVOID
)0xFFFFFFFF;
488 MmFreePagesByColor
[ZeroedPageList
][i
].Count
= 0;
489 MmFreePagesByColor
[FreePageList
][i
].Flink
= 0xFFFFFFFF;
490 MmFreePagesByColor
[FreePageList
][i
].Blink
= (PVOID
)0xFFFFFFFF;
491 MmFreePagesByColor
[FreePageList
][i
].Count
= 0;
498 MiIsRegularMemory(IN PLOADER_PARAMETER_BLOCK LoaderBlock
,
501 PLIST_ENTRY NextEntry
;
502 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
504 /* Loop the memory descriptors */
505 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
506 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
508 /* Get the memory descriptor */
509 MdBlock
= CONTAINING_RECORD(NextEntry
,
510 MEMORY_ALLOCATION_DESCRIPTOR
,
513 /* Check if this PFN could be part of the block */
514 if (Pfn
>= (MdBlock
->BasePage
))
516 /* Check if it really is part of the block */
517 if (Pfn
< (MdBlock
->BasePage
+ MdBlock
->PageCount
))
519 /* Check if the block is actually memory we don't map */
520 if ((MdBlock
->MemoryType
== LoaderFirmwarePermanent
) ||
521 (MdBlock
->MemoryType
== LoaderBBTMemory
) ||
522 (MdBlock
->MemoryType
== LoaderSpecialMemory
))
524 /* We don't need PFN database entries for this memory */
528 /* This is memory we want to map */
534 /* Blocks are ordered, so if it's not here, it doesn't exist */
538 /* Get to the next descriptor */
539 NextEntry
= MdBlock
->ListEntry
.Flink
;
542 /* Check if this PFN is actually from our free memory descriptor */
543 if ((Pfn
>= MxOldFreeDescriptor
.BasePage
) &&
544 (Pfn
< MxOldFreeDescriptor
.BasePage
+ MxOldFreeDescriptor
.PageCount
))
546 /* We use these pages for initial mappings, so we do want to count them */
550 /* Otherwise this isn't memory that we describe or care about */
557 MiMapPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
559 ULONG FreePage
, FreePageCount
, PagesLeft
, BasePage
, PageCount
;
560 PLIST_ENTRY NextEntry
;
561 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
562 PMMPTE PointerPte
, LastPte
;
563 MMPTE TempPte
= ValidKernelPte
;
565 /* Get current page data, since we won't be using MxGetNextPage as it would corrupt our state */
566 FreePage
= MxFreeDescriptor
->BasePage
;
567 FreePageCount
= MxFreeDescriptor
->PageCount
;
570 /* Loop the memory descriptors */
571 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
572 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
574 /* Get the descriptor */
575 MdBlock
= CONTAINING_RECORD(NextEntry
,
576 MEMORY_ALLOCATION_DESCRIPTOR
,
578 if ((MdBlock
->MemoryType
== LoaderFirmwarePermanent
) ||
579 (MdBlock
->MemoryType
== LoaderBBTMemory
) ||
580 (MdBlock
->MemoryType
== LoaderSpecialMemory
))
582 /* These pages are not part of the PFN database */
583 NextEntry
= MdBlock
->ListEntry
.Flink
;
587 /* Next, check if this is our special free descriptor we've found */
588 if (MdBlock
== MxFreeDescriptor
)
590 /* Use the real numbers instead */
591 BasePage
= MxOldFreeDescriptor
.BasePage
;
592 PageCount
= MxOldFreeDescriptor
.PageCount
;
596 /* Use the descriptor's numbers */
597 BasePage
= MdBlock
->BasePage
;
598 PageCount
= MdBlock
->PageCount
;
601 /* Get the PTEs for this range */
602 PointerPte
= MiAddressToPte(&MmPfnDatabase
[BasePage
]);
603 LastPte
= MiAddressToPte(((ULONG_PTR
)&MmPfnDatabase
[BasePage
+ PageCount
]) - 1);
604 DPRINT("MD Type: %lx Base: %lx Count: %lx\n", MdBlock
->MemoryType
, BasePage
, PageCount
);
607 while (PointerPte
<= LastPte
)
609 /* We'll only touch PTEs that aren't already valid */
610 if (PointerPte
->u
.Hard
.Valid
== 0)
612 /* Use the next free page */
613 TempPte
.u
.Hard
.PageFrameNumber
= FreePage
;
614 ASSERT(FreePageCount
!= 0);
616 /* Consume free pages */
622 KeBugCheckEx(INSTALL_MORE_MEMORY
,
623 MmNumberOfPhysicalPages
,
625 MxOldFreeDescriptor
.PageCount
,
629 /* Write out this PTE */
631 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
634 RtlZeroMemory(MiPteToAddress(PointerPte
), PAGE_SIZE
);
641 /* Do the next address range */
642 NextEntry
= MdBlock
->ListEntry
.Flink
;
645 /* Now update the free descriptors to consume the pages we used up during the PFN allocation loop */
646 MxFreeDescriptor
->BasePage
= FreePage
;
647 MxFreeDescriptor
->PageCount
= FreePageCount
;
653 MiBuildPfnDatabaseFromPages(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
658 PFN_NUMBER PageFrameIndex
, StartupPdIndex
, PtePageIndex
;
660 ULONG_PTR BaseAddress
= 0;
662 /* PFN of the startup page directory */
663 StartupPdIndex
= PFN_FROM_PTE(MiAddressToPde(PDE_BASE
));
665 /* Start with the first PDE and scan them all */
666 PointerPde
= MiAddressToPde(NULL
);
667 Count
= PD_COUNT
* PDE_COUNT
;
668 for (i
= 0; i
< Count
; i
++)
670 /* Check for valid PDE */
671 if (PointerPde
->u
.Hard
.Valid
== 1)
673 /* Get the PFN from it */
674 PageFrameIndex
= PFN_FROM_PTE(PointerPde
);
676 /* Do we want a PFN entry for this page? */
677 if (MiIsRegularMemory(LoaderBlock
, PageFrameIndex
))
679 /* Yes we do, set it up */
680 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
681 Pfn1
->u4
.PteFrame
= StartupPdIndex
;
682 Pfn1
->PteAddress
= PointerPde
;
683 Pfn1
->u2
.ShareCount
++;
684 Pfn1
->u3
.e2
.ReferenceCount
= 1;
685 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
686 Pfn1
->u3
.e1
.CacheAttribute
= MiNonCached
;
688 Pfn1
->PfnUsage
= MI_USAGE_INIT_MEMORY
;
689 memcpy(Pfn1
->ProcessName
, "Initial PDE", 16);
698 /* Now get the PTE and scan the pages */
699 PointerPte
= MiAddressToPte(BaseAddress
);
700 for (j
= 0; j
< PTE_COUNT
; j
++)
702 /* Check for a valid PTE */
703 if (PointerPte
->u
.Hard
.Valid
== 1)
705 /* Increase the shared count of the PFN entry for the PDE */
706 ASSERT(Pfn1
!= NULL
);
707 Pfn1
->u2
.ShareCount
++;
709 /* Now check if the PTE is valid memory too */
710 PtePageIndex
= PFN_FROM_PTE(PointerPte
);
711 if (MiIsRegularMemory(LoaderBlock
, PtePageIndex
))
714 * Only add pages above the end of system code or pages
715 * that are part of nonpaged pool
717 if ((BaseAddress
>= 0xA0000000) ||
718 ((BaseAddress
>= (ULONG_PTR
)MmNonPagedPoolStart
) &&
719 (BaseAddress
< (ULONG_PTR
)MmNonPagedPoolStart
+
720 MmSizeOfNonPagedPoolInBytes
)))
722 /* Get the PFN entry and make sure it too is valid */
723 Pfn2
= MiGetPfnEntry(PtePageIndex
);
724 if ((MmIsAddressValid(Pfn2
)) &&
725 (MmIsAddressValid(Pfn2
+ 1)))
727 /* Setup the PFN entry */
728 Pfn2
->u4
.PteFrame
= PageFrameIndex
;
729 Pfn2
->PteAddress
= PointerPte
;
730 Pfn2
->u2
.ShareCount
++;
731 Pfn2
->u3
.e2
.ReferenceCount
= 1;
732 Pfn2
->u3
.e1
.PageLocation
= ActiveAndValid
;
733 Pfn2
->u3
.e1
.CacheAttribute
= MiNonCached
;
735 Pfn2
->PfnUsage
= MI_USAGE_INIT_MEMORY
;
736 memcpy(Pfn1
->ProcessName
, "Initial PTE", 16);
745 BaseAddress
+= PAGE_SIZE
;
750 /* Next PDE mapped address */
751 BaseAddress
+= PDE_MAPPED_VA
;
762 MiBuildPfnDatabaseZeroPage(VOID
)
767 /* Grab the lowest page and check if it has no real references */
768 Pfn1
= MiGetPfnEntry(MmLowestPhysicalPage
);
769 if (!(MmLowestPhysicalPage
) && !(Pfn1
->u3
.e2
.ReferenceCount
))
771 /* Make it a bogus page to catch errors */
772 PointerPde
= MiAddressToPde(0xFFFFFFFF);
773 Pfn1
->u4
.PteFrame
= PFN_FROM_PTE(PointerPde
);
774 Pfn1
->PteAddress
= PointerPde
;
775 Pfn1
->u2
.ShareCount
++;
776 Pfn1
->u3
.e2
.ReferenceCount
= 0xFFF0;
777 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
778 Pfn1
->u3
.e1
.CacheAttribute
= MiNonCached
;
785 MiBuildPfnDatabaseFromLoaderBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
787 PLIST_ENTRY NextEntry
;
788 PFN_NUMBER PageCount
= 0;
789 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
790 PFN_NUMBER PageFrameIndex
;
796 /* Now loop through the descriptors */
797 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
798 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
800 /* Get the current descriptor */
801 MdBlock
= CONTAINING_RECORD(NextEntry
,
802 MEMORY_ALLOCATION_DESCRIPTOR
,
806 PageCount
= MdBlock
->PageCount
;
807 PageFrameIndex
= MdBlock
->BasePage
;
809 /* Don't allow memory above what the PFN database is mapping */
810 if (PageFrameIndex
> MmHighestPhysicalPage
)
812 /* Since they are ordered, everything past here will be larger */
816 /* On the other hand, the end page might be higher up... */
817 if ((PageFrameIndex
+ PageCount
) > (MmHighestPhysicalPage
+ 1))
819 /* In which case we'll trim the descriptor to go as high as we can */
820 PageCount
= MmHighestPhysicalPage
+ 1 - PageFrameIndex
;
821 MdBlock
->PageCount
= PageCount
;
823 /* But if there's nothing left to trim, we got too high, so quit */
824 if (!PageCount
) break;
827 /* Now check the descriptor type */
828 switch (MdBlock
->MemoryType
)
830 /* Check for bad RAM */
833 DPRINT1("You either have specified /BURNMEMORY or damaged RAM modules.\n");
836 /* Check for free RAM */
838 case LoaderLoadedProgram
:
839 case LoaderFirmwareTemporary
:
840 case LoaderOsloaderStack
:
842 /* Get the last page of this descriptor. Note we loop backwards */
843 PageFrameIndex
+= PageCount
- 1;
844 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
846 /* Lock the PFN Database */
847 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
850 /* If the page really has no references, mark it as free */
851 if (!Pfn1
->u3
.e2
.ReferenceCount
)
853 /* Add it to the free list */
854 Pfn1
->u3
.e1
.CacheAttribute
= MiNonCached
;
855 MiInsertPageInFreeList(PageFrameIndex
);
858 /* Go to the next page */
863 /* Release PFN database */
864 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
866 /* Done with this block */
869 /* Check for pages that are invisible to us */
870 case LoaderFirmwarePermanent
:
871 case LoaderSpecialMemory
:
872 case LoaderBBTMemory
:
879 /* Map these pages with the KSEG0 mapping that adds 0x80000000 */
880 PointerPte
= MiAddressToPte(KSEG0_BASE
+ (PageFrameIndex
<< PAGE_SHIFT
));
881 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
884 /* Check if the page is really unused */
885 PointerPde
= MiAddressToPde(KSEG0_BASE
+ (PageFrameIndex
<< PAGE_SHIFT
));
886 if (!Pfn1
->u3
.e2
.ReferenceCount
)
888 /* Mark it as being in-use */
889 Pfn1
->u4
.PteFrame
= PFN_FROM_PTE(PointerPde
);
890 Pfn1
->PteAddress
= PointerPte
;
891 Pfn1
->u2
.ShareCount
++;
892 Pfn1
->u3
.e2
.ReferenceCount
= 1;
893 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
894 Pfn1
->u3
.e1
.CacheAttribute
= MiNonCached
;
896 Pfn1
->PfnUsage
= MI_USAGE_BOOT_DRIVER
;
899 /* Check for RAM disk page */
900 if (MdBlock
->MemoryType
== LoaderXIPRom
)
902 /* Make it a pseudo-I/O ROM mapping */
904 Pfn1
->u2
.ShareCount
= 0;
905 Pfn1
->u3
.e2
.ReferenceCount
= 0;
906 Pfn1
->u3
.e1
.PageLocation
= 0;
908 Pfn1
->u4
.InPageError
= 0;
909 Pfn1
->u3
.e1
.PrototypePte
= 1;
913 /* Advance page structures */
921 /* Next descriptor entry */
922 NextEntry
= MdBlock
->ListEntry
.Flink
;
929 MiBuildPfnDatabaseSelf(VOID
)
931 PMMPTE PointerPte
, LastPte
;
934 /* Loop the PFN database page */
935 PointerPte
= MiAddressToPte(MiGetPfnEntry(MmLowestPhysicalPage
));
936 LastPte
= MiAddressToPte(MiGetPfnEntry(MmHighestPhysicalPage
));
937 while (PointerPte
<= LastPte
)
939 /* Make sure the page is valid */
940 if (PointerPte
->u
.Hard
.Valid
== 1)
942 /* Get the PFN entry and just mark it referenced */
943 Pfn1
= MiGetPfnEntry(PointerPte
->u
.Hard
.PageFrameNumber
);
944 Pfn1
->u2
.ShareCount
= 1;
945 Pfn1
->u3
.e2
.ReferenceCount
= 1;
947 Pfn1
->PfnUsage
= MI_USAGE_PFN_DATABASE
;
959 MiInitializePfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
961 /* Scan memory and start setting up PFN entries */
962 MiBuildPfnDatabaseFromPages(LoaderBlock
);
964 /* Add the zero page */
965 MiBuildPfnDatabaseZeroPage();
967 /* Scan the loader block and build the rest of the PFN database */
968 MiBuildPfnDatabaseFromLoaderBlock(LoaderBlock
);
970 /* Finally add the pages for the PFN database itself */
971 MiBuildPfnDatabaseSelf();
977 MiAdjustWorkingSetManagerParameters(IN BOOLEAN Client
)
979 /* This function needs to do more work, for now, we tune page minimums */
981 /* Check for a system with around 64MB RAM or more */
982 if (MmNumberOfPhysicalPages
>= (63 * _1MB
) / PAGE_SIZE
)
984 /* Double the minimum amount of pages we consider for a "plenty free" scenario */
985 MmPlentyFreePages
*= 2;
992 MiNotifyMemoryEvents(VOID
)
994 /* Are we in a low-memory situation? */
995 if (MmAvailablePages
< MmLowMemoryThreshold
)
997 /* Clear high, set low */
998 if (KeReadStateEvent(MiHighMemoryEvent
)) KeClearEvent(MiHighMemoryEvent
);
999 if (!KeReadStateEvent(MiLowMemoryEvent
)) KeSetEvent(MiLowMemoryEvent
, 0, FALSE
);
1001 else if (MmAvailablePages
< MmHighMemoryThreshold
)
1003 /* We are in between, clear both */
1004 if (KeReadStateEvent(MiHighMemoryEvent
)) KeClearEvent(MiHighMemoryEvent
);
1005 if (KeReadStateEvent(MiLowMemoryEvent
)) KeClearEvent(MiLowMemoryEvent
);
1009 /* Clear low, set high */
1010 if (KeReadStateEvent(MiLowMemoryEvent
)) KeClearEvent(MiLowMemoryEvent
);
1011 if (!KeReadStateEvent(MiHighMemoryEvent
)) KeSetEvent(MiHighMemoryEvent
, 0, FALSE
);
1018 MiCreateMemoryEvent(IN PUNICODE_STRING Name
,
1025 OBJECT_ATTRIBUTES ObjectAttributes
;
1026 SECURITY_DESCRIPTOR SecurityDescriptor
;
1029 Status
= RtlCreateSecurityDescriptor(&SecurityDescriptor
,
1030 SECURITY_DESCRIPTOR_REVISION
);
1031 if (!NT_SUCCESS(Status
)) return Status
;
1033 /* One ACL with 3 ACEs, containing each one SID */
1034 DaclLength
= sizeof(ACL
) +
1035 3 * sizeof(ACCESS_ALLOWED_ACE
) +
1036 RtlLengthSid(SeLocalSystemSid
) +
1037 RtlLengthSid(SeAliasAdminsSid
) +
1038 RtlLengthSid(SeWorldSid
);
1040 /* Allocate space for the DACL */
1041 Dacl
= ExAllocatePoolWithTag(PagedPool
, DaclLength
, 'lcaD');
1042 if (!Dacl
) return STATUS_INSUFFICIENT_RESOURCES
;
1044 /* Setup the ACL inside it */
1045 Status
= RtlCreateAcl(Dacl
, DaclLength
, ACL_REVISION
);
1046 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1048 /* Add query rights for everyone */
1049 Status
= RtlAddAccessAllowedAce(Dacl
,
1051 SYNCHRONIZE
| EVENT_QUERY_STATE
| READ_CONTROL
,
1053 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1055 /* Full rights for the admin */
1056 Status
= RtlAddAccessAllowedAce(Dacl
,
1060 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1062 /* As well as full rights for the system */
1063 Status
= RtlAddAccessAllowedAce(Dacl
,
1067 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1069 /* Set this DACL inside the SD */
1070 Status
= RtlSetDaclSecurityDescriptor(&SecurityDescriptor
,
1074 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1076 /* Setup the event attributes, making sure it's a permanent one */
1077 InitializeObjectAttributes(&ObjectAttributes
,
1079 OBJ_KERNEL_HANDLE
| OBJ_PERMANENT
,
1081 &SecurityDescriptor
);
1083 /* Create the event */
1084 Status
= ZwCreateEvent(&EventHandle
,
1093 /* Check if this is the success path */
1094 if (NT_SUCCESS(Status
))
1096 /* Add a reference to the object, then close the handle we had */
1097 Status
= ObReferenceObjectByHandle(EventHandle
,
1103 ZwClose (EventHandle
);
1113 MiInitializeMemoryEvents(VOID
)
1115 UNICODE_STRING LowString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\LowMemoryCondition");
1116 UNICODE_STRING HighString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\HighMemoryCondition");
1117 UNICODE_STRING LowPagedPoolString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\LowPagedPoolCondition");
1118 UNICODE_STRING HighPagedPoolString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\HighPagedPoolCondition");
1119 UNICODE_STRING LowNonPagedPoolString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\LowNonPagedPoolCondition");
1120 UNICODE_STRING HighNonPagedPoolString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\HighNonPagedPoolCondition");
1123 /* Check if we have a registry setting */
1124 if (MmLowMemoryThreshold
)
1126 /* Convert it to pages */
1127 MmLowMemoryThreshold
*= (_1MB
/ PAGE_SIZE
);
1131 /* The low memory threshold is hit when we don't consider that we have "plenty" of free pages anymore */
1132 MmLowMemoryThreshold
= MmPlentyFreePages
;
1134 /* More than one GB of memory? */
1135 if (MmNumberOfPhysicalPages
> 0x40000)
1137 /* Start at 32MB, and add another 16MB for each GB */
1138 MmLowMemoryThreshold
= (32 * _1MB
) / PAGE_SIZE
;
1139 MmLowMemoryThreshold
+= ((MmNumberOfPhysicalPages
- 0x40000) >> 7);
1141 else if (MmNumberOfPhysicalPages
> 0x8000)
1143 /* For systems with > 128MB RAM, add another 4MB for each 128MB */
1144 MmLowMemoryThreshold
+= ((MmNumberOfPhysicalPages
- 0x8000) >> 5);
1147 /* Don't let the minimum threshold go past 64MB */
1148 MmLowMemoryThreshold
= min(MmLowMemoryThreshold
, (64 * _1MB
) / PAGE_SIZE
);
1151 /* Check if we have a registry setting */
1152 if (MmHighMemoryThreshold
)
1154 /* Convert it into pages */
1155 MmHighMemoryThreshold
*= (_1MB
/ PAGE_SIZE
);
1159 /* Otherwise, the default is three times the low memory threshold */
1160 MmHighMemoryThreshold
= 3 * MmLowMemoryThreshold
;
1161 ASSERT(MmHighMemoryThreshold
> MmLowMemoryThreshold
);
1164 /* Make sure high threshold is actually higher than the low */
1165 MmHighMemoryThreshold
= max(MmHighMemoryThreshold
, MmLowMemoryThreshold
);
1167 /* Create the memory events for all the thresholds */
1168 Status
= MiCreateMemoryEvent(&LowString
, &MiLowMemoryEvent
);
1169 if (!NT_SUCCESS(Status
)) return FALSE
;
1170 Status
= MiCreateMemoryEvent(&HighString
, &MiHighMemoryEvent
);
1171 if (!NT_SUCCESS(Status
)) return FALSE
;
1172 Status
= MiCreateMemoryEvent(&LowPagedPoolString
, &MiLowPagedPoolEvent
);
1173 if (!NT_SUCCESS(Status
)) return FALSE
;
1174 Status
= MiCreateMemoryEvent(&HighPagedPoolString
, &MiHighPagedPoolEvent
);
1175 if (!NT_SUCCESS(Status
)) return FALSE
;
1176 Status
= MiCreateMemoryEvent(&LowNonPagedPoolString
, &MiLowNonPagedPoolEvent
);
1177 if (!NT_SUCCESS(Status
)) return FALSE
;
1178 Status
= MiCreateMemoryEvent(&HighNonPagedPoolString
, &MiHighNonPagedPoolEvent
);
1179 if (!NT_SUCCESS(Status
)) return FALSE
;
1181 /* Now setup the pool events */
1182 MiInitializePoolEvents();
1184 /* Set the initial event state */
1185 MiNotifyMemoryEvents();
1192 MiAddHalIoMappings(VOID
)
1197 ULONG i
, j
, PdeCount
;
1198 PFN_NUMBER PageFrameIndex
;
1200 /* HAL Heap address -- should be on a PDE boundary */
1201 BaseAddress
= (PVOID
)0xFFC00000;
1202 ASSERT(MiAddressToPteOffset(BaseAddress
) == 0);
1204 /* Check how many PDEs the heap has */
1205 PointerPde
= MiAddressToPde(BaseAddress
);
1206 PdeCount
= PDE_COUNT
- ADDR_TO_PDE_OFFSET(BaseAddress
);
1207 for (i
= 0; i
< PdeCount
; i
++)
1209 /* Does the HAL own this mapping? */
1210 if ((PointerPde
->u
.Hard
.Valid
== 1) &&
1211 (PointerPde
->u
.Hard
.LargePage
== 0))
1213 /* Get the PTE for it and scan each page */
1214 PointerPte
= MiAddressToPte(BaseAddress
);
1215 for (j
= 0 ; j
< PTE_COUNT
; j
++)
1217 /* Does the HAL own this page? */
1218 if (PointerPte
->u
.Hard
.Valid
== 1)
1220 /* Is the HAL using it for device or I/O mapped memory? */
1221 PageFrameIndex
= PFN_FROM_PTE(PointerPte
);
1222 if (!MiGetPfnEntry(PageFrameIndex
))
1224 /* FIXME: For PAT, we need to track I/O cache attributes for coherency */
1225 DPRINT1("HAL I/O Mapping at %p is unsafe\n", BaseAddress
);
1229 /* Move to the next page */
1230 BaseAddress
= (PVOID
)((ULONG_PTR
)BaseAddress
+ PAGE_SIZE
);
1236 /* Move to the next address */
1237 BaseAddress
= (PVOID
)((ULONG_PTR
)BaseAddress
+ PDE_MAPPED_VA
);
1240 /* Move to the next PDE */
1247 MmDumpArmPfnDatabase(IN BOOLEAN StatusOnly
)
1251 PCHAR Consumer
= "Unknown";
1253 ULONG ActivePages
= 0, FreePages
= 0, OtherPages
= 0;
1255 ULONG UsageBucket
[MI_USAGE_FREE_PAGE
+ 1] = {0};
1256 PCHAR MI_USAGE_TEXT
[MI_USAGE_FREE_PAGE
+ 1] =
1284 // Loop the PFN database
1286 KeRaiseIrql(HIGH_LEVEL
, &OldIrql
);
1287 for (i
= 0; i
<= MmHighestPhysicalPage
; i
++)
1289 Pfn1
= MiGetPfnEntry(i
);
1290 if (!Pfn1
) continue;
1292 ASSERT(Pfn1
->PfnUsage
<= MI_USAGE_FREE_PAGE
);
1295 // Get the page location
1297 switch (Pfn1
->u3
.e1
.PageLocation
)
1299 case ActiveAndValid
:
1301 Consumer
= "Active and Valid";
1305 case ZeroedPageList
:
1307 Consumer
= "Zero Page List";
1313 Consumer
= "Free Page List";
1319 Consumer
= "Other (ASSERT!)";
1325 /* Add into bucket */
1326 UsageBucket
[Pfn1
->PfnUsage
]++;
1330 // Pretty-print the page
1333 DbgPrint("0x%08p:\t%20s\t(%04d.%04d)\t[%16s - %16s])\n",
1336 Pfn1
->u3
.e2
.ReferenceCount
,
1337 Pfn1
->u2
.ShareCount
== LIST_HEAD
? 0xFFFF : Pfn1
->u2
.ShareCount
,
1339 MI_USAGE_TEXT
[Pfn1
->PfnUsage
],
1347 DbgPrint("Active: %5d pages\t[%6d KB]\n", ActivePages
, (ActivePages
<< PAGE_SHIFT
) / 1024);
1348 DbgPrint("Free: %5d pages\t[%6d KB]\n", FreePages
, (FreePages
<< PAGE_SHIFT
) / 1024);
1349 DbgPrint("-----------------------------------------\n");
1351 OtherPages
= UsageBucket
[MI_USAGE_BOOT_DRIVER
];
1352 DbgPrint("Boot Images: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1353 OtherPages
= UsageBucket
[MI_USAGE_DRIVER_PAGE
];
1354 DbgPrint("System Drivers: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1355 OtherPages
= UsageBucket
[MI_USAGE_PFN_DATABASE
];
1356 DbgPrint("PFN Database: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1357 OtherPages
= UsageBucket
[MI_USAGE_PAGE_TABLE
] + UsageBucket
[MI_USAGE_LEGACY_PAGE_DIRECTORY
];
1358 DbgPrint("Page Tables: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1359 OtherPages
= UsageBucket
[MI_USAGE_NONPAGED_POOL
] + UsageBucket
[MI_USAGE_NONPAGED_POOL_EXPANSION
];
1360 DbgPrint("NonPaged Pool: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1361 OtherPages
= UsageBucket
[MI_USAGE_PAGED_POOL
];
1362 DbgPrint("Paged Pool: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1363 OtherPages
= UsageBucket
[MI_USAGE_KERNEL_STACK
] + UsageBucket
[MI_USAGE_KERNEL_STACK_EXPANSION
];
1364 DbgPrint("Kernel Stack: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1365 OtherPages
= UsageBucket
[MI_USAGE_INIT_MEMORY
];
1366 DbgPrint("Init Memory: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1367 OtherPages
= UsageBucket
[MI_USAGE_SECTION
];
1368 DbgPrint("Sections: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1369 OtherPages
= UsageBucket
[MI_USAGE_CACHE
];
1370 DbgPrint("Cache: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1372 KeLowerIrql(OldIrql
);
1377 MiPagesInLoaderBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock
,
1378 IN PBOOLEAN IncludeType
)
1380 PLIST_ENTRY NextEntry
;
1381 PFN_NUMBER PageCount
= 0;
1382 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
1385 // Now loop through the descriptors
1387 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
1388 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
1391 // Grab each one, and check if it's one we should include
1393 MdBlock
= CONTAINING_RECORD(NextEntry
,
1394 MEMORY_ALLOCATION_DESCRIPTOR
,
1396 if ((MdBlock
->MemoryType
< LoaderMaximum
) &&
1397 (IncludeType
[MdBlock
->MemoryType
]))
1400 // Add this to our running total
1402 PageCount
+= MdBlock
->PageCount
;
1406 // Try the next descriptor
1408 NextEntry
= MdBlock
->ListEntry
.Flink
;
1417 PPHYSICAL_MEMORY_DESCRIPTOR
1420 MmInitializeMemoryLimits(IN PLOADER_PARAMETER_BLOCK LoaderBlock
,
1421 IN PBOOLEAN IncludeType
)
1423 PLIST_ENTRY NextEntry
;
1424 ULONG Run
= 0, InitialRuns
= 0;
1425 PFN_NUMBER NextPage
= -1, PageCount
= 0;
1426 PPHYSICAL_MEMORY_DESCRIPTOR Buffer
, NewBuffer
;
1427 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
1430 // Scan the memory descriptors
1432 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
1433 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
1436 // For each one, increase the memory allocation estimate
1439 NextEntry
= NextEntry
->Flink
;
1443 // Allocate the maximum we'll ever need
1445 Buffer
= ExAllocatePoolWithTag(NonPagedPool
,
1446 sizeof(PHYSICAL_MEMORY_DESCRIPTOR
) +
1447 sizeof(PHYSICAL_MEMORY_RUN
) *
1450 if (!Buffer
) return NULL
;
1453 // For now that's how many runs we have
1455 Buffer
->NumberOfRuns
= InitialRuns
;
1458 // Now loop through the descriptors again
1460 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
1461 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
1464 // Grab each one, and check if it's one we should include
1466 MdBlock
= CONTAINING_RECORD(NextEntry
,
1467 MEMORY_ALLOCATION_DESCRIPTOR
,
1469 if ((MdBlock
->MemoryType
< LoaderMaximum
) &&
1470 (IncludeType
[MdBlock
->MemoryType
]))
1473 // Add this to our running total
1475 PageCount
+= MdBlock
->PageCount
;
1478 // Check if the next page is described by the next descriptor
1480 if (MdBlock
->BasePage
== NextPage
)
1483 // Combine it into the same physical run
1485 ASSERT(MdBlock
->PageCount
!= 0);
1486 Buffer
->Run
[Run
- 1].PageCount
+= MdBlock
->PageCount
;
1487 NextPage
+= MdBlock
->PageCount
;
1492 // Otherwise just duplicate the descriptor's contents
1494 Buffer
->Run
[Run
].BasePage
= MdBlock
->BasePage
;
1495 Buffer
->Run
[Run
].PageCount
= MdBlock
->PageCount
;
1496 NextPage
= Buffer
->Run
[Run
].BasePage
+ Buffer
->Run
[Run
].PageCount
;
1499 // And in this case, increase the number of runs
1506 // Try the next descriptor
1508 NextEntry
= MdBlock
->ListEntry
.Flink
;
1512 // We should not have been able to go past our initial estimate
1514 ASSERT(Run
<= Buffer
->NumberOfRuns
);
1517 // Our guess was probably exaggerated...
1519 if (InitialRuns
> Run
)
1522 // Allocate a more accurately sized buffer
1524 NewBuffer
= ExAllocatePoolWithTag(NonPagedPool
,
1525 sizeof(PHYSICAL_MEMORY_DESCRIPTOR
) +
1526 sizeof(PHYSICAL_MEMORY_RUN
) *
1532 // Copy the old buffer into the new, then free it
1534 RtlCopyMemory(NewBuffer
->Run
,
1536 sizeof(PHYSICAL_MEMORY_RUN
) * Run
);
1540 // Now use the new buffer
1547 // Write the final numbers, and return it
1549 Buffer
->NumberOfRuns
= Run
;
1550 Buffer
->NumberOfPages
= PageCount
;
1557 MiBuildPagedPool(VOID
)
1559 PMMPTE PointerPte
, PointerPde
;
1560 MMPTE TempPte
= ValidKernelPte
;
1561 PFN_NUMBER PageFrameIndex
;
1563 ULONG Size
, BitMapSize
;
1564 #if (_MI_PAGING_LEVELS == 2)
1566 // Get the page frame number for the system page directory
1568 PointerPte
= MiAddressToPte(PDE_BASE
);
1569 ASSERT(PD_COUNT
== 1);
1570 MmSystemPageDirectory
[0] = PFN_FROM_PTE(PointerPte
);
1573 // Allocate a system PTE which will hold a copy of the page directory
1575 PointerPte
= MiReserveSystemPtes(1, SystemPteSpace
);
1577 MmSystemPagePtes
= MiPteToAddress(PointerPte
);
1580 // Make this system PTE point to the system page directory.
1581 // It is now essentially double-mapped. This will be used later for lazy
1582 // evaluation of PDEs accross process switches, similarly to how the Global
1583 // page directory array in the old ReactOS Mm is used (but in a less hacky
1586 TempPte
= ValidKernelPte
;
1587 ASSERT(PD_COUNT
== 1);
1588 TempPte
.u
.Hard
.PageFrameNumber
= MmSystemPageDirectory
[0];
1589 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
1592 // Let's get back to paged pool work: size it up.
1593 // By default, it should be twice as big as nonpaged pool.
1595 MmSizeOfPagedPoolInBytes
= 2 * MmMaximumNonPagedPoolInBytes
;
1596 if (MmSizeOfPagedPoolInBytes
> ((ULONG_PTR
)MmNonPagedSystemStart
-
1597 (ULONG_PTR
)MmPagedPoolStart
))
1600 // On the other hand, we have limited VA space, so make sure that the VA
1601 // for paged pool doesn't overflow into nonpaged pool VA. Otherwise, set
1602 // whatever maximum is possible.
1604 MmSizeOfPagedPoolInBytes
= (ULONG_PTR
)MmNonPagedSystemStart
-
1605 (ULONG_PTR
)MmPagedPoolStart
;
1609 // Get the size in pages and make sure paged pool is at least 32MB.
1611 Size
= MmSizeOfPagedPoolInBytes
;
1612 if (Size
< MI_MIN_INIT_PAGED_POOLSIZE
) Size
= MI_MIN_INIT_PAGED_POOLSIZE
;
1613 Size
= BYTES_TO_PAGES(Size
);
1616 // Now check how many PTEs will be required for these many pages.
1618 Size
= (Size
+ (1024 - 1)) / 1024;
1621 // Recompute the page-aligned size of the paged pool, in bytes and pages.
1623 MmSizeOfPagedPoolInBytes
= Size
* PAGE_SIZE
* 1024;
1624 MmSizeOfPagedPoolInPages
= MmSizeOfPagedPoolInBytes
>> PAGE_SHIFT
;
1627 // Let's be really sure this doesn't overflow into nonpaged system VA
1629 ASSERT((MmSizeOfPagedPoolInBytes
+ (ULONG_PTR
)MmPagedPoolStart
) <=
1630 (ULONG_PTR
)MmNonPagedSystemStart
);
1633 // This is where paged pool ends
1635 MmPagedPoolEnd
= (PVOID
)(((ULONG_PTR
)MmPagedPoolStart
+
1636 MmSizeOfPagedPoolInBytes
) - 1);
1639 // So now get the PDE for paged pool and zero it out
1641 PointerPde
= MiAddressToPde(MmPagedPoolStart
);
1643 #if (_MI_PAGING_LEVELS >= 3)
1644 /* On these systems, there's no double-mapping, so instead, the PPE and PXEs
1645 * are setup to span the entire paged pool area, so there's no need for the
1650 RtlZeroMemory(PointerPde
,
1651 (1 + MiAddressToPde(MmPagedPoolEnd
) - PointerPde
) * sizeof(MMPTE
));
1654 // Next, get the first and last PTE
1656 PointerPte
= MiAddressToPte(MmPagedPoolStart
);
1657 MmPagedPoolInfo
.FirstPteForPagedPool
= PointerPte
;
1658 MmPagedPoolInfo
.LastPteForPagedPool
= MiAddressToPte(MmPagedPoolEnd
);
1661 // Lock the PFN database
1663 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1665 /* Allocate a page and map the first paged pool PDE */
1666 MI_SET_USAGE(MI_USAGE_PAGED_POOL
);
1667 MI_SET_PROCESS2("Kernel");
1668 PageFrameIndex
= MiRemoveZeroPage(0);
1669 TempPte
.u
.Hard
.PageFrameNumber
= PageFrameIndex
;
1670 MI_WRITE_VALID_PTE(PointerPde
, TempPte
);
1671 #if (_MI_PAGING_LEVELS >= 3)
1672 /* Use the PPE of MmPagedPoolStart that was setup above */
1673 // Bla = PFN_FROM_PTE(PpeAddress(MmPagedPool...));
1676 /* Do it this way */
1677 // Bla = MmSystemPageDirectory[(PointerPde - (PMMPTE)PDE_BASE) / PDE_COUNT]
1679 /* Initialize the PFN entry for it */
1680 MiInitializePfnForOtherProcess(PageFrameIndex
,
1682 MmSystemPageDirectory
[(PointerPde
- (PMMPTE
)PDE_BASE
) / PDE_COUNT
]);
1686 // Release the PFN database lock
1688 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1691 // We only have one PDE mapped for now... at fault time, additional PDEs
1692 // will be allocated to handle paged pool growth. This is where they'll have
1695 MmPagedPoolInfo
.NextPdeForPagedPoolExpansion
= PointerPde
+ 1;
1698 // We keep track of each page via a bit, so check how big the bitmap will
1699 // have to be (make sure to align our page count such that it fits nicely
1700 // into a 4-byte aligned bitmap.
1702 // We'll also allocate the bitmap header itself part of the same buffer.
1705 ASSERT(Size
== MmSizeOfPagedPoolInPages
);
1707 Size
= sizeof(RTL_BITMAP
) + (((Size
+ 31) / 32) * sizeof(ULONG
));
1710 // Allocate the allocation bitmap, which tells us which regions have not yet
1711 // been mapped into memory
1713 MmPagedPoolInfo
.PagedPoolAllocationMap
= ExAllocatePoolWithTag(NonPagedPool
,
1716 ASSERT(MmPagedPoolInfo
.PagedPoolAllocationMap
);
1719 // Initialize it such that at first, only the first page's worth of PTEs is
1720 // marked as allocated (incidentially, the first PDE we allocated earlier).
1722 RtlInitializeBitMap(MmPagedPoolInfo
.PagedPoolAllocationMap
,
1723 (PULONG
)(MmPagedPoolInfo
.PagedPoolAllocationMap
+ 1),
1725 RtlSetAllBits(MmPagedPoolInfo
.PagedPoolAllocationMap
);
1726 RtlClearBits(MmPagedPoolInfo
.PagedPoolAllocationMap
, 0, 1024);
1729 // We have a second bitmap, which keeps track of where allocations end.
1730 // Given the allocation bitmap and a base address, we can therefore figure
1731 // out which page is the last page of that allocation, and thus how big the
1732 // entire allocation is.
1734 MmPagedPoolInfo
.EndOfPagedPoolBitmap
= ExAllocatePoolWithTag(NonPagedPool
,
1737 ASSERT(MmPagedPoolInfo
.EndOfPagedPoolBitmap
);
1738 RtlInitializeBitMap(MmPagedPoolInfo
.EndOfPagedPoolBitmap
,
1739 (PULONG
)(MmPagedPoolInfo
.EndOfPagedPoolBitmap
+ 1),
1743 // Since no allocations have been made yet, there are no bits set as the end
1745 RtlClearAllBits(MmPagedPoolInfo
.EndOfPagedPoolBitmap
);
1748 // Initialize paged pool.
1750 InitializePool(PagedPool
, 0);
1752 /* Default low threshold of 30MB or one fifth of paged pool */
1753 MiLowPagedPoolThreshold
= (30 * _1MB
) >> PAGE_SHIFT
;
1754 MiLowPagedPoolThreshold
= min(MiLowPagedPoolThreshold
, Size
/ 5);
1756 /* Default high threshold of 60MB or 25% */
1757 MiHighPagedPoolThreshold
= (60 * _1MB
) >> PAGE_SHIFT
;
1758 MiHighPagedPoolThreshold
= min(MiHighPagedPoolThreshold
, (Size
* 2) / 5);
1759 ASSERT(MiLowPagedPoolThreshold
< MiHighPagedPoolThreshold
);
1761 /* Setup the global session space */
1762 MiInitializeSystemSpaceMap(NULL
);
1768 MiDbgDumpMemoryDescriptors(VOID
)
1770 PLIST_ENTRY NextEntry
;
1771 PMEMORY_ALLOCATION_DESCRIPTOR Md
;
1772 ULONG TotalPages
= 0;
1781 "FirmwareTemporary ",
1782 "FirmwarePermanent ",
1789 "ConsoleOutDriver ",
1791 "StartupKernelStack",
1792 "StartupPanicStack ",
1804 DPRINT1("Base\t\tLength\t\tType\n");
1805 for (NextEntry
= KeLoaderBlock
->MemoryDescriptorListHead
.Flink
;
1806 NextEntry
!= &KeLoaderBlock
->MemoryDescriptorListHead
;
1807 NextEntry
= NextEntry
->Flink
)
1809 Md
= CONTAINING_RECORD(NextEntry
, MEMORY_ALLOCATION_DESCRIPTOR
, ListEntry
);
1810 DPRINT1("%08lX\t%08lX\t%s\n", Md
->BasePage
, Md
->PageCount
, MemType
[Md
->MemoryType
]);
1811 TotalPages
+= Md
->PageCount
;
1814 DPRINT1("Total: %08lX (%d MB)\n", TotalPages
, (TotalPages
* PAGE_SIZE
) / 1024 / 1024);
1820 MmArmInitSystem(IN ULONG Phase
,
1821 IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
1824 BOOLEAN IncludeType
[LoaderMaximum
];
1826 PPHYSICAL_MEMORY_RUN Run
;
1827 PFN_NUMBER PageCount
;
1829 /* Dump memory descriptors */
1830 if (MiDbgEnableMdDump
) MiDbgDumpMemoryDescriptors();
1833 // Instantiate memory that we don't consider RAM/usable
1834 // We use the same exclusions that Windows does, in order to try to be
1835 // compatible with WinLDR-style booting
1837 for (i
= 0; i
< LoaderMaximum
; i
++) IncludeType
[i
] = TRUE
;
1838 IncludeType
[LoaderBad
] = FALSE
;
1839 IncludeType
[LoaderFirmwarePermanent
] = FALSE
;
1840 IncludeType
[LoaderSpecialMemory
] = FALSE
;
1841 IncludeType
[LoaderBBTMemory
] = FALSE
;
1844 /* Initialize the phase 0 temporary event */
1845 KeInitializeEvent(&MiTempEvent
, NotificationEvent
, FALSE
);
1847 /* Set all the events to use the temporary event for now */
1848 MiLowMemoryEvent
= &MiTempEvent
;
1849 MiHighMemoryEvent
= &MiTempEvent
;
1850 MiLowPagedPoolEvent
= &MiTempEvent
;
1851 MiHighPagedPoolEvent
= &MiTempEvent
;
1852 MiLowNonPagedPoolEvent
= &MiTempEvent
;
1853 MiHighNonPagedPoolEvent
= &MiTempEvent
;
1856 // Define the basic user vs. kernel address space separation
1858 MmSystemRangeStart
= (PVOID
)KSEG0_BASE
;
1859 MmUserProbeAddress
= (ULONG_PTR
)MmSystemRangeStart
- 0x10000;
1860 MmHighestUserAddress
= (PVOID
)(MmUserProbeAddress
- 1);
1862 /* Highest PTE and PDE based on the addresses above */
1863 MiHighestUserPte
= MiAddressToPte(MmHighestUserAddress
);
1864 MiHighestUserPde
= MiAddressToPde(MmHighestUserAddress
);
1865 #if (_MI_PAGING_LEVELS >= 3)
1866 /* We need the highest PPE and PXE addresses */
1870 // Get the size of the boot loader's image allocations and then round
1871 // that region up to a PDE size, so that any PDEs we might create for
1872 // whatever follows are separate from the PDEs that boot loader might've
1873 // already created (and later, we can blow all that away if we want to).
1875 MmBootImageSize
= KeLoaderBlock
->Extension
->LoaderPagesSpanned
;
1876 MmBootImageSize
*= PAGE_SIZE
;
1877 MmBootImageSize
= (MmBootImageSize
+ PDE_MAPPED_VA
- 1) & ~(PDE_MAPPED_VA
- 1);
1878 ASSERT((MmBootImageSize
% PDE_MAPPED_VA
) == 0);
1881 // Set the size of session view, pool, and image
1883 MmSessionSize
= MI_SESSION_SIZE
;
1884 MmSessionViewSize
= MI_SESSION_VIEW_SIZE
;
1885 MmSessionPoolSize
= MI_SESSION_POOL_SIZE
;
1886 MmSessionImageSize
= MI_SESSION_IMAGE_SIZE
;
1889 // Set the size of system view
1891 MmSystemViewSize
= MI_SYSTEM_VIEW_SIZE
;
1894 // This is where it all ends
1896 MiSessionImageEnd
= (PVOID
)PTE_BASE
;
1899 // This is where we will load Win32k.sys and the video driver
1901 MiSessionImageStart
= (PVOID
)((ULONG_PTR
)MiSessionImageEnd
-
1902 MmSessionImageSize
);
1905 // So the view starts right below the session working set (itself below
1908 MiSessionViewStart
= (PVOID
)((ULONG_PTR
)MiSessionImageEnd
-
1909 MmSessionImageSize
-
1910 MI_SESSION_WORKING_SET_SIZE
-
1914 // Session pool follows
1916 MiSessionPoolEnd
= MiSessionViewStart
;
1917 MiSessionPoolStart
= (PVOID
)((ULONG_PTR
)MiSessionPoolEnd
-
1921 // And it all begins here
1923 MmSessionBase
= MiSessionPoolStart
;
1926 // Sanity check that our math is correct
1928 ASSERT((ULONG_PTR
)MmSessionBase
+ MmSessionSize
== PTE_BASE
);
1931 // Session space ends wherever image session space ends
1933 MiSessionSpaceEnd
= MiSessionImageEnd
;
1936 // System view space ends at session space, so now that we know where
1937 // this is, we can compute the base address of system view space itself.
1939 MiSystemViewStart
= (PVOID
)((ULONG_PTR
)MmSessionBase
-
1942 /* Compute the PTE addresses for all the addresses we carved out */
1943 MiSessionImagePteStart
= MiAddressToPte(MiSessionImageStart
);
1944 MiSessionImagePteEnd
= MiAddressToPte(MiSessionImageEnd
);
1945 MiSessionBasePte
= MiAddressToPte(MmSessionBase
);
1946 MiSessionLastPte
= MiAddressToPte(MiSessionSpaceEnd
);
1948 /* Initialize the user mode image list */
1949 InitializeListHead(&MmLoadedUserImageList
);
1951 /* Initialize the paged pool mutex */
1952 KeInitializeGuardedMutex(&MmPagedPoolMutex
);
1954 /* Initialize the Loader Lock */
1955 KeInitializeMutant(&MmSystemLoadLock
, FALSE
);
1957 /* Set the zero page event */
1958 KeInitializeEvent(&MmZeroingPageEvent
, SynchronizationEvent
, FALSE
);
1959 MmZeroingPageThreadActive
= FALSE
;
1962 // Count physical pages on the system
1964 PageCount
= MiPagesInLoaderBlock(LoaderBlock
, IncludeType
);
1967 // Check if this is a machine with less than 19MB of RAM
1969 if (PageCount
< MI_MIN_PAGES_FOR_SYSPTE_TUNING
)
1972 // Use the very minimum of system PTEs
1974 MmNumberOfSystemPtes
= 7000;
1979 // Use the default, but check if we have more than 32MB of RAM
1981 MmNumberOfSystemPtes
= 11000;
1982 if (PageCount
> MI_MIN_PAGES_FOR_SYSPTE_BOOST
)
1985 // Double the amount of system PTEs
1987 MmNumberOfSystemPtes
<<= 1;
1991 DPRINT("System PTE count has been tuned to %d (%d bytes)\n",
1992 MmNumberOfSystemPtes
, MmNumberOfSystemPtes
* PAGE_SIZE
);
1994 /* Initialize the working set lock */
1995 ExInitializePushLock((PULONG_PTR
)&MmSystemCacheWs
.WorkingSetMutex
);
1997 /* Set commit limit */
1998 MmTotalCommitLimit
= 2 * _1GB
;
1999 MmTotalCommitLimitMaximum
= MmTotalCommitLimit
;
2001 /* Has the allocation fragment been setup? */
2002 if (!MmAllocationFragment
)
2004 /* Use the default value */
2005 MmAllocationFragment
= MI_ALLOCATION_FRAGMENT
;
2006 if (PageCount
< ((256 * _1MB
) / PAGE_SIZE
))
2008 /* On memory systems with less than 256MB, divide by 4 */
2009 MmAllocationFragment
= MI_ALLOCATION_FRAGMENT
/ 4;
2011 else if (PageCount
< (_1GB
/ PAGE_SIZE
))
2013 /* On systems with less than 1GB, divide by 2 */
2014 MmAllocationFragment
= MI_ALLOCATION_FRAGMENT
/ 2;
2019 /* Convert from 1KB fragments to pages */
2020 MmAllocationFragment
*= _1KB
;
2021 MmAllocationFragment
= ROUND_TO_PAGES(MmAllocationFragment
);
2023 /* Don't let it past the maximum */
2024 MmAllocationFragment
= min(MmAllocationFragment
,
2025 MI_MAX_ALLOCATION_FRAGMENT
);
2027 /* Don't let it too small either */
2028 MmAllocationFragment
= max(MmAllocationFragment
,
2029 MI_MIN_ALLOCATION_FRAGMENT
);
2032 /* Initialize the platform-specific parts */
2033 MiInitMachineDependent(LoaderBlock
);
2036 // Build the physical memory block
2038 MmPhysicalMemoryBlock
= MmInitializeMemoryLimits(LoaderBlock
,
2042 // Allocate enough buffer for the PFN bitmap
2043 // Align it up to a 32-bit boundary
2045 Bitmap
= ExAllocatePoolWithTag(NonPagedPool
,
2046 (((MmHighestPhysicalPage
+ 1) + 31) / 32) * 4,
2053 KeBugCheckEx(INSTALL_MORE_MEMORY
,
2054 MmNumberOfPhysicalPages
,
2055 MmLowestPhysicalPage
,
2056 MmHighestPhysicalPage
,
2061 // Initialize it and clear all the bits to begin with
2063 RtlInitializeBitMap(&MiPfnBitMap
,
2065 MmHighestPhysicalPage
+ 1);
2066 RtlClearAllBits(&MiPfnBitMap
);
2069 // Loop physical memory runs
2071 for (i
= 0; i
< MmPhysicalMemoryBlock
->NumberOfRuns
; i
++)
2076 Run
= &MmPhysicalMemoryBlock
->Run
[i
];
2077 DPRINT("PHYSICAL RAM [0x%08p to 0x%08p]\n",
2078 Run
->BasePage
<< PAGE_SHIFT
,
2079 (Run
->BasePage
+ Run
->PageCount
) << PAGE_SHIFT
);
2082 // Make sure it has pages inside it
2087 // Set the bits in the PFN bitmap
2089 RtlSetBits(&MiPfnBitMap
, Run
->BasePage
, Run
->PageCount
);
2093 /* Look for large page cache entries that need caching */
2094 MiSyncCachedRanges();
2096 /* Loop for HAL Heap I/O device mappings that need coherency tracking */
2097 MiAddHalIoMappings();
2099 /* Set the initial resident page count */
2100 MmResidentAvailablePages
= MmAvailablePages
- 32;
2102 /* Initialize large page structures on PAE/x64, and MmProcessList on x86 */
2103 MiInitializeLargePageSupport();
2105 /* Check if the registry says any drivers should be loaded with large pages */
2106 MiInitializeDriverLargePageList();
2108 /* Relocate the boot drivers into system PTE space and fixup their PFNs */
2109 MiReloadBootLoadedDrivers(LoaderBlock
);
2111 /* FIXME: Call out into Driver Verifier for initialization */
2113 /* Check how many pages the system has */
2114 if (MmNumberOfPhysicalPages
<= ((13 * _1MB
) / PAGE_SIZE
))
2116 /* Set small system */
2117 MmSystemSize
= MmSmallSystem
;
2119 else if (MmNumberOfPhysicalPages
<= ((19 * _1MB
) / PAGE_SIZE
))
2121 /* Set small system and add 100 pages for the cache */
2122 MmSystemSize
= MmSmallSystem
;
2123 MmSystemCacheWsMinimum
+= 100;
2127 /* Set medium system and add 400 pages for the cache */
2128 MmSystemSize
= MmMediumSystem
;
2129 MmSystemCacheWsMinimum
+= 400;
2132 /* Check for less than 24MB */
2133 if (MmNumberOfPhysicalPages
< ((24 * _1MB
) / PAGE_SIZE
))
2135 /* No more than 32 pages */
2136 MmSystemCacheWsMinimum
= 32;
2139 /* Check for more than 32MB */
2140 if (MmNumberOfPhysicalPages
>= ((32 * _1MB
) / PAGE_SIZE
))
2142 /* Check for product type being "Wi" for WinNT */
2143 if (MmProductType
== '\0i\0W')
2145 /* Then this is a large system */
2146 MmSystemSize
= MmLargeSystem
;
2150 /* For servers, we need 64MB to consider this as being large */
2151 if (MmNumberOfPhysicalPages
>= ((64 * _1MB
) / PAGE_SIZE
))
2153 /* Set it as large */
2154 MmSystemSize
= MmLargeSystem
;
2159 /* Check for more than 33 MB */
2160 if (MmNumberOfPhysicalPages
> ((33 * _1MB
) / PAGE_SIZE
))
2162 /* Add another 500 pages to the cache */
2163 MmSystemCacheWsMinimum
+= 500;
2166 /* Now setup the shared user data fields */
2167 ASSERT(SharedUserData
->NumberOfPhysicalPages
== 0);
2168 SharedUserData
->NumberOfPhysicalPages
= MmNumberOfPhysicalPages
;
2169 SharedUserData
->LargePageMinimum
= 0;
2171 /* Check for workstation (Wi for WinNT) */
2172 if (MmProductType
== '\0i\0W')
2174 /* Set Windows NT Workstation product type */
2175 SharedUserData
->NtProductType
= NtProductWinNt
;
2180 /* Check for LanMan server */
2181 if (MmProductType
== '\0a\0L')
2183 /* This is a domain controller */
2184 SharedUserData
->NtProductType
= NtProductLanManNt
;
2188 /* Otherwise it must be a normal server */
2189 SharedUserData
->NtProductType
= NtProductServer
;
2192 /* Set the product type, and make the system more aggressive with low memory */
2194 MmMinimumFreePages
= 81;
2197 /* Update working set tuning parameters */
2198 MiAdjustWorkingSetManagerParameters(!MmProductType
);
2200 /* Finetune the page count by removing working set and NP expansion */
2201 MmResidentAvailablePages
-= MiExpansionPoolPagesInitialCharge
;
2202 MmResidentAvailablePages
-= MmSystemCacheWsMinimum
;
2203 MmResidentAvailableAtInit
= MmResidentAvailablePages
;
2204 if (MmResidentAvailablePages
<= 0)
2206 /* This should not happen */
2207 DPRINT1("System cache working set too big\n");
2211 /* Initialize the system cache */
2212 //MiInitializeSystemCache(MmSystemCacheWsMinimum, MmAvailablePages);
2214 /* Update the commit limit */
2215 MmTotalCommitLimit
= MmAvailablePages
;
2216 if (MmTotalCommitLimit
> 1024) MmTotalCommitLimit
-= 1024;
2217 MmTotalCommitLimitMaximum
= MmTotalCommitLimit
;
2219 /* Size up paged pool and build the shadow system page directory */
2222 /* Debugger physical memory support is now ready to be used */
2223 MmDebugPte
= MiAddressToPte(MiDebugMapping
);
2225 /* Initialize the loaded module list */
2226 MiInitializeLoadedModuleList(LoaderBlock
);
2230 // Always return success for now