#define OHCI_RH_NO_OVER_CURRENT_PROTECTION 0x1000
#define OHCI_RH_GET_POWER_ON_TO_POWER_GOOD_TIME(s) ((s) >> 24)
+//
+// Frame interval register (section 7.3.1)
+//
+#define OHCI_FRAME_INTERVAL_OFFSET 0x34
+#define OHCI_GET_INTERVAL_VALUE(s) ((s) & 0x3fff)
+#define OHCI_GET_FS_LARGEST_DATA_PACKET(s) (((s) >> 16) & 0x7fff)
+#define OHCI_FRAME_INTERVAL_TOGGLE 0x80000000
+
+//
+// frame interval
+//
+#define OHCI_FRAME_INTERVAL_NUMBER_OFFSET 0x3C
+
+//
+// periodic start register
+//
+#define OHCI_PERIODIC_START_OFFSET 0x40
+#define OHCI_PERIODIC(i) ((i) * 9 / 10)
//
// Root Hub Descriptor B register (section 7.4.2)
| OHCI_WRITEBACK_DONE_HEAD \
| OHCI_RESUME_DETECTED \
| OHCI_UNRECOVERABLE_ERROR \
- | OHCI_ROOT_HUB_STATUS_CHANGE)
+ | OHCI_ROOT_HUB_STATUS_CHANGE \
+ | OHCI_OWNERSHIP_CHANGE)
//
// FSMPS
// Software part
PHYSICAL_ADDRESS PhysicalAddress;
- PVOID Request;
+ PVOID HeadLogicalDescriptor;
PVOID NextDescriptor;
+ PVOID Request;
}OHCI_ENDPOINT_DESCRIPTOR, *POHCI_ENDPOINT_DESCRIPTOR;
#define OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(s) ((s) << 16)
#define OHCI_ENDPOINT_LOW_SPEED 0x00002000
#define OHCI_ENDPOINT_FULL_SPEED 0x00000000
+#define OHCI_ENDPOINT_DIRECTION_OUT 0x00000800
+#define OHCI_ENDPOINT_DIRECTION_IN 0x00001000
+#define OHCI_ENDPOINT_GENERAL_FORMAT 0x00000000
+#define OHCI_ENDPOINT_ISOCHRONOUS_FORMAT 0x00008000
//
// Maximum port count set by OHCI
ULONG LastPhysicalByteAddress; // Physical pointer to buffer end
// Software part
PHYSICAL_ADDRESS PhysicalAddress; // Physical address of this descriptor
+ PVOID NextLogicalDescriptor;
ULONG BufferSize; // Size of the buffer
PVOID BufferLogical; // Logical pointer to the buffer
- PVOID Request; // pointer to IUSBRequest
}OHCI_GENERAL_TD, *POHCI_GENERAL_TD;
#define OHCI_TD_CONDITION_BUFFER_OVERRUN 0x0c
#define OHCI_TD_CONDITION_BUFFER_UNDERRUN 0x0d
#define OHCI_TD_CONDITION_NOT_ACCESSED 0x0f
+
+// --------------------------------
+// Isochronous transfer descriptor structure (section 4.3.2)
+// --------------------------------
+
+#define OHCI_ITD_NOFFSET 8
+
+typedef struct _OHCI_ISO_TD_
+{
+
+ // Hardware part 32 byte
+ ULONG Flags;
+ ULONG BufferPhysical; // Physical page number of byte 0
+ ULONG NextPhysicalDescriptor; // Next isochronous transfer descriptor
+ ULONG LastPhysicalByteAddress; // Physical buffer end
+ USHORT Offset[OHCI_ITD_NOFFSET]; // Buffer offsets
+
+ // Software part
+ PHYSICAL_ADDRESS PhysicalAddress; // Physical address of this descriptor
+ struct _OHCI_ISO_TD_ * NextLogicalDescriptor; // Logical pointer next descriptor
+}OHCI_ISO_TD, *POHCI_ISO_TD;
+
+C_ASSERT(FIELD_OFFSET(OHCI_ISO_TD, Flags) == 0);
+C_ASSERT(FIELD_OFFSET(OHCI_ISO_TD, BufferPhysical) == 4);
+C_ASSERT(FIELD_OFFSET(OHCI_ISO_TD, NextPhysicalDescriptor) == 8);
+C_ASSERT(FIELD_OFFSET(OHCI_ISO_TD, LastPhysicalByteAddress) == 12);
+C_ASSERT(FIELD_OFFSET(OHCI_ISO_TD, Offset) == 16);
+C_ASSERT(FIELD_OFFSET(OHCI_ISO_TD, PhysicalAddress) == 32);
+C_ASSERT(FIELD_OFFSET(OHCI_ISO_TD, NextLogicalDescriptor) == 40);
+C_ASSERT(sizeof(OHCI_ISO_TD) == 48);
+
+#define OHCI_ITD_GET_STARTING_FRAME(x) ((x) & 0x0000ffff)
+#define OHCI_ITD_SET_STARTING_FRAME(x) ((x) & 0xffff)
+#define OHCI_ITD_GET_DELAY_INTERRUPT(x) (((x) >> 21) & 7)
+#define OHCI_ITD_SET_DELAY_INTERRUPT(x) ((x) << 21)
+#define OHCI_ITD_NO_INTERRUPT 0x00e00000
+#define OHCI_ITD_GET_FRAME_COUNT(x) ((((x) >> 24) & 7) + 1)
+#define OHCI_ITD_SET_FRAME_COUNT(x) (((x) - 1) << 24)
+#define OHCI_ITD_GET_CONDITION_CODE(x) ((x) >> 28)
+#define OHCI_ITD_NO_CONDITION_CODE 0xf0000000
+