#pragma once
-#if defined(__GNUC__) && !defined(_MINIHAL_)
-#define INIT_SECTION __attribute__((section ("INIT")))
-#else
-#define INIT_SECTION /* Done via alloc_text for MSC */
-#endif
-
-
#ifdef CONFIG_SMP
#define HAL_BUILD_TYPE (DBG ? PRCB_BUILD_DEBUG : 0)
#else
#define HAL_APC_REQUEST 0
#define HAL_DPC_REQUEST 1
+/* HAL profiling offsets in KeGetPcr()->HalReserved[] */
+#define HAL_PROFILING_INTERVAL 0
+#define HAL_PROFILING_MULTIPLIER 1
+
/* CMOS Registers and Ports */
#define CMOS_CONTROL_PORT (PUCHAR)0x70
#define CMOS_DATA_PORT (PUCHAR)0x71
//
#define GRAPHICS_MODE_12 0x12 /* 80x30 8x16 640x480 16/256K */
+#if defined(SARCH_XBOX)
+//
+// For some unknown reason the PIT of the Xbox is fixed at 1.125000 MHz,
+// which is ~5.7% lower than on the PC.
+//
+#define PIT_FREQUENCY 1125000
+#else
//
// Commonly stated as being 1.19318MHz
//
// See ISA System Architecture 3rd Edition (Tom Shanley, Don Anderson, John Swindle)
-// P. 471
+// p. 471
//
// However, the true value is closer to 1.19318181[...]81MHz since this is 1/3rd
// of the NTSC color subcarrier frequency which runs at 3.57954545[...]45MHz.
// number is quite long.
//
#define PIT_FREQUENCY 1193182
+#endif
//
// These ports are controlled by the i8254 Programmable Interrupt Timer (PIT)
PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx(ULONG NumberOfMapRegisters,BOOLEAN IsMaster, BOOLEAN Dma32BitAddresses);
/* sysinfo.c */
+INIT_FUNCTION
VOID
NTAPI
HalpRegisterVector(IN UCHAR Flags,
IN ULONG SystemVector,
IN KIRQL Irql);
+INIT_FUNCTION
VOID
NTAPI
HalpEnableInterruptHandler(IN UCHAR Flags,
VOID NTAPI HalpInitializePICs(IN BOOLEAN EnableInterrupts);
VOID __cdecl HalpApcInterrupt(VOID);
VOID __cdecl HalpDispatchInterrupt(VOID);
-VOID __cdecl HalpDispatchInterrupt2(VOID);
+PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2(VOID);
DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame);
DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame);
extern BOOLEAN HalpProfilingStopped;
/* timer.c */
-VOID NTAPI HalpInitializeClock(VOID);
+INIT_FUNCTION VOID NTAPI HalpInitializeClock(VOID);
VOID __cdecl HalpClockInterrupt(VOID);
VOID __cdecl HalpProfileInterrupt(VOID);
VOID HalpInitPciBus (VOID);
/* dma.c */
-VOID HalpInitDma (VOID);
+INIT_FUNCTION VOID HalpInitDma (VOID);
/* Non-generic initialization */
VOID HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock);
VOID
);
+INIT_FUNCTION
VOID
NTAPI
HalpRegisterKdSupportFunctions(
VOID
);
+INIT_FUNCTION
NTSTATUS
NTAPI
HalpSetupPciDeviceForDebugging(
IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice
);
+INIT_FUNCTION
NTSTATUS
NTAPI
HalpReleasePciDeviceForDebugging(
IN BOOLEAN Aligned
);
+PVOID
+NTAPI
+HalpMapPhysicalMemory64Vista(
+ IN PHYSICAL_ADDRESS PhysicalAddress,
+ IN PFN_COUNT PageCount,
+ IN BOOLEAN FlushCurrentTLB
+);
+
+VOID
+NTAPI
+HalpUnmapVirtualAddressVista(
+ IN PVOID VirtualAddress,
+ IN PFN_COUNT NumberPages,
+ IN BOOLEAN FlushCurrentTLB
+);
+
PVOID
NTAPI
HalpMapPhysicalMemory64(
//
// CMOS Routines
//
+INIT_FUNCTION
VOID
NTAPI
HalpInitializeCmos(
IN BOOLEAN Create
);
+INIT_FUNCTION
VOID
NTAPI
HalpGetNMICrashFlag(
VOID
);
+INIT_FUNCTION
BOOLEAN
NTAPI
HalpGetDebugPortTable(
VOID
);
+INIT_FUNCTION
VOID
NTAPI
HalpReportSerialNumber(
VOID
);
+INIT_FUNCTION
NTSTATUS
NTAPI
HalpMarkAcpiHal(
VOID
);
+INIT_FUNCTION
VOID
NTAPI
HalpBuildAddressMap(
VOID
);
+INIT_FUNCTION
VOID
NTAPI
HalpReportResourceUsage(
IN INTERFACE_TYPE InterfaceType
);
+INIT_FUNCTION
ULONG
NTAPI
HalpIs16BitPortDecodeSupported(
IN KIRQL OldIrql
);
+INIT_FUNCTION
VOID
NTAPI
HalpInitBusHandlers(
VOID
);
+INIT_FUNCTION
VOID
NTAPI
HalpDebugPciDumpBus(
);
#ifdef _M_AMD64
+
+VOID
+NTAPI
+HalInitializeBios(
+ _In_ ULONG Unknown,
+ _In_ PLOADER_PARAMETER_BLOCK LoaderBlock
+);
+
#define KfLowerIrql KeLowerIrql
#define KiEnterInterruptTrap(TrapFrame) /* We do all neccessary in asm code */
#define KiEoiHelper(TrapFrame) return /* Just return to the caller */