[NTOSKRNL]

[reactos.git] / reactos / ntoskrnl / include / internal / amd64 / ke.h

diff --git a/reactos/ntoskrnl/include/internal/amd64/ke.h b/reactos/ntoskrnl/include/internal/amd64/ke.h
index e14fe44..7fec19a 100644 (file)
--- a/reactos/ntoskrnl/include/internal/amd64/ke.h
+++ b/reactos/ntoskrnl/include/internal/amd64/ke.h
@@ -41,11 +41,21 @@
 
 #define X86_MSR_GSBASE          0xC0000101
 #define X86_MSR_KERNEL_GSBASE   0xC0000102
+#define X86_MSR_EFER            0xC0000080
 #define X86_MSR_STAR            0xC0000081
 #define X86_MSR_LSTAR           0xC0000082
 #define X86_MSR_CSTAR           0xC0000083
 #define X86_MSR_SFMASK          0xC0000084
 
+#define EFER_SCE 0x01
+#define EFER_LME 0x10
+#define EFER_LMA 0x40
+#define EFER_NXE 0x80
+#define EFER_SVME 0x100
+#define EFER_FFXSR 0x400
+
+#define AMD64_TSS 9
+
 #ifndef __ASM__
 
 #include "intrin_i.h"
@@ -58,16 +68,14 @@ typedef struct _KIDT_INIT
     PVOID ServiceRoutine;
 } KIDT_INIT, *PKIDT_INIT;
 
-//#define KeArchFnInit() Ke386FnInit()
-#define KeArchFnInit() DbgPrint("KeArchFnInit is unimplemented!\n");
-#define KeArchHaltProcessor() Ke386HaltProcessor()
-#define KfLowerIrql KeLowerIrql
-#define KfAcquireSpinLock KeAcquireSpinLock
-#define KfReleaseSpinLock KeReleaseSpinLock
-
 extern ULONG Ke386CacheAlignment;
+extern ULONG KeI386NpxPresent;
+extern ULONG KeI386XMMIPresent;
+extern ULONG KeI386FxsrPresent;
+extern ULONG KeI386CpuType;
+extern ULONG KeI386CpuStep;
 
-#define IMAGE_FILE_MACHINE_ARCHITECTURE IMAGE_FILE_MACHINE_I386
+#define IMAGE_FILE_MACHINE_ARCHITECTURE IMAGE_FILE_MACHINE_AMD64
 
 //
 // INT3 is 1 byte long
@@ -94,6 +102,30 @@ extern ULONG Ke386CacheAlignment;
 #define KeSetContextReturnRegister(Context, ReturnValue) \
     ((Context)->Rax = (ReturnValue))
 
+//
+// Macro to get trap and exception frame from a thread stack
+//
+#define KeGetTrapFrame(Thread) \
+    (PKTRAP_FRAME)((ULONG_PTR)((Thread)->InitialStack) - \
+                   sizeof(KTRAP_FRAME))
+
+//
+// Macro to get context switches from the PRCB
+// All architectures but x86 have it in the PRCB's KeContextSwitches
+//
+#define KeGetContextSwitches(Prcb)  \
+    (Prcb->KeContextSwitches)
+
+//
+// Macro to get the second level cache size field name which differs between
+// CISC and RISC architectures, as the former has unified I/D cache
+//
+#define KiGetSecondLevelDCacheSize() ((PKIPCR)KeGetPcr())->SecondLevelCacheSize
+
+#define KeGetExceptionFrame(Thread) \
+    (PKEXCEPTION_FRAME)((ULONG_PTR)KeGetTrapFrame(Thread) - \
+                        sizeof(KEXCEPTION_FRAME))
+
 //
 // Returns the Interrupt State from a Trap Frame.
 // ON = TRUE, OFF = FALSE
@@ -101,23 +133,97 @@ extern ULONG Ke386CacheAlignment;
 #define KeGetTrapFrameInterruptState(TrapFrame) \
         BooleanFlagOn((TrapFrame)->EFlags, EFLAGS_INTERRUPT_MASK)
 
+//
+// Invalidates the TLB entry for a specified address
+//
+FORCEINLINE
+VOID
+KeInvalidateTlbEntry(IN PVOID Address)
+{
+    /* Invalidate the TLB entry for this address */
+    __invlpg(Address);
+}
 
-struct _KPCR;
+FORCEINLINE
+VOID
+KeFlushProcessTb(VOID)
+{
+    /* Flush the TLB by resetting CR3 */
+    __writecr3(__readcr3());
+}
+
+FORCEINLINE
 VOID
-KiInitializeGdt(struct _KPCR* Pcr);
+KiRundownThread(IN PKTHREAD Thread)
+{
+#ifndef CONFIG_SMP
+    DbgPrint("KiRundownThread is unimplemented\n");
+#else
+    /* Nothing to do */
+#endif
+}
+
+/* Registers an interrupt handler with an IDT vector */
+FORCEINLINE
 VOID
-Ki386ApplicationProcessorInitializeTSS(VOID);
+KeRegisterInterruptHandler(IN ULONG Vector,
+                           IN PVOID Handler)
+{                           
+    UCHAR Entry;
+    PKIDTENTRY64 Idt;
+
+    /* Get the entry from the HAL */
+    Entry = HalVectorToIDTEntry(Vector);
+
+    /* Now set the data */
+    Idt = &KeGetPcr()->IdtBase[Entry];
+    Idt->OffsetLow = (ULONG_PTR)Handler & 0xffff;
+    Idt->OffsetMiddle = ((ULONG_PTR)Handler >> 16) & 0xffff;
+    Idt->OffsetHigh = (ULONG_PTR)Handler >> 32;
+    Idt->Selector = KGDT64_R0_CODE;
+    Idt->IstIndex = 0;
+    Idt->Type = 0x0e;
+    Idt->Dpl = 0;
+    Idt->Present = 1;
+    Idt->Reserved0 = 0;
+    Idt->Reserved1 = 0;
+}
+
+/* Returns the registered interrupt handler for a given IDT vector */
+FORCEINLINE
+PVOID
+KeQueryInterruptHandler(IN ULONG Vector)
+{
+    UCHAR Entry;
+    PKIDTENTRY64 Idt;
+
+    /* Get the entry from the HAL */
+    Entry = HalVectorToIDTEntry(Vector);
+
+    /* Get the IDT entry */
+    Idt = &KeGetPcr()->IdtBase[Entry];
 
-// Hack
-VOID KiRosPrepareForSystemStartup(ULONG, PROS_LOADER_PARAMETER_BLOCK);
+    /* Return the address */
+    return (PVOID)((ULONG64)Idt->OffsetHigh << 32 | 
+                   (ULONG64)Idt->OffsetMiddle << 16 | 
+                   (ULONG64)Idt->OffsetLow);
+}
+
+VOID
+FORCEINLINE
+KiEndInterrupt(IN KIRQL Irql,
+               IN PKTRAP_FRAME TrapFrame)
+{
+    DbgPrint("KiEndInterrupt is unimplemented\n");
+}
+
+#define Ki386PerfEnd(x)
+
+struct _KPCR;
 
 VOID
 FASTCALL
-Ki386InitializeTss(
-    IN PKTSS Tss,
-    IN PVOID GdtBase,
-    IN UINT64 Stack
-);
+KiInitializeTss(IN PKTSS Tss, IN UINT64 Stack);
 
 VOID KiDivideErrorFault();
 VOID KiDebugTrapOrFault();
@@ -208,7 +314,14 @@ KiThreadStartup(PKSYSTEM_ROUTINE SystemRoutine,
                 KTRAP_FRAME TrapFrame);
 #endif
 
-#endif
+#endif /* __ASM__ */
+
+#undef KeGetCurrentThread
+#define _KeGetCurrentThread KeGetCurrentThread
+
+// HACK
+extern NTKERNELAPI volatile KSYSTEM_TIME KeTickCount;
+
 #endif /* __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H */
 
 /* EOF */