VOID ShowInfo(BOOL bAll)
{
+ MIB_IFROW mibEntry;
PIP_ADAPTER_INFO pAdapterInfo = NULL;
PIP_ADAPTER_INFO pAdapter = NULL;
ULONG adaptOutBufLen = 0;
{
LPTSTR IntType, myConType;
+ mibEntry.dwIndex = pAdapter->Index;
+ GetIfEntry(&mibEntry);
+
IntType = GetInterfaceTypeName(pAdapter->Type);
myConType = GetConnectionType(pAdapter->AdapterName);
if (myConType != NULL) HeapFree(ProcessHeap, 0, myConType);
/* check if the adapter is connected to the media */
- if (_tcscmp(pAdapter->IpAddressList.IpAddress.String, "0.0.0.0") == 0)
+ if (mibEntry.dwOperStatus != MIB_IF_OPER_STATUS_CONNECTED && mibEntry.dwOperStatus != MIB_IF_OPER_STATUS_OPERATIONAL)
{
_tprintf(_T("\tMedia State . . . . . . . . . . . : Media disconnected\n"));
pAdapter = pAdapter->Next;
return TRUE;
}
-BOOL WINAPI
-InfpFindNextLine(
- IN PINFCONTEXT ContextIn,
- OUT PINFCONTEXT ContextOut)
-{
- return InfFindNextLine(ContextIn, ContextOut);
-}
-
-BOOL WINAPI
-InfpGetBinaryField(
- IN PINFCONTEXT Context,
- IN ULONG FieldIndex,
- IN OUT BYTE* ReturnBuffer,
- IN ULONG ReturnBufferSize,
- OUT PULONG RequiredSize)
-{
- return InfGetBinaryField(Context, FieldIndex, ReturnBuffer, ReturnBufferSize, RequiredSize);
-}
-
-DWORD WINAPI
-InfpGetFieldCount(
- IN PINFCONTEXT Context)
-{
- return (DWORD)InfGetFieldCount(Context);
-}
-
-BOOL WINAPI
-InfpGetIntField(
- IN PINFCONTEXT Context,
- IN DWORD FieldIndex,
- OUT PINT IntegerValue)
-{
- LONG IntegerValueL;
- BOOL ret;
-
- ret = InfGetIntField(Context, FieldIndex, &IntegerValueL);
- *IntegerValue = (INT)IntegerValueL;
- return ret;
-}
-
BOOL WINAPI
InfpGetMultiSzFieldW(
IN PINFCONTEXT Context,
#define SetupCloseInfFile InfpCloseInfFile
#define SetupFindFirstLineW InfpFindFirstLineW
-#define SetupFindNextLine InfpFindNextLine
-#define SetupGetBinaryField InfpGetBinaryField
-#define SetupGetFieldCount InfpGetFieldCount
-#define SetupGetIntField InfpGetIntField
+#define SetupFindNextLine InfFindNextLine
+#define SetupGetBinaryField InfGetBinaryField
+#define SetupGetFieldCount InfGetFieldCount
+#define SetupGetIntField InfGetIntField
#define SetupGetMultiSzFieldW InfpGetMultiSzFieldW
#define SetupGetStringFieldW InfpGetStringFieldW
#define SetupOpenInfFileW InfpOpenInfFileW
IN PCWSTR Key,
IN OUT PINFCONTEXT Context);
-BOOL WINAPI
-InfpFindNextLine(
- IN PINFCONTEXT ContextIn,
- OUT PINFCONTEXT ContextOut);
-
-BOOL WINAPI
-InfpGetBinaryField(
- IN PINFCONTEXT Context,
- IN ULONG FieldIndex,
- IN OUT BYTE* ReturnBuffer,
- IN ULONG ReturnBufferSize,
- OUT PULONG RequiredSize);
-
-DWORD WINAPI
-InfpGetFieldCount(
- IN PINFCONTEXT Context);
-
-BOOL WINAPI
-InfpGetIntField(
- IN PINFCONTEXT Context,
- IN DWORD FieldIndex,
- OUT PINT IntegerValue);
-
BOOL WINAPI
InfpGetMultiSzFieldW(
IN PINFCONTEXT Context,
/* Internal Headers */
#include "interface/consup.h"
#include "partlist.h"
+#include "infros.h"
#include "inffile.h"
#include "inicache.h"
#include "progress.h"
#elif (_MSC_VER)
#define FORCEINLINE __inline
#else
-#define FORCEINLINE static __inline__ __attribute__((always_inline))
+#define FORCEINLINE extern __inline__ __attribute__((always_inline))
#endif
#endif
#elif (_MSC_VER)
#define FORCEINLINE __inline
#else
-#define FORCEINLINE static __inline__ __attribute__((always_inline))
+#define FORCEINLINE extern __inline__ __attribute__((always_inline))
#endif
#endif
#endif
#if defined(_M_IX86)
-static __inline__ struct _TEB * NtCurrentTeb(void)
+extern __inline__ struct _TEB * NtCurrentTeb(void)
{
struct _TEB *ret;
return (struct _TEB *)__readgsqword(FIELD_OFFSET(NT_TIB, Self));
}
#elif defined(_M_PPC)
-static __inline__ struct _TEB * NtCurrentTeb(void)
+extern __inline__ struct _TEB * NtCurrentTeb(void)
{
return __readfsdword_winnt(0x18);
}
#else
-static __inline__ struct _TEB * NtCurrentTeb(void)
+extern __inline__ struct _TEB * NtCurrentTeb(void)
{
return __readfsdword_winnt(0x18);
}
return 0;
}
-FORCEINLINE
+static __inline
void
WINAPI
WspiapiLegacyFreeAddrInfo(
}
}
-FORCEINLINE
+static __inline
int
WINAPI
WspiapiLegacyGetAddrInfo(
return (iError);
}
-FORCEINLINE
+static __inline
int
WINAPI
WspiapiLegacyGetNameInfo(
we do tls cleanup in runtime and _CRT_MT has value 2. */
int _CRT_MT = 2;
+// HACK around broken imports from libmingwex, until RosBE64 is updated
+#ifdef _M_AMD64
+
+#ifndef WIN32_LEAN_AND_MEAN
+#define WIN32_LEAN_AND_MEAN
+#endif
+#include <windows.h>
+#include <stdlib.h>
+
+int __mingwthr_key_dtor (DWORD key, void (*dtor)(void *));
+int __mingwthr_remove_key_dtor (DWORD key);
+
+extern int ___w64_mingwthr_remove_key_dtor (DWORD key);
+extern int ___w64_mingwthr_add_key_dtor (DWORD key, void (*dtor)(void *));
+
+int
+__mingwthr_remove_key_dtor (DWORD key)
+{
+ return ___w64_mingwthr_remove_key_dtor (key);
+}
+
+int
+__mingwthr_key_dtor (DWORD key, void (*dtor)(void *))
+{
+ if (dtor)
+ return ___w64_mingwthr_add_key_dtor (key, dtor);
+
+ return 0;
+}
+#endif
+
#ifdef _MSC_VER
#define MAKE_SET(set, sym, type)
#else
+#if defined(_M_AMD64)
+#define MAKE_SET(set, sym, type) \
+ asm(".stabs \"" #set "\", " #type ", 0, 0, " #sym)
+#else
#define MAKE_SET(set, sym, type) \
asm(".stabs \"_" #set "\", " #type ", 0, 0, _" #sym)
#endif
+#endif
#define TEXT_SET(set, sym) MAKE_SET(set, sym, 23)
#define DATA_SET(set, sym) MAKE_SET(set, sym, 25)
#define BSS_SET(set, sym) MAKE_SET(set, sym, 27)
INFSTATUS
InfpGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- PLONG IntegerValue)
+ INT* IntegerValue)
{
PINFCACHELINE CacheLine;
PINFCACHEFIELD CacheField;
PULONG RequiredSize);
extern INFSTATUS InfpGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- PLONG IntegerValue);
+ INT* IntegerValue);
extern INFSTATUS InfpGetMultiSzField(PINFCONTEXT Context,
ULONG FieldIndex,
PTSTR ReturnBuffer,
PULONG RequiredSize);
extern BOOLEAN InfGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- PLONG IntegerValue);
+ PINT IntegerValue);
extern BOOLEAN InfGetMultiSzField(PINFCONTEXT Context,
ULONG FieldIndex,
PWSTR ReturnBuffer,
BOOLEAN
InfGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- PLONG IntegerValue)
+ PINT IntegerValue)
{
return INF_SUCCESS(InfpGetIntField(Context, FieldIndex, IntegerValue));
}
INFSTATUS
InfpGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- PLONG IntegerValue)
+ INT *IntegerValue)
{
PINFCACHELINE CacheLine;
PINFCACHEFIELD CacheField;
ULONG *RequiredSize);
extern int InfHostGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- ULONG *IntegerValue);
+ INT *IntegerValue);
extern int InfHostGetMultiSzField(PINFCONTEXT Context,
ULONG FieldIndex,
WCHAR *ReturnBuffer,
int
InfHostGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- ULONG *IntegerValue)
+ INT *IntegerValue)
{
INFSTATUS Status;
- Status = InfpGetIntField(Context, FieldIndex, (PLONG)IntegerValue);
+ Status = InfpGetIntField(Context, FieldIndex, IntegerValue);
if (INF_SUCCESS(Status))
{
return 0;
PULONG RequiredSize);
extern INFSTATUS InfpGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- PLONG IntegerValue);
+ INT *IntegerValue);
extern INFSTATUS InfpGetMultiSzField(PINFCONTEXT Context,
ULONG FieldIndex,
PWSTR ReturnBuffer,
PULONG RequiredSize);
extern BOOLEAN InfGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- PLONG IntegerValue);
+ INT *IntegerValue);
extern BOOLEAN InfGetMultiSzField(PINFCONTEXT Context,
ULONG FieldIndex,
PWSTR ReturnBuffer,
BOOLEAN
InfGetIntField(PINFCONTEXT Context,
ULONG FieldIndex,
- PLONG IntegerValue)
+ INT *IntegerValue)
{
return INF_SUCCESS(InfpGetIntField(Context, FieldIndex, IntegerValue));
}
return u.char2;
}
-FORCEINLINE
+static __inline
void
FillBuf(timebuf_t *buf, const struct tm *ptm)
{
#pragma once
+#define _MI_PAGING_LEVELS 4
+
/* Helper macros */
#define PAGE_MASK(x) ((x)&(~0xfff))
#define PAE_PAGE_MASK(x) ((x)&(~0xfffLL))
FORCEINLINE
MiAddressToPti(PVOID Address)
{
- ULONG64 Pti = (ULONG64)Address >> PTI_SHIFT;
- Pti &= PTI_MASK_AMD64;
- return Pti;
+ return ((((ULONG64)Address) >> PTI_SHIFT) & 0x1FF);
+}
+#define MiAddressToPteOffset(x) MiAddressToPti(x) // FIXME: bad name
+
+ULONG
+FORCEINLINE
+MiAddressToPxi(PVOID Address)
+{
+ return ((((ULONG64)Address) >> PXI_SHIFT) & 0x1FF);
}
-#define MiAddressToPteOffset(x) MiAddressToPti(x)
/* Convert a PTE into a corresponding address */
PVOID
struct _EPROCESS;
PULONG MmGetPageDirectory(VOID);
+#ifdef _PAE_
+#define _MI_PAGING_LEVELS 3
+#else
+#define _MI_PAGING_LEVELS 2
+#endif
+
#define PAGE_MASK(x) ((x)&(~0xfff))
#define PAE_PAGE_MASK(x) ((x)&(~0xfffLL))
//
// Allocates a new message
//
-FORCEINLINE
+static __inline
PLPCP_MESSAGE
LpcpAllocateFromPortZone(VOID)
{
MiInitializeLargePageSupport(VOID)
{
#if _MI_PAGING_LEVELS > 2
-#error "PAE/x64 Not Implemented"
+ DPRINT1("PAE/x64 Not Implemented\n");
+ ASSERT(FALSE);
#else
/* Initialize the large-page hyperspace PTE used for initial mapping */
MiLargePageHyperPte = MiReserveSystemPtes(1, SystemPteSpace);
#else
#error Define these please!
#endif
-static const
-ULONG
-MmProtectToPteMask[32] =
-{
- //
- // These are the base MM_ protection flags
- //
- 0,
- PTE_READONLY | PTE_ENABLE_CACHE,
- PTE_EXECUTE | PTE_ENABLE_CACHE,
- PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
- PTE_READWRITE | PTE_ENABLE_CACHE,
- PTE_WRITECOPY | PTE_ENABLE_CACHE,
- PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
- PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
- //
- // These OR in the MM_NOCACHE flag
- //
- 0,
- PTE_READONLY | PTE_DISABLE_CACHE,
- PTE_EXECUTE | PTE_DISABLE_CACHE,
- PTE_EXECUTE_READ | PTE_DISABLE_CACHE,
- PTE_READWRITE | PTE_DISABLE_CACHE,
- PTE_WRITECOPY | PTE_DISABLE_CACHE,
- PTE_EXECUTE_READWRITE | PTE_DISABLE_CACHE,
- PTE_EXECUTE_WRITECOPY | PTE_DISABLE_CACHE,
- //
- // These OR in the MM_DECOMMIT flag, which doesn't seem supported on x86/64/ARM
- //
- 0,
- PTE_READONLY | PTE_ENABLE_CACHE,
- PTE_EXECUTE | PTE_ENABLE_CACHE,
- PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
- PTE_READWRITE | PTE_ENABLE_CACHE,
- PTE_WRITECOPY | PTE_ENABLE_CACHE,
- PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
- PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
- //
- // These OR in the MM_NOACCESS flag, which seems to enable WriteCombining?
- //
- 0,
- PTE_READONLY | PTE_WRITECOMBINED_CACHE,
- PTE_EXECUTE | PTE_WRITECOMBINED_CACHE,
- PTE_EXECUTE_READ | PTE_WRITECOMBINED_CACHE,
- PTE_READWRITE | PTE_WRITECOMBINED_CACHE,
- PTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
- PTE_EXECUTE_READWRITE | PTE_WRITECOMBINED_CACHE,
- PTE_EXECUTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
-};
-
+
+extern const ULONG MmProtectToPteMask[32];
+
//
// Assertions for session images, addresses, and PTEs
//
NTAPI
MmIsAddressValid(IN PVOID VirtualAddress)
{
- //
- // Just check the Valid bit in the Address' PDE and PTE
- //
- if ((MiAddressToPde(VirtualAddress)->u.Hard.Valid == 0) ||
- (MiAddressToPte(VirtualAddress)->u.Hard.Valid == 0))
- {
- //
- // Attempting to access this page is guranteed to result in a page fault
- //
- return FALSE;
- }
+#if _MI_PAGING_LEVELS >= 4
+ /* Check if the PXE is valid */
+ if (MiAddressToPxe(VirtualAddress)->u.Hard.Valid == 0) return FALSE;
+#endif
- //
- // This address is valid now, but it will only stay so if the caller holds
- // the PFN lock
- //
+#if _MI_PAGING_LEVELS >= 3
+ /* Check if the PPE is valid */
+ if (MiAddressToPpe(VirtualAddress)->u.Hard.Valid == 0) return FALSE;
+#endif
+
+#if _MI_PAGING_LEVELS >= 2
+ /* Check if the PDE is valid */
+ if (MiAddressToPde(VirtualAddress)->u.Hard.Valid == 0) return FALSE;
+#endif
+
+ /* Check if the PTE is valid */
+ if (MiAddressToPte(VirtualAddress)->u.Hard.Valid == 0) return FALSE;
+
+ /* This address is valid now, but it will only stay so if the caller holds
+ * the PFN lock */
return TRUE;
}
return STATUS_SUCCESS;
}
+#ifdef _M_IX86
/* FIXME: Evaluate ways to make this portable yet arch-specific */
BOOLEAN
NTAPI
MiReleaseSystemPtes(PointerPte, 1, SystemPteSpace);
return TRUE;
}
+#endif
VOID
NTAPI
* PURPOSE: Low level memory managment manipulation
*
* PROGRAMMER: Timo Kreuzer (timo.kreuzer@reactos.org)
+ * ReactOS Portable Systems Group
*/
/* INCLUDES ***************************************************************/
#include <ntoskrnl.h>
#define NDEBUG
#include <debug.h>
+#include "../ARM3/miarm.h"
#undef InterlockedExchangePte
#define InterlockedExchangePte(pte1, pte2) \
/* GLOBALS *****************************************************************/
+const
+ULONG
+MmProtectToPteMask[32] =
+{
+ //
+ // These are the base MM_ protection flags
+ //
+ 0,
+ PTE_READONLY | PTE_ENABLE_CACHE,
+ PTE_EXECUTE | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
+ PTE_READWRITE | PTE_ENABLE_CACHE,
+ PTE_WRITECOPY | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
+ //
+ // These OR in the MM_NOCACHE flag
+ //
+ 0,
+ PTE_READONLY | PTE_DISABLE_CACHE,
+ PTE_EXECUTE | PTE_DISABLE_CACHE,
+ PTE_EXECUTE_READ | PTE_DISABLE_CACHE,
+ PTE_READWRITE | PTE_DISABLE_CACHE,
+ PTE_WRITECOPY | PTE_DISABLE_CACHE,
+ PTE_EXECUTE_READWRITE | PTE_DISABLE_CACHE,
+ PTE_EXECUTE_WRITECOPY | PTE_DISABLE_CACHE,
+ //
+ // These OR in the MM_DECOMMIT flag, which doesn't seem supported on x86/64/ARM
+ //
+ 0,
+ PTE_READONLY | PTE_ENABLE_CACHE,
+ PTE_EXECUTE | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
+ PTE_READWRITE | PTE_ENABLE_CACHE,
+ PTE_WRITECOPY | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
+ //
+ // These OR in the MM_NOACCESS flag, which seems to enable WriteCombining?
+ //
+ 0,
+ PTE_READONLY | PTE_WRITECOMBINED_CACHE,
+ PTE_EXECUTE | PTE_WRITECOMBINED_CACHE,
+ PTE_EXECUTE_READ | PTE_WRITECOMBINED_CACHE,
+ PTE_READWRITE | PTE_WRITECOMBINED_CACHE,
+ PTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
+ PTE_EXECUTE_READWRITE | PTE_WRITECOMBINED_CACHE,
+ PTE_EXECUTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
+};
/* PRIVATE FUNCTIONS *******************************************************/
return MmCreateVirtualMappingUnsafe(Process, Address, Protect, Pages, PageCount);
}
-NTSTATUS
-NTAPI
-MmInitializeHandBuiltProcess(IN PEPROCESS Process,
- IN PULONG_PTR DirectoryTableBase)
-{
- /* Share the directory base with the idle process */
- DirectoryTableBase[0] = PsGetCurrentProcess()->Pcb.DirectoryTableBase[0];
- DirectoryTableBase[1] = PsGetCurrentProcess()->Pcb.DirectoryTableBase[1];
-
- /* Initialize the Addresss Space */
- KeInitializeGuardedMutex(&Process->AddressCreationLock);
- Process->Vm.WorkingSetExpansionLinks.Flink = NULL;
- ASSERT(Process->VadRoot.NumberGenericTableElements == 0);
- Process->VadRoot.BalancedRoot.u1.Parent = &Process->VadRoot.BalancedRoot;
-
- /* The process now has an address space */
- Process->HasAddressSpace = TRUE;
- return STATUS_SUCCESS;
-}
-
BOOLEAN
NTAPI
MmCreateProcessAddressSpace(IN ULONG MinWs,
IN PEPROCESS Process,
- IN PULONG_PTR DirectoryTableBase)
+ OUT PULONG_PTR DirectoryTableBase)
{
- UNIMPLEMENTED;
- return 0;
+ KIRQL OldIrql;
+ PFN_NUMBER TableBasePfn, HyperPfn;
+ PMMPTE PointerPte;
+ MMPTE TempPte, PdePte;
+ ULONG TableIndex;
+ PMMPTE SystemTable;
+
+ /* No page colors yet */
+ Process->NextPageColor = 0;
+
+ /* Setup the hyperspace lock */
+ KeInitializeSpinLock(&Process->HyperSpaceLock);
+
+ /* Lock PFN database */
+ OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
+
+ /* Get a page for the table base and for hyperspace */
+ TableBasePfn = MiRemoveAnyPage(0);
+ HyperPfn = MiRemoveAnyPage(0);
+
+ /* Release PFN lock */
+ KeReleaseQueuedSpinLock(LockQueuePfnLock, OldIrql);
+
+ /* Zero both pages */
+ MiZeroPhysicalPage(TableBasePfn);
+ MiZeroPhysicalPage(HyperPfn);
+
+ /* Set the base directory pointers */
+ DirectoryTableBase[0] = TableBasePfn << PAGE_SHIFT;
+ DirectoryTableBase[1] = HyperPfn << PAGE_SHIFT;
+
+ /* Make sure we don't already have a page directory setup */
+ ASSERT(Process->Pcb.DirectoryTableBase[0] == 0);
+
+ /* Insert us into the Mm process list */
+ InsertTailList(&MmProcessList, &Process->MmProcessLinks);
+
+ /* Get a PTE to map the page directory */
+ PointerPte = MiReserveSystemPtes(1, SystemPteSpace);
+ ASSERT(PointerPte != NULL);
+
+ /* Build it */
+ MI_MAKE_HARDWARE_PTE_KERNEL(&PdePte,
+ PointerPte,
+ MM_READWRITE,
+ TableBasePfn);
+
+ /* Set it dirty and map it */
+ PdePte.u.Hard.Dirty = TRUE;
+ MI_WRITE_VALID_PTE(PointerPte, PdePte);
+
+ /* Now get the page directory (which we'll double map, so call it a page table */
+ SystemTable = MiPteToAddress(PointerPte);
+
+ /* Copy all the kernel mappings */
+ TableIndex = MiAddressToPxi(MmSystemRangeStart);
+
+ RtlCopyMemory(&SystemTable[TableIndex],
+ MiAddressToPxe(MmSystemRangeStart),
+ PAGE_SIZE - TableIndex * sizeof(MMPTE));
+
+ /* Now write the PTE/PDE entry for hyperspace itself */
+ TempPte = ValidKernelPte;
+ TempPte.u.Hard.PageFrameNumber = HyperPfn;
+ TableIndex = MiAddressToPxi(HYPER_SPACE);
+ SystemTable[TableIndex] = TempPte;
+
+ /* Sanity check */
+ ASSERT(MiAddressToPxi(MmHyperSpaceEnd) > TableIndex);
+
+ /* Now do the x86 trick of making the PDE a page table itself */
+ TableIndex = MiAddressToPxi(PTE_BASE);
+ TempPte.u.Hard.PageFrameNumber = TableBasePfn;
+ SystemTable[TableIndex] = TempPte;
+
+ /* Let go of the system PTE */
+ MiReleaseSystemPtes(PointerPte, 1, SystemPteSpace);
+
+ /* Switch to phase 1 initialization */
+ ASSERT(Process->AddressSpaceInitialized == 0);
+ Process->AddressSpaceInitialized = 1;
+
+ return TRUE;
}
-BOOLEAN
-NTAPI
-_MmIsAddressValid(IN PVOID VirtualAddress)
-{
- /* Check all four page table levels */
- return (MiAddressToPxe(VirtualAddress)->u.Hard.Valid != 0 &&
- MiAddressToPpe(VirtualAddress)->u.Hard.Valid != 0 &&
- MiAddressToPde(VirtualAddress)->u.Hard.Valid != 0 &&
- MiAddressToPte(VirtualAddress)->u.Hard.Valid != 0);
-}
-
-
/* EOF */
#include <ntoskrnl.h>
#define NDEBUG
#include <debug.h>
+#include "../ARM3/miarm.h"
#if defined (ALLOC_PRAGMA)
#pragma alloc_text(INIT, MmInitGlobalKernelPageDirectory)
}
#endif
+const
+ULONG
+MmProtectToPteMask[32] =
+{
+ //
+ // These are the base MM_ protection flags
+ //
+ 0,
+ PTE_READONLY | PTE_ENABLE_CACHE,
+ PTE_EXECUTE | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
+ PTE_READWRITE | PTE_ENABLE_CACHE,
+ PTE_WRITECOPY | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
+ //
+ // These OR in the MM_NOCACHE flag
+ //
+ 0,
+ PTE_READONLY | PTE_DISABLE_CACHE,
+ PTE_EXECUTE | PTE_DISABLE_CACHE,
+ PTE_EXECUTE_READ | PTE_DISABLE_CACHE,
+ PTE_READWRITE | PTE_DISABLE_CACHE,
+ PTE_WRITECOPY | PTE_DISABLE_CACHE,
+ PTE_EXECUTE_READWRITE | PTE_DISABLE_CACHE,
+ PTE_EXECUTE_WRITECOPY | PTE_DISABLE_CACHE,
+ //
+ // These OR in the MM_DECOMMIT flag, which doesn't seem supported on x86/64/ARM
+ //
+ 0,
+ PTE_READONLY | PTE_ENABLE_CACHE,
+ PTE_EXECUTE | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
+ PTE_READWRITE | PTE_ENABLE_CACHE,
+ PTE_WRITECOPY | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
+ PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
+ //
+ // These OR in the MM_NOACCESS flag, which seems to enable WriteCombining?
+ //
+ 0,
+ PTE_READONLY | PTE_WRITECOMBINED_CACHE,
+ PTE_EXECUTE | PTE_WRITECOMBINED_CACHE,
+ PTE_EXECUTE_READ | PTE_WRITECOMBINED_CACHE,
+ PTE_READWRITE | PTE_WRITECOMBINED_CACHE,
+ PTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
+ PTE_EXECUTE_READWRITE | PTE_WRITECOMBINED_CACHE,
+ PTE_EXECUTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
+};
+
/* FUNCTIONS ***************************************************************/
BOOLEAN MmUnmapPageTable(PULONG Pt);
projects / reactos.git / commitdiff