[UNIATA]

- Update Uniata to 41b5. Thanks to Alter for the great driver and Olaf Siejka for preparing the patch, getting our changes upstream and testing the updated version.
See issue #7148 for more details.

svn path=/trunk/; revision=56870

diff --git a/reactos/drivers/storage/ide/uniata/bm_devs.h b/reactos/drivers/storage/ide/uniata/bm_devs.h
index 4eec376..0d876ae 100644 (file)
--- a/reactos/drivers/storage/ide/uniata/bm_devs.h
+++ b/reactos/drivers/storage/ide/uniata/bm_devs.h
@@ -273,8 +273,29 @@ typedef struct _BUSMASTER_CONTROLLER_INFORMATION {
 #define ATA_CPT_S3              0x1c088086
 #define ATA_CPT_S4              0x1c098086
 
+#define ATA_PBG_S1             0x1d008086
+#define ATA_PBG_AH1            0x1d028086
+#define ATA_PBG_R1             0x1d048086
+#define ATA_PBG_R2             0x1d068086
+#define ATA_PBG_R3             0x28268086
+#define ATA_PBG_S2             0x1d088086
+
+#define ATA_PPT_S1             0x1e008086
+#define ATA_PPT_S2             0x1e018086
+#define ATA_PPT_AH1            0x1e028086
+#define ATA_PPT_AH2            0x1e038086
+#define ATA_PPT_R1             0x1e048086
+#define ATA_PPT_R2             0x1e058086
+#define ATA_PPT_R3             0x1e068086
+#define ATA_PPT_R4             0x1e078086
+#define ATA_PPT_S3             0x1e088086
+#define ATA_PPT_S4             0x1e098086
+#define ATA_PPT_R5             0x1e0e8086
+#define ATA_PPT_R6             0x1e0f8086
+
 #define ATA_I31244              0x32008086
 #define ATA_ISCH                0x811a8086
+#define ATA_DH89XXCC            0x23238086
 
 #define ATA_JMICRON_ID          0x197b
 #define ATA_JMB360              0x2360197b
@@ -708,9 +729,9 @@ BUSMASTER_CONTROLLER_INFORMATION const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 4349, 1002, 0x00, ATA_UDMA5, "ATI IXP200"       , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 4369, 1002, 0x00, ATA_UDMA6, "ATI IXP300"       , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 4376, 1002, 0x00, ATA_UDMA6, "ATI IXP400"       , 0                                       ),
-    PCI_DEV_HW_SPEC_BM( 436e, 1002, 0x00, ATA_SA150, "ATI IXP300"       , SIIMIO |                UNIATA_SATA     ),
-    PCI_DEV_HW_SPEC_BM( 4379, 1002, 0x00, ATA_SA150, "ATI IXP400"       , SIIMIO | SIINOSATAIRQ | UNIATA_SATA     ),
-    PCI_DEV_HW_SPEC_BM( 437a, 1002, 0x00, ATA_SA300, "ATI IXP400"       , SIIMIO | SIINOSATAIRQ | UNIATA_SATA     ),
+    PCI_DEV_HW_SPEC_BM( 436e, 1002, 0x00, ATA_SA150, "ATI IXP300"       , SIIMIO | SIIBUG |                UNIATA_SATA     ),
+    PCI_DEV_HW_SPEC_BM( 4379, 1002, 0x00, ATA_SA150, "ATI IXP400"       , SIIMIO | SIIBUG | SIINOSATAIRQ | UNIATA_SATA     ),
+    PCI_DEV_HW_SPEC_BM( 437a, 1002, 0x00, ATA_SA300, "ATI IXP400"       , SIIMIO | SIIBUG | SIINOSATAIRQ | UNIATA_SATA     ),
     PCI_DEV_HW_SPEC_BM( 438c, 1002, 0x00, ATA_UDMA6, "ATI IXP600"       , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 4380, 1002, 0x00, ATA_SA150, "ATI IXP600"       , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 439c, 1002, 0x00, ATA_UDMA6, "ATI IXP700"       , 0                                       ),
@@ -784,11 +805,17 @@ BUSMASTER_CONTROLLER_INFORMATION const BusMasterAdapters[] = {
 
     PCI_DEV_HW_SPEC_BM( 2920, 8086, 0x00, ATA_SA300, "Intel ICH9"       , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 2926, 8086, 0x00, ATA_SA300, "Intel ICH9"       , I6CH2 | UNIATA_SATA                     ),
-    PCI_DEV_HW_SPEC_BM( 2921, 8086, 0x00, ATA_SA300, "Intel ICH9"       , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 282a, 8086, 0x00, ATA_SA300, "Intel ICH9"       , I6CH2 | UNIATA_SATA                     ),
+    PCI_DEV_HW_SPEC_BM( 2921, 8086, 0x00, ATA_SA300, "Intel ICH9"       , UNIATA_SATA | UNIATA_AHCI               ),/* ??? */
     PCI_DEV_HW_SPEC_BM( 2922, 8086, 0x00, ATA_SA300, "Intel ICH9"       , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 2923, 8086, 0x00, ATA_SA300, "Intel ICH9"       , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 2925, 8086, 0x00, ATA_SA300, "Intel ICH9"       , UNIATA_SATA | UNIATA_AHCI               ),
 
+    PCI_DEV_HW_SPEC_BM( 2928, 8086, 0x00, ATA_SA300, "Intel ICH9M"       , I6CH2 | UNIATA_SATA                     ),
+    PCI_DEV_HW_SPEC_BM( 2929, 8086, 0x00, ATA_SA300, "Intel ICH9M"       , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 292a, 8086, 0x00, ATA_SA300, "Intel ICH9M"       , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 292d, 8086, 0x00, ATA_SA300, "Intel ICH9M"       , I6CH2 | UNIATA_SATA                     ),
+    
     PCI_DEV_HW_SPEC_BM( 3a20, 8086, 0x00, ATA_SA300, "Intel ICH10"      , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 3a26, 8086, 0x00, ATA_SA300, "Intel ICH10"      , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 3a22, 8086, 0x00, ATA_SA300, "Intel ICH10"      , UNIATA_SATA | UNIATA_AHCI               ),
@@ -826,9 +853,29 @@ BUSMASTER_CONTROLLER_INFORMATION const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 1c08, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 1c09, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , I6CH2 | UNIATA_SATA                     ),
 
-//    PCI_DEV_HW_SPEC_BM( 3200, 8086, 0x00, ATA_SA150, "Intel 31244"      , UNIATA_SATA                             ),
-    PCI_DEV_HW_SPEC_BM( 3200, 8086, 0x00, ATA_UDMA5, "Intel SCH"        , I1CH                                    ),
+    PCI_DEV_HW_SPEC_BM( 1d00, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , I6CH | UNIATA_SATA                      ),
+    PCI_DEV_HW_SPEC_BM( 1d02, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1d04, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1d06, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 2826, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1d08, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , I6CH2 | UNIATA_SATA                     ),
+
+    PCI_DEV_HW_SPEC_BM( 1e00, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH | UNIATA_SATA                      ),
+    PCI_DEV_HW_SPEC_BM( 1e01, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH | UNIATA_SATA                      ),
+    PCI_DEV_HW_SPEC_BM( 1e02, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e03, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e04, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e05, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e06, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e07, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e08, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH2 | UNIATA_SATA                     ),
+    PCI_DEV_HW_SPEC_BM( 1e09, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH2 | UNIATA_SATA                     ),
+    PCI_DEV_HW_SPEC_BM( 1e0e, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e0f, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
 
+//    PCI_DEV_HW_SPEC_BM( 3200, 8086, 0x00, ATA_SA150, "Intel 31244"      , UNIATA_SATA                             ),
+    PCI_DEV_HW_SPEC_BM( 811a, 8086, 0x00, ATA_UDMA5, "Intel SCH"        , I1CH                                       ),
+    PCI_DEV_HW_SPEC_BM( 2323, 8086, 0x00, ATA_SA300, "Intel DH98xxCC"   , UNIATA_SATA | UNIATA_AHCI                  ),
 
     PCI_DEV_HW_SPEC_BM( 2360, 197b, 0x00, ATA_SA300, "JMB360"           , UNIATA_SATA | UNIATA_AHCI               ),
 

diff --git a/reactos/drivers/storage/ide/uniata/id_ata.cpp b/reactos/drivers/storage/ide/uniata/id_ata.cpp
index 73621da..0dd5bb5 100644 (file)
--- a/reactos/drivers/storage/ide/uniata/id_ata.cpp
+++ b/reactos/drivers/storage/ide/uniata/id_ata.cpp
@@ -2094,6 +2094,7 @@ AtapiResetController__(
             switch(VendorID) {
             case ATA_INTEL_ID: {
                 ULONG mask;
+                ULONG pshift;
                 ULONG timeout;
                 if(!(ChipFlags & UNIATA_SATA))
                     goto default_reset;
@@ -2117,7 +2118,7 @@ AtapiResetController__(
 #else
                 mask = 1 << chan->lun[0]->SATA_lun_map;
                 if (MaxLuns > 1) {
-                       mask |= (1 << chan->lun[1]->SATA_lun_map);
+                    mask |= (1 << chan->lun[1]->SATA_lun_map);
                 }
 #endif
                 ChangePciConfig2(0x92, a & ~mask);
@@ -2126,18 +2127,20 @@ AtapiResetController__(
                 timeout = 100;
 
                 /* Wait up to 1 sec for "connect well". */
-                if (ChipFlags & (I6CH | I6CH2))
-                    mask = mask << 8;
-                else
-                    mask = mask << 4;
-
+                if (ChipFlags & (I6CH | I6CH2)) {
+                    pshift = 8;
+                } else {
+                    pshift = 4;
+                }
                 while (timeout--) {
-                    AtapiStallExecution(10000);
                     GetPciConfig2(0x92, tmp16);
-                    if ((tmp16 & mask) == mask) {
-                        AtapiStallExecution(10000);
-                        break;
+                    if (((tmp16 >> pshift) & mask) == mask) {
+                        GetBaseStatus(chan, statusByte);
+                        if(statusByte != 0xff) {
+                            break;
+                        }
                     }
+                    AtapiStallExecution(10000);
                 }
                 break; }
             case ATA_SIS_ID:
@@ -3729,7 +3732,7 @@ AtapiCheckInterrupt__(
 {
     PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
     PHW_CHANNEL chan = &(deviceExtension->chan[c]);
-    PHW_LU_EXTENSION LunExt;
+    PHW_LU_EXTENSION LunExt = chan->lun[chan->cur_cdev];
 
     ULONG VendorID  = deviceExtension->DevID & 0xffff;
     ULONG ChipType  = deviceExtension->HwFlags & CHIPTYPE_MASK;
@@ -3986,6 +3989,11 @@ check_unknown:
                 if(statusByte & IDE_STATUS_ERROR) {
                     KdPrint2((PRINT_PREFIX "  IDE_STATUS_ERROR -> our\n", statusByte));
                     OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
+                } else
+                if ((statusByte & IDE_STATUS_DSC) &&
+                    (LunExt->DeviceFlags & DFLAGS_ATAPI_DEVICE) &&
+                    (dma_status == BM_STATUS_ACTIVE)) {
+                    KdPrint2((PRINT_PREFIX "  special case DMA + ATAPI + IDE_STATUS_DSC -> our\n", statusByte));
                 } else {
                     return INTERRUPT_REASON_IGNORE;
                 }
@@ -4005,7 +4013,6 @@ skip_dma_stat_check:
         AtapiStallExecution(1);
     }
 
-    LunExt = chan->lun[chan->cur_cdev];
     /* if drive is busy it didn't interrupt */
     /* the exception is DCS + BSY state of ATAPI devices */
     KdPrint2((PRINT_PREFIX "  getting status...\n"));
@@ -8858,17 +8865,18 @@ DriverEntry(
             }
             continue;
         }
+        //BMList[i].AltInitMasterDev = (UCHAR)0xff;
+
         if(GlobalConfig->AtDiskPrimaryAddressClaimed)
             PrimaryClaimed = TRUE;
         if(GlobalConfig->AtDiskSecondaryAddressClaimed)
             SecondaryClaimed = TRUE;
 
-        BMList[i].AltInitMasterDev = (UCHAR)0xff;
-
         if(g_opt_Verbose) {
             _PrintNtConsole("Init standard Dual-channel PCI ATA controller:");
         }
 
+
         for(alt = 0; alt < (ULONG)(WinVer_WDM_Model ? 1 : 2) ; alt++) {
 
             for(c=0; c<2; c++) {

diff --git a/reactos/drivers/storage/ide/uniata/id_init.cpp b/reactos/drivers/storage/ide/uniata/id_init.cpp
index e34f3de..35684ee 100644 (file)
--- a/reactos/drivers/storage/ide/uniata/id_init.cpp
+++ b/reactos/drivers/storage/ide/uniata/id_init.cpp
@@ -132,6 +132,9 @@ UniataChipDetectChannels(
     case ATA_SILICON_IMAGE_ID:
 
         if(ChipFlags & SIIBUG) {
+            /* work around errata in early chips */
+            ConfigInfo->AlignmentMask = 0x1fff;
+            deviceExtension->MaximumDmaTransferLength = 15 * DEV_BSIZE;
         }
         if(ChipType != SIIMIO) {
             break;
@@ -177,7 +180,8 @@ UniataChipDetectChannels(
         break;
     case ATA_INTEL_ID:
         /* New Intel PATA controllers */
-        if(/*deviceExtension->DevID == 0x27df8086 ||
+        if(g_opt_VirtualMachine != VM_VBOX &&
+           /*deviceExtension->DevID == 0x27df8086 ||
            deviceExtension->DevID == 0x269e8086 ||
            deviceExtension->DevID == ATA_I82801HBM*/
            ChipFlags & I1CH) { 
@@ -855,32 +859,6 @@ for_ugly_chips:
             ULONG IoSize = 0;
             ULONG BaseMemAddress = 0;
 
-            /*
-             * vt6420/1 has problems talking to some drives.  The following
-             * is based on the fix from Joseph Chan <JosephChan@via.com.tw>.
-             *
-             * When host issues HOLD, device may send up to 20DW of data
-             * before acknowledging it with HOLDA and the host should be
-             * able to buffer them in FIFO.  Unfortunately, some WD drives
-             * send upto 40DW before acknowledging HOLD and, in the
-             * default configuration, this ends up overflowing vt6421's
-             * FIFO, making the controller abort the transaction with
-             * R_ERR.
-             *
-             * Rx52[2] is the internal 128DW FIFO Flow control watermark
-             * adjusting mechanism enable bit and the default value 0
-             * means host will issue HOLD to device when the left FIFO
-             * size goes below 32DW.  Setting it to 1 makes the watermark
-             * 64DW.
-             *
-             * http://www.reactos.org/bugzilla/show_bug.cgi?id=6500
-             */
-
-            if(DeviceID == 0x3149 || DeviceID == 0x3249) {    //vt6420 or vt6421
-                KdPrint2((PRINT_PREFIX "VIA 642x FIFO\n"));
-                ChangePciConfig1(0x52, a | (1 << 2));
-            }
-
             switch(DeviceID) {
             case 0x3149: // VIA 6420
                 KdPrint2((PRINT_PREFIX "VIA 6420\n"));
@@ -1040,11 +1018,18 @@ for_ugly_chips:
             deviceExtension->HwFlags &= ~UNIATA_AHCI;
 
             /* if BAR(5) is IO it should point to SATA interface registers */
-            BaseMemAddress = AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
+            if(deviceExtension->DevID == 0x28288086 &&
+                pciData->u.type0.SubVendorID == 0x106b) {
+                BaseMemAddress = 0;
+                KdPrint2((PRINT_PREFIX "Ignore BAR5 on ICH8M Apples\n"));
+            } else {
+                /* Skip BAR(5) on ICH8M Apples, system locks up on access. */
+                BaseMemAddress = AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
                                     5, 0, 0x10);
-            if(BaseMemAddress && (*ConfigInfo->AccessRanges)[5].RangeInMemory) {
-                KdPrint2((PRINT_PREFIX "MemIo\n"));
-                MemIo = TRUE;
+                if(BaseMemAddress && (*ConfigInfo->AccessRanges)[5].RangeInMemory) {
+                    KdPrint2((PRINT_PREFIX "MemIo\n"));
+                    MemIo = TRUE;
+                }
             }
             deviceExtension->BaseIoAddressSATA_0.Addr  = BaseMemAddress;
             deviceExtension->BaseIoAddressSATA_0.MemIo = MemIo;
@@ -1589,9 +1574,7 @@ AtapiChipInit(
     ULONG slotNumber = deviceExtension->slotNumber;
     ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
     ULONG VendorID =  deviceExtension->DevID        & 0xffff;
-#ifdef _DEBUG
     ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff;
-#endif
     ULONG RevID    =  deviceExtension->RevID;
 //    ULONG i;
 //    BUSMASTER_CONTROLLER_INFORMATION* DevTypeInfo;
@@ -1796,7 +1779,7 @@ AtapiChipInit(
                 if(ChipFlags & I6CH2) {
                     KdPrint2((PRINT_PREFIX "I6CH2\n"));
                     chan->ChannelCtrlFlags |= CTRFLAGS_NO_SLAVE;
-                    chan->lun[0]->SATA_lun_map = c ? 4 : 5;
+                    chan->lun[0]->SATA_lun_map = c ? 0 : 1;
                     chan->lun[1]->SATA_lun_map = 0;
                 } else {
                     KdPrint2((PRINT_PREFIX "other Intel\n"));
@@ -2158,6 +2141,33 @@ AtapiChipInit(
             if(ChipFlags & (UNIATA_SATA | VIASATA)) {
                 /* enable PCI interrupt */
                 ChangePciConfig2(/*PCIR_COMMAND*/0x04, (a & ~0x0400));
+
+               /*
+                * vt6420/1 has problems talking to some drives.  The following
+                * is based on the fix from Joseph Chan <JosephChan@via.com.tw>.
+                *
+                * When host issues HOLD, device may send up to 20DW of data
+                * before acknowledging it with HOLDA and the host should be
+                * able to buffer them in FIFO.  Unfortunately, some WD drives
+                * send upto 40DW before acknowledging HOLD and, in the
+                * default configuration, this ends up overflowing vt6421's
+                * FIFO, making the controller abort the transaction with
+                * R_ERR.
+                *
+                * Rx52[2] is the internal 128DW FIFO Flow control watermark
+                * adjusting mechanism enable bit and the default value 0
+                * means host will issue HOLD to device when the left FIFO
+                * size goes below 32DW.  Setting it to 1 makes the watermark
+                * 64DW.
+                *
+                * http://www.reactos.org/bugzilla/show_bug.cgi?id=6500
+                */
+
+                if(DeviceID == 0x3149 || DeviceID == 0x3249) {    //vt6420 or vt6421
+                    KdPrint2((PRINT_PREFIX "VIA 642x FIFO\n"));
+                    ChangePciConfig1(0x52, a | (1 << 2));
+                }
+
                 break;
             }
 

diff --git a/reactos/drivers/storage/ide/uniata/id_probe.cpp b/reactos/drivers/storage/ide/uniata/id_probe.cpp
index dffdf07..f4868d7 100644 (file)
--- a/reactos/drivers/storage/ide/uniata/id_probe.cpp
+++ b/reactos/drivers/storage/ide/uniata/id_probe.cpp
@@ -2364,6 +2364,7 @@ AtapiFindController(
     }
 
     chan = &(deviceExtension->chan[0]);
+    AtapiSetupLunPtrs(chan, deviceExtension, 0);
 
     deviceExtension->AdapterInterfaceType =
     deviceExtension->OrigAdapterInterfaceType
@@ -2422,7 +2423,7 @@ AtapiFindController(
         portBase = AtapiRegCheckDevValue(deviceExtension, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"PortBase", portBase);
         irq      = AtapiRegCheckDevValue(deviceExtension, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"Irq", irq);
         
-        for (i = 0; i < 4; i++) {
+        for (i = 0; i < deviceExtension->NumberLuns; i++) {
             // Zero device fields to ensure that if earlier devices were found,
             // but not claimed, the fields are cleared.
             deviceExtension->lun[i].DeviceFlags &= ~(DFLAGS_ATAPI_DEVICE | DFLAGS_DEVICE_PRESENT | DFLAGS_TAPE_DEVICE);
@@ -2850,6 +2851,7 @@ CheckDevice(
         AtapiSoftReset(chan, deviceNumber);
 
         if(!UniataAnybodyHome(HwDeviceExtension, lChannel, deviceNumber)) {
+            //KdPrint2((PRINT_PREFIX "CheckDevice: nobody at home 1\n"));
             return 0;
         }
         statusByte = WaitOnBusy(chan);
@@ -2905,6 +2907,7 @@ CheckDevice(
         SelectDrive(chan, deviceNumber);
 
         if(!UniataAnybodyHome(HwDeviceExtension, lChannel, deviceNumber)) {
+            //KdPrint2((PRINT_PREFIX "CheckDevice: nobody at home 2\n"));
             return 0;
         }
 

diff --git a/reactos/drivers/storage/ide/uniata/id_sata.cpp b/reactos/drivers/storage/ide/uniata/id_sata.cpp
index a48d6e0..71676df 100644 (file)
--- a/reactos/drivers/storage/ide/uniata/id_sata.cpp
+++ b/reactos/drivers/storage/ide/uniata/id_sata.cpp
@@ -1045,8 +1045,14 @@ UniataAhciSendCommand(
     UniataAhciWriteChannelPort4(chan, IDX_AHCI_P_IS, IS.Reg);
 
     if (timeout && (i >= timeout)) {
+        ULONG TFD;
+
         SError = AtapiReadPort4(chan, IDX_SATA_SError);
         KdPrint((" AHCI: timeout, SError %#x\n", SError));
+
+        TFD = UniataAhciReadChannelPort4(chan, IDX_AHCI_P_TFD);
+        KdPrint2(("  TFD %#x\n", TFD));
+        
         return 0xff;
     }
 

diff --git a/reactos/drivers/storage/ide/uniata/uniata_ver.h b/reactos/drivers/storage/ide/uniata/uniata_ver.h
index d0a5d88..dc15aed 100644 (file)
--- a/reactos/drivers/storage/ide/uniata/uniata_ver.h
+++ b/reactos/drivers/storage/ide/uniata/uniata_ver.h
@@ -1,10 +1,10 @@
-#define UNIATA_VER_STR         "41b2"
-#define UNIATA_VER_DOT         0.41.2.2
+#define UNIATA_VER_STR         "41b5"
+#define UNIATA_VER_DOT         0.41.2.5
 #define UNIATA_VER_MJ          0
 #define UNIATA_VER_MN          41
 #define UNIATA_VER_SUB_MJ      2
-#define UNIATA_VER_SUB_MN      2
-#define UNIATA_VER_DOT_COMMA   0,41,2,2
-#define UNIATA_VER_DOT_STR     "0.41.2.2"
-#define UNIATA_VER_YEAR        2011
-#define UNIATA_VER_YEAR_STR    "2011"
+#define UNIATA_VER_SUB_MN      5
+#define UNIATA_VER_DOT_COMMA   0,41,2,5
+#define UNIATA_VER_DOT_STR     "0.41.2.5"
+#define UNIATA_VER_YEAR        2012
+#define UNIATA_VER_YEAR_STR    "2012"