- Implement _mm_sfence, _mm_lfence, __faststorefence (for amd64)
- Don't use __sync_synchronize() for _ReadWriteBarrier, as it issues an mfence instruction and this is not what we want
- Remove "BUGBUG" comment, because the fact that _ReadBarrier and _WriteBarrier are full (compiler) barriers isn't critical.
svn path=/trunk/; revision=50456
#define _alloca(s) __builtin_alloca(s)
#endif
#define _alloca(s) __builtin_alloca(s)
#endif
-/*** Atomic operations ***/
+/*** Memory barriers ***/
-#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
-#define _ReadWriteBarrier() __sync_synchronize()
-#else
-__INTRIN_INLINE void _MemoryBarrier(void)
+#ifdef _x86_64
+__INTRIN_INLINE void __faststorefence(void)
- __asm__ __volatile__("" : : : "memory");
+ long local;
+ __asm__ __volatile__("lock; orl $0, %0;" : : "m"(local));
-#define _ReadWriteBarrier() _MemoryBarrier()
-/* BUGBUG: GCC only supports full barriers */
+__INTRIN_INLINE void _mm_lfence(void)
+{
+ __asm__ __volatile__("lfence");
+}
+
+__INTRIN_INLINE void _mm_sfence(void)
+{
+ __asm__ __volatile__("sfence");
+}
+
+__INTRIN_INLINE void _ReadWriteBarrier(void)
+{
+ __asm__ __volatile__("" : : : "memory");
+}
+
+/* GCC only supports full barriers */
#define _ReadBarrier _ReadWriteBarrier
#define _WriteBarrier _ReadWriteBarrier
#define _ReadBarrier _ReadWriteBarrier
#define _WriteBarrier _ReadWriteBarrier
+/*** Atomic operations ***/
+
#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char * const Destination, const char Exchange, const char Comperand)
#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char * const Destination, const char Exchange, const char Comperand)