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[reactos.git] / drivers / bus / pcix / pci.h
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/bus/pci/pci.h
5 * PURPOSE: Main Header File
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 #ifndef _PCIX_PCH_
10 #define _PCIX_PCH_
11
12 #include <ntifs.h>
13 #include <wdmguid.h>
14 #include <wchar.h>
15 #include <acpiioct.h>
16 #include <drivers/pci/pci.h>
17 #include <drivers/acpi/acpi.h>
18 #include <ndk/halfuncs.h>
19 #include <ndk/rtlfuncs.h>
20 #include <ndk/vffuncs.h>
21 #include <arbiter.h>
22 #include <cmreslist.h>
23
24 //
25 // Tag used in all pool allocations (Pci Bus)
26 //
27 #define PCI_POOL_TAG 'BicP'
28
29 //
30 // Checks if the specified FDO is the FDO for the Root PCI Bus
31 //
32 #define PCI_IS_ROOT_FDO(x) ((x)->BusRootFdoExtension == x)
33
34 //
35 // Assertions to make sure we are dealing with the right kind of extension
36 //
37 #define ASSERT_FDO(x) ASSERT((x)->ExtensionType == PciFdoExtensionType);
38 #define ASSERT_PDO(x) ASSERT((x)->ExtensionType == PciPdoExtensionType);
39
40 //
41 // PCI Hack Entry Name Lengths
42 //
43 #define PCI_HACK_ENTRY_SIZE sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
44 #define PCI_HACK_ENTRY_REV_SIZE sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
45 #define PCI_HACK_ENTRY_SUBSYS_SIZE sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
46 #define PCI_HACK_ENTRY_FULL_SIZE sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
47
48 //
49 // PCI Hack Entry Flags
50 //
51 #define PCI_HACK_HAS_REVISION_INFO 0x01
52 #define PCI_HACK_HAS_SUBSYSTEM_INFO 0x02
53
54 //
55 // PCI Interface Flags
56 //
57 #define PCI_INTERFACE_PDO 0x01
58 #define PCI_INTERFACE_FDO 0x02
59 #define PCI_INTERFACE_ROOT 0x04
60
61 //
62 // PCI Skip Function Flags
63 //
64 #define PCI_SKIP_DEVICE_ENUMERATION 0x01
65 #define PCI_SKIP_RESOURCE_ENUMERATION 0x02
66
67 //
68 // PCI Apply Hack Flags
69 //
70 #define PCI_HACK_FIXUP_BEFORE_CONFIGURATION 0x00
71 #define PCI_HACK_FIXUP_AFTER_CONFIGURATION 0x01
72 #define PCI_HACK_FIXUP_BEFORE_UPDATE 0x03
73
74 //
75 // PCI Debugging Device Support
76 //
77 #define MAX_DEBUGGING_DEVICES_SUPPORTED 0x04
78
79 //
80 // PCI Driver Verifier Failures
81 //
82 #define PCI_VERIFIER_CODES 0x04
83
84 //
85 // PCI ID Buffer ANSI Strings
86 //
87 #define MAX_ANSI_STRINGS 0x08
88
89 //
90 // Device Extension, Interface, Translator and Arbiter Signatures
91 //
92 typedef enum _PCI_SIGNATURE
93 {
94 PciPdoExtensionType = 'icP0',
95 PciFdoExtensionType = 'icP1',
96 PciArb_Io = 'icP2',
97 PciArb_Memory = 'icP3',
98 PciArb_Interrupt = 'icP4',
99 PciArb_BusNumber = 'icP5',
100 PciTrans_Interrupt = 'icP6',
101 PciInterface_BusHandler = 'icP7',
102 PciInterface_IntRouteHandler = 'icP8',
103 PciInterface_PciCb = 'icP9',
104 PciInterface_LegacyDeviceDetection = 'icP:',
105 PciInterface_PmeHandler = 'icP;',
106 PciInterface_DevicePresent = 'icP<',
107 PciInterface_NativeIde = 'icP=',
108 PciInterface_AgpTarget = 'icP>',
109 PciInterface_Location = 'icP?'
110 } PCI_SIGNATURE, *PPCI_SIGNATURE;
111
112 //
113 // Driver-handled PCI Device Types
114 //
115 typedef enum _PCI_DEVICE_TYPES
116 {
117 PciTypeInvalid,
118 PciTypeHostBridge,
119 PciTypePciBridge,
120 PciTypeCardbusBridge,
121 PciTypeDevice
122 } PCI_DEVICE_TYPES;
123
124 //
125 // Device Extension Logic States
126 //
127 typedef enum _PCI_STATE
128 {
129 PciNotStarted,
130 PciStarted,
131 PciDeleted,
132 PciStopped,
133 PciSurpriseRemoved,
134 PciSynchronizedOperation,
135 PciMaxObjectState
136 } PCI_STATE;
137
138 //
139 // IRP Dispatch Logic Style
140 //
141 typedef enum _PCI_DISPATCH_STYLE
142 {
143 IRP_COMPLETE,
144 IRP_DOWNWARD,
145 IRP_UPWARD,
146 IRP_DISPATCH,
147 } PCI_DISPATCH_STYLE;
148
149 //
150 // PCI Hack Entry Information
151 //
152 typedef struct _PCI_HACK_ENTRY
153 {
154 USHORT VendorID;
155 USHORT DeviceID;
156 USHORT SubVendorID;
157 USHORT SubSystemID;
158 ULONGLONG HackFlags;
159 USHORT RevisionID;
160 UCHAR Flags;
161 } PCI_HACK_ENTRY, *PPCI_HACK_ENTRY;
162
163 //
164 // Power State Information for Device Extension
165 //
166 typedef struct _PCI_POWER_STATE
167 {
168 SYSTEM_POWER_STATE CurrentSystemState;
169 DEVICE_POWER_STATE CurrentDeviceState;
170 SYSTEM_POWER_STATE SystemWakeLevel;
171 DEVICE_POWER_STATE DeviceWakeLevel;
172 DEVICE_POWER_STATE SystemStateMapping[7];
173 PIRP WaitWakeIrp;
174 PVOID SavedCancelRoutine;
175 LONG Paging;
176 LONG Hibernate;
177 LONG CrashDump;
178 } PCI_POWER_STATE, *PPCI_POWER_STATE;
179
180 //
181 // Internal PCI Lock Structure
182 //
183 typedef struct _PCI_LOCK
184 {
185 LONG Atom;
186 BOOLEAN OldIrql;
187 } PCI_LOCK, *PPCI_LOCK;
188
189 //
190 // Device Extension for a Bus FDO
191 //
192 typedef struct _PCI_FDO_EXTENSION
193 {
194 SINGLE_LIST_ENTRY List;
195 ULONG ExtensionType;
196 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
197 BOOLEAN DeviceState;
198 BOOLEAN TentativeNextState;
199 KEVENT SecondaryExtLock;
200 PDEVICE_OBJECT PhysicalDeviceObject;
201 PDEVICE_OBJECT FunctionalDeviceObject;
202 PDEVICE_OBJECT AttachedDeviceObject;
203 KEVENT ChildListLock;
204 struct _PCI_PDO_EXTENSION *ChildPdoList;
205 struct _PCI_FDO_EXTENSION *BusRootFdoExtension;
206 struct _PCI_FDO_EXTENSION *ParentFdoExtension;
207 struct _PCI_PDO_EXTENSION *ChildBridgePdoList;
208 PPCI_BUS_INTERFACE_STANDARD PciBusInterface;
209 BOOLEAN MaxSubordinateBus;
210 BUS_HANDLER *BusHandler;
211 BOOLEAN BaseBus;
212 BOOLEAN Fake;
213 BOOLEAN ChildDelete;
214 BOOLEAN Scanned;
215 BOOLEAN ArbitersInitialized;
216 BOOLEAN BrokenVideoHackApplied;
217 BOOLEAN Hibernated;
218 PCI_POWER_STATE PowerState;
219 SINGLE_LIST_ENTRY SecondaryExtension;
220 LONG ChildWaitWakeCount;
221 PPCI_COMMON_CONFIG PreservedConfig;
222 PCI_LOCK Lock;
223 struct
224 {
225 BOOLEAN Acquired;
226 BOOLEAN CacheLineSize;
227 BOOLEAN LatencyTimer;
228 BOOLEAN EnablePERR;
229 BOOLEAN EnableSERR;
230 } HotPlugParameters;
231 LONG BusHackFlags;
232 } PCI_FDO_EXTENSION, *PPCI_FDO_EXTENSION;
233
234 typedef struct _PCI_FUNCTION_RESOURCES
235 {
236 IO_RESOURCE_DESCRIPTOR Limit[7];
237 CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7];
238 } PCI_FUNCTION_RESOURCES, *PPCI_FUNCTION_RESOURCES;
239
240 typedef union _PCI_HEADER_TYPE_DEPENDENT
241 {
242 struct
243 {
244 UCHAR Spare[4];
245 } type0;
246 struct
247 {
248 UCHAR PrimaryBus;
249 UCHAR SecondaryBus;
250 UCHAR SubordinateBus;
251 UCHAR SubtractiveDecode:1;
252 UCHAR IsaBitSet:1;
253 UCHAR VgaBitSet:1;
254 UCHAR WeChangedBusNumbers:1;
255 UCHAR IsaBitRequired:1;
256 } type1;
257 struct
258 {
259 UCHAR Spare[4];
260 } type2;
261 } PCI_HEADER_TYPE_DEPENDENT, *PPCI_HEADER_TYPE_DEPENDENT;
262
263 typedef struct _PCI_PDO_EXTENSION
264 {
265 PVOID Next;
266 ULONG ExtensionType;
267 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
268 BOOLEAN DeviceState;
269 BOOLEAN TentativeNextState;
270
271 KEVENT SecondaryExtLock;
272 PCI_SLOT_NUMBER Slot;
273 PDEVICE_OBJECT PhysicalDeviceObject;
274 PPCI_FDO_EXTENSION ParentFdoExtension;
275 SINGLE_LIST_ENTRY SecondaryExtension;
276 LONG BusInterfaceReferenceCount;
277 LONG AgpInterfaceReferenceCount;
278 USHORT VendorId;
279 USHORT DeviceId;
280 USHORT SubsystemVendorId;
281 USHORT SubsystemId;
282 BOOLEAN RevisionId;
283 BOOLEAN ProgIf;
284 BOOLEAN SubClass;
285 BOOLEAN BaseClass;
286 BOOLEAN AdditionalResourceCount;
287 BOOLEAN AdjustedInterruptLine;
288 BOOLEAN InterruptPin;
289 BOOLEAN RawInterruptLine;
290 BOOLEAN CapabilitiesPtr;
291 BOOLEAN SavedLatencyTimer;
292 BOOLEAN SavedCacheLineSize;
293 BOOLEAN HeaderType;
294 BOOLEAN NotPresent;
295 BOOLEAN ReportedMissing;
296 BOOLEAN ExpectedWritebackFailure;
297 BOOLEAN NoTouchPmeEnable;
298 BOOLEAN LegacyDriver;
299 BOOLEAN UpdateHardware;
300 BOOLEAN MovedDevice;
301 BOOLEAN DisablePowerDown;
302 BOOLEAN NeedsHotPlugConfiguration;
303 BOOLEAN IDEInNativeMode;
304 BOOLEAN BIOSAllowsIDESwitchToNativeMode;
305 BOOLEAN IoSpaceUnderNativeIdeControl;
306 BOOLEAN OnDebugPath;
307 BOOLEAN IoSpaceNotRequired;
308 PCI_POWER_STATE PowerState;
309 PCI_HEADER_TYPE_DEPENDENT Dependent;
310 ULONGLONG HackFlags;
311 PCI_FUNCTION_RESOURCES *Resources;
312 PCI_FDO_EXTENSION *BridgeFdoExtension;
313 struct _PCI_PDO_EXTENSION *NextBridge;
314 struct _PCI_PDO_EXTENSION *NextHashEntry;
315 PCI_LOCK Lock;
316 PCI_PMC PowerCapabilities;
317 BOOLEAN TargetAgpCapabilityId;
318 USHORT CommandEnables;
319 USHORT InitialCommand;
320 } PCI_PDO_EXTENSION, *PPCI_PDO_EXTENSION;
321
322 //
323 // IRP Dispatch Function Type
324 //
325 typedef NTSTATUS (NTAPI *PCI_DISPATCH_FUNCTION)(
326 IN PIRP Irp,
327 IN PIO_STACK_LOCATION IoStackLocation,
328 IN PVOID DeviceExtension
329 );
330
331 //
332 // IRP Dispatch Minor Table
333 //
334 typedef struct _PCI_MN_DISPATCH_TABLE
335 {
336 PCI_DISPATCH_STYLE DispatchStyle;
337 PCI_DISPATCH_FUNCTION DispatchFunction;
338 } PCI_MN_DISPATCH_TABLE, *PPCI_MN_DISPATCH_TABLE;
339
340 //
341 // IRP Dispatch Major Table
342 //
343 typedef struct _PCI_MJ_DISPATCH_TABLE
344 {
345 ULONG PnpIrpMaximumMinorFunction;
346 PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable;
347 ULONG PowerIrpMaximumMinorFunction;
348 PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable;
349 PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle;
350 PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction;
351 PCI_DISPATCH_STYLE OtherIrpDispatchStyle;
352 PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction;
353 } PCI_MJ_DISPATCH_TABLE, *PPCI_MJ_DISPATCH_TABLE;
354
355 //
356 // Generic PCI Interface Constructor and Initializer
357 //
358 struct _PCI_INTERFACE;
359 typedef NTSTATUS (NTAPI *PCI_INTERFACE_CONSTRUCTOR)(
360 IN PVOID DeviceExtension,
361 IN PVOID Instance,
362 IN PVOID InterfaceData,
363 IN USHORT Version,
364 IN USHORT Size,
365 IN PINTERFACE Interface
366 );
367
368 typedef NTSTATUS (NTAPI *PCI_INTERFACE_INITIALIZER)(
369 IN PVOID Instance
370 );
371
372 //
373 // Generic PCI Interface (Interface, Translator, Arbiter)
374 //
375 typedef struct _PCI_INTERFACE
376 {
377 CONST GUID *InterfaceType;
378 USHORT MinSize;
379 USHORT MinVersion;
380 USHORT MaxVersion;
381 USHORT Flags;
382 LONG ReferenceCount;
383 PCI_SIGNATURE Signature;
384 PCI_INTERFACE_CONSTRUCTOR Constructor;
385 PCI_INTERFACE_INITIALIZER Initializer;
386 } PCI_INTERFACE, *PPCI_INTERFACE;
387
388 //
389 // Generic Secondary Extension Instance Header (Interface, Translator, Arbiter)
390 //
391 typedef struct PCI_SECONDARY_EXTENSION
392 {
393 SINGLE_LIST_ENTRY List;
394 PCI_SIGNATURE ExtensionType;
395 PVOID Destructor;
396 } PCI_SECONDARY_EXTENSION, *PPCI_SECONDARY_EXTENSION;
397
398 //
399 // PCI Arbiter Instance
400 //
401 typedef struct PCI_ARBITER_INSTANCE
402 {
403 PCI_SECONDARY_EXTENSION Header;
404 PPCI_INTERFACE Interface;
405 PPCI_FDO_EXTENSION BusFdoExtension;
406 WCHAR InstanceName[24];
407 ARBITER_INSTANCE CommonInstance;
408 } PCI_ARBITER_INSTANCE, *PPCI_ARBITER_INSTANCE;
409
410 //
411 // PCI Verifier Data
412 //
413 typedef struct _PCI_VERIFIER_DATA
414 {
415 ULONG FailureCode;
416 VF_FAILURE_CLASS FailureClass;
417 ULONG AssertionControl;
418 PCHAR DebuggerMessageText;
419 } PCI_VERIFIER_DATA, *PPCI_VERIFIER_DATA;
420
421 //
422 // PCI ID Buffer Descriptor
423 //
424 typedef struct _PCI_ID_BUFFER
425 {
426 ULONG Count;
427 ANSI_STRING Strings[MAX_ANSI_STRINGS];
428 ULONG StringSize[MAX_ANSI_STRINGS];
429 ULONG TotalLength;
430 PCHAR CharBuffer;
431 CHAR BufferData[256];
432 } PCI_ID_BUFFER, *PPCI_ID_BUFFER;
433
434 //
435 // PCI Configuration Callbacks
436 //
437 struct _PCI_CONFIGURATOR_CONTEXT;
438
439 typedef VOID (NTAPI *PCI_CONFIGURATOR_INITIALIZE)(
440 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
441 );
442
443 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESTORE_CURRENT)(
444 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
445 );
446
447 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_LIMITS)(
448 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
449 );
450
451 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS)(
452 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
453 );
454
455 typedef VOID (NTAPI *PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS)(
456 IN PPCI_PDO_EXTENSION PdoExtension,
457 IN PPCI_COMMON_HEADER PciData
458 );
459
460 typedef VOID (NTAPI *PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS)(
461 IN struct _PCI_CONFIGURATOR_CONTEXT* Context,
462 IN PPCI_COMMON_HEADER PciData,
463 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
464 );
465
466 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESET_DEVICE)(
467 IN PPCI_PDO_EXTENSION PdoExtension,
468 IN PPCI_COMMON_HEADER PciData
469 );
470
471 //
472 // PCI Configurator
473 //
474 typedef struct _PCI_CONFIGURATOR
475 {
476 PCI_CONFIGURATOR_INITIALIZE Initialize;
477 PCI_CONFIGURATOR_RESTORE_CURRENT RestoreCurrent;
478 PCI_CONFIGURATOR_SAVE_LIMITS SaveLimits;
479 PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS SaveCurrentSettings;
480 PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS ChangeResourceSettings;
481 PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS GetAdditionalResourceDescriptors;
482 PCI_CONFIGURATOR_RESET_DEVICE ResetDevice;
483 } PCI_CONFIGURATOR, *PPCI_CONFIGURATOR;
484
485 //
486 // PCI Configurator Context
487 //
488 typedef struct _PCI_CONFIGURATOR_CONTEXT
489 {
490 PPCI_PDO_EXTENSION PdoExtension;
491 PPCI_COMMON_HEADER Current;
492 PPCI_COMMON_HEADER PciData;
493 PPCI_CONFIGURATOR Configurator;
494 USHORT SecondaryStatus;
495 USHORT Status;
496 USHORT Command;
497 } PCI_CONFIGURATOR_CONTEXT, *PPCI_CONFIGURATOR_CONTEXT;
498
499 //
500 // PCI IPI Function
501 //
502 typedef VOID (NTAPI *PCI_IPI_FUNCTION)(
503 IN PVOID Reserved,
504 IN PVOID Context
505 );
506
507 //
508 // PCI IPI Context
509 //
510 typedef struct _PCI_IPI_CONTEXT
511 {
512 LONG RunCount;
513 ULONG Barrier;
514 PVOID DeviceExtension;
515 PCI_IPI_FUNCTION Function;
516 PVOID Context;
517 } PCI_IPI_CONTEXT, *PPCI_IPI_CONTEXT;
518
519 //
520 // PCI Legacy Device Location Cache
521 //
522 typedef struct _PCI_LEGACY_DEVICE
523 {
524 struct _PCI_LEGACY_DEVICE *Next;
525 PDEVICE_OBJECT DeviceObject;
526 ULONG BusNumber;
527 ULONG SlotNumber;
528 UCHAR InterruptLine;
529 UCHAR InterruptPin;
530 UCHAR BaseClass;
531 UCHAR SubClass;
532 PDEVICE_OBJECT PhysicalDeviceObject;
533 ROUTING_TOKEN RoutingToken;
534 PPCI_PDO_EXTENSION PdoExtension;
535 } PCI_LEGACY_DEVICE, *PPCI_LEGACY_DEVICE;
536
537 //
538 // IRP Dispatch Routines
539 //
540
541 DRIVER_DISPATCH PciDispatchIrp;
542
543 NTSTATUS
544 NTAPI
545 PciDispatchIrp(
546 IN PDEVICE_OBJECT DeviceObject,
547 IN PIRP Irp
548 );
549
550 NTSTATUS
551 NTAPI
552 PciIrpNotSupported(
553 IN PIRP Irp,
554 IN PIO_STACK_LOCATION IoStackLocation,
555 IN PPCI_FDO_EXTENSION DeviceExtension
556 );
557
558 NTSTATUS
559 NTAPI
560 PciPassIrpFromFdoToPdo(
561 IN PPCI_FDO_EXTENSION DeviceExtension,
562 IN PIRP Irp
563 );
564
565 NTSTATUS
566 NTAPI
567 PciCallDownIrpStack(
568 IN PPCI_FDO_EXTENSION DeviceExtension,
569 IN PIRP Irp
570 );
571
572 NTSTATUS
573 NTAPI
574 PciIrpInvalidDeviceRequest(
575 IN PIRP Irp,
576 IN PIO_STACK_LOCATION IoStackLocation,
577 IN PPCI_FDO_EXTENSION DeviceExtension
578 );
579
580 //
581 // Power Routines
582 //
583 NTSTATUS
584 NTAPI
585 PciFdoWaitWake(
586 IN PIRP Irp,
587 IN PIO_STACK_LOCATION IoStackLocation,
588 IN PPCI_FDO_EXTENSION DeviceExtension
589 );
590
591 NTSTATUS
592 NTAPI
593 PciFdoSetPowerState(
594 IN PIRP Irp,
595 IN PIO_STACK_LOCATION IoStackLocation,
596 IN PPCI_FDO_EXTENSION DeviceExtension
597 );
598
599 NTSTATUS
600 NTAPI
601 PciFdoIrpQueryPower(
602 IN PIRP Irp,
603 IN PIO_STACK_LOCATION IoStackLocation,
604 IN PPCI_FDO_EXTENSION DeviceExtension
605 );
606
607 NTSTATUS
608 NTAPI
609 PciSetPowerManagedDevicePowerState(
610 IN PPCI_PDO_EXTENSION DeviceExtension,
611 IN DEVICE_POWER_STATE DeviceState,
612 IN BOOLEAN IrpSet
613 );
614
615 //
616 // Bus FDO Routines
617 //
618
619 DRIVER_ADD_DEVICE PciAddDevice;
620
621 NTSTATUS
622 NTAPI
623 PciAddDevice(
624 IN PDRIVER_OBJECT DriverObject,
625 IN PDEVICE_OBJECT PhysicalDeviceObject
626 );
627
628 NTSTATUS
629 NTAPI
630 PciFdoIrpStartDevice(
631 IN PIRP Irp,
632 IN PIO_STACK_LOCATION IoStackLocation,
633 IN PPCI_FDO_EXTENSION DeviceExtension
634 );
635
636 NTSTATUS
637 NTAPI
638 PciFdoIrpQueryRemoveDevice(
639 IN PIRP Irp,
640 IN PIO_STACK_LOCATION IoStackLocation,
641 IN PPCI_FDO_EXTENSION DeviceExtension
642 );
643
644 NTSTATUS
645 NTAPI
646 PciFdoIrpRemoveDevice(
647 IN PIRP Irp,
648 IN PIO_STACK_LOCATION IoStackLocation,
649 IN PPCI_FDO_EXTENSION DeviceExtension
650 );
651
652 NTSTATUS
653 NTAPI
654 PciFdoIrpCancelRemoveDevice(
655 IN PIRP Irp,
656 IN PIO_STACK_LOCATION IoStackLocation,
657 IN PPCI_FDO_EXTENSION DeviceExtension
658 );
659
660 NTSTATUS
661 NTAPI
662 PciFdoIrpStopDevice(
663 IN PIRP Irp,
664 IN PIO_STACK_LOCATION IoStackLocation,
665 IN PPCI_FDO_EXTENSION DeviceExtension
666 );
667
668 NTSTATUS
669 NTAPI
670 PciFdoIrpQueryStopDevice(
671 IN PIRP Irp,
672 IN PIO_STACK_LOCATION IoStackLocation,
673 IN PPCI_FDO_EXTENSION DeviceExtension
674 );
675
676 NTSTATUS
677 NTAPI
678 PciFdoIrpCancelStopDevice(
679 IN PIRP Irp,
680 IN PIO_STACK_LOCATION IoStackLocation,
681 IN PPCI_FDO_EXTENSION DeviceExtension
682 );
683
684 NTSTATUS
685 NTAPI
686 PciFdoIrpQueryDeviceRelations(
687 IN PIRP Irp,
688 IN PIO_STACK_LOCATION IoStackLocation,
689 IN PPCI_FDO_EXTENSION DeviceExtension
690 );
691
692 NTSTATUS
693 NTAPI
694 PciFdoIrpQueryInterface(
695 IN PIRP Irp,
696 IN PIO_STACK_LOCATION IoStackLocation,
697 IN PPCI_FDO_EXTENSION DeviceExtension
698 );
699
700 NTSTATUS
701 NTAPI
702 PciFdoIrpQueryCapabilities(
703 IN PIRP Irp,
704 IN PIO_STACK_LOCATION IoStackLocation,
705 IN PPCI_FDO_EXTENSION DeviceExtension
706 );
707
708 NTSTATUS
709 NTAPI
710 PciFdoIrpDeviceUsageNotification(
711 IN PIRP Irp,
712 IN PIO_STACK_LOCATION IoStackLocation,
713 IN PPCI_FDO_EXTENSION DeviceExtension
714 );
715
716 NTSTATUS
717 NTAPI
718 PciFdoIrpSurpriseRemoval(
719 IN PIRP Irp,
720 IN PIO_STACK_LOCATION IoStackLocation,
721 IN PPCI_FDO_EXTENSION DeviceExtension
722 );
723
724 NTSTATUS
725 NTAPI
726 PciFdoIrpQueryLegacyBusInformation(
727 IN PIRP Irp,
728 IN PIO_STACK_LOCATION IoStackLocation,
729 IN PPCI_FDO_EXTENSION DeviceExtension
730 );
731
732 //
733 // Device PDO Routines
734 //
735 NTSTATUS
736 NTAPI
737 PciPdoCreate(
738 IN PPCI_FDO_EXTENSION DeviceExtension,
739 IN PCI_SLOT_NUMBER Slot,
740 OUT PDEVICE_OBJECT *PdoDeviceObject
741 );
742
743 NTSTATUS
744 NTAPI
745 PciPdoWaitWake(
746 IN PIRP Irp,
747 IN PIO_STACK_LOCATION IoStackLocation,
748 IN PPCI_PDO_EXTENSION DeviceExtension
749 );
750
751 NTSTATUS
752 NTAPI
753 PciPdoSetPowerState(
754 IN PIRP Irp,
755 IN PIO_STACK_LOCATION IoStackLocation,
756 IN PPCI_PDO_EXTENSION DeviceExtension
757 );
758
759 NTSTATUS
760 NTAPI
761 PciPdoIrpQueryPower(
762 IN PIRP Irp,
763 IN PIO_STACK_LOCATION IoStackLocation,
764 IN PPCI_PDO_EXTENSION DeviceExtension
765 );
766
767 NTSTATUS
768 NTAPI
769 PciPdoIrpStartDevice(
770 IN PIRP Irp,
771 IN PIO_STACK_LOCATION IoStackLocation,
772 IN PPCI_PDO_EXTENSION DeviceExtension
773 );
774
775 NTSTATUS
776 NTAPI
777 PciPdoIrpQueryRemoveDevice(
778 IN PIRP Irp,
779 IN PIO_STACK_LOCATION IoStackLocation,
780 IN PPCI_PDO_EXTENSION DeviceExtension
781 );
782
783 NTSTATUS
784 NTAPI
785 PciPdoIrpRemoveDevice(
786 IN PIRP Irp,
787 IN PIO_STACK_LOCATION IoStackLocation,
788 IN PPCI_PDO_EXTENSION DeviceExtension
789 );
790
791 NTSTATUS
792 NTAPI
793 PciPdoIrpCancelRemoveDevice(
794 IN PIRP Irp,
795 IN PIO_STACK_LOCATION IoStackLocation,
796 IN PPCI_PDO_EXTENSION DeviceExtension
797 );
798
799 NTSTATUS
800 NTAPI
801 PciPdoIrpStopDevice(
802 IN PIRP Irp,
803 IN PIO_STACK_LOCATION IoStackLocation,
804 IN PPCI_PDO_EXTENSION DeviceExtension
805 );
806
807 NTSTATUS
808 NTAPI
809 PciPdoIrpQueryStopDevice(
810 IN PIRP Irp,
811 IN PIO_STACK_LOCATION IoStackLocation,
812 IN PPCI_PDO_EXTENSION DeviceExtension
813 );
814
815 NTSTATUS
816 NTAPI
817 PciPdoIrpCancelStopDevice(
818 IN PIRP Irp,
819 IN PIO_STACK_LOCATION IoStackLocation,
820 IN PPCI_PDO_EXTENSION DeviceExtension
821 );
822
823 NTSTATUS
824 NTAPI
825 PciPdoIrpQueryDeviceRelations(
826 IN PIRP Irp,
827 IN PIO_STACK_LOCATION IoStackLocation,
828 IN PPCI_PDO_EXTENSION DeviceExtension
829 );
830
831 NTSTATUS
832 NTAPI
833 PciPdoIrpQueryInterface(
834 IN PIRP Irp,
835 IN PIO_STACK_LOCATION IoStackLocation,
836 IN PPCI_PDO_EXTENSION DeviceExtension
837 );
838
839 NTSTATUS
840 NTAPI
841 PciPdoIrpQueryCapabilities(
842 IN PIRP Irp,
843 IN PIO_STACK_LOCATION IoStackLocation,
844 IN PPCI_PDO_EXTENSION DeviceExtension
845 );
846
847 NTSTATUS
848 NTAPI
849 PciPdoIrpQueryResources(
850 IN PIRP Irp,
851 IN PIO_STACK_LOCATION IoStackLocation,
852 IN PPCI_PDO_EXTENSION DeviceExtension
853 );
854
855 NTSTATUS
856 NTAPI
857 PciPdoIrpQueryResourceRequirements(
858 IN PIRP Irp,
859 IN PIO_STACK_LOCATION IoStackLocation,
860 IN PPCI_PDO_EXTENSION DeviceExtension
861 );
862
863 NTSTATUS
864 NTAPI
865 PciPdoIrpQueryDeviceText(
866 IN PIRP Irp,
867 IN PIO_STACK_LOCATION IoStackLocation,
868 IN PPCI_PDO_EXTENSION DeviceExtension
869 );
870
871 NTSTATUS
872 NTAPI
873 PciPdoIrpReadConfig(
874 IN PIRP Irp,
875 IN PIO_STACK_LOCATION IoStackLocation,
876 IN PPCI_PDO_EXTENSION DeviceExtension
877 );
878
879 NTSTATUS
880 NTAPI
881 PciPdoIrpWriteConfig(
882 IN PIRP Irp,
883 IN PIO_STACK_LOCATION IoStackLocation,
884 IN PPCI_PDO_EXTENSION DeviceExtension
885 );
886
887 NTSTATUS
888 NTAPI
889 PciPdoIrpQueryId(
890 IN PIRP Irp,
891 IN PIO_STACK_LOCATION IoStackLocation,
892 IN PPCI_PDO_EXTENSION DeviceExtension
893 );
894
895 NTSTATUS
896 NTAPI
897 PciPdoIrpQueryDeviceState(
898 IN PIRP Irp,
899 IN PIO_STACK_LOCATION IoStackLocation,
900 IN PPCI_PDO_EXTENSION DeviceExtension
901 );
902
903 NTSTATUS
904 NTAPI
905 PciPdoIrpQueryBusInformation(
906 IN PIRP Irp,
907 IN PIO_STACK_LOCATION IoStackLocation,
908 IN PPCI_PDO_EXTENSION DeviceExtension
909 );
910
911 NTSTATUS
912 NTAPI
913 PciPdoIrpDeviceUsageNotification(
914 IN PIRP Irp,
915 IN PIO_STACK_LOCATION IoStackLocation,
916 IN PPCI_PDO_EXTENSION DeviceExtension
917 );
918
919 NTSTATUS
920 NTAPI
921 PciPdoIrpSurpriseRemoval(
922 IN PIRP Irp,
923 IN PIO_STACK_LOCATION IoStackLocation,
924 IN PPCI_PDO_EXTENSION DeviceExtension
925 );
926
927 NTSTATUS
928 NTAPI
929 PciPdoIrpQueryLegacyBusInformation(
930 IN PIRP Irp,
931 IN PIO_STACK_LOCATION IoStackLocation,
932 IN PPCI_PDO_EXTENSION DeviceExtension
933 );
934
935
936 //
937 // HAL Callback/Hook Routines
938 //
939 VOID
940 NTAPI
941 PciHookHal(
942 VOID
943 );
944
945 //
946 // PCI Verifier Routines
947 //
948 VOID
949 NTAPI
950 PciVerifierInit(
951 IN PDRIVER_OBJECT DriverObject
952 );
953
954 PPCI_VERIFIER_DATA
955 NTAPI
956 PciVerifierRetrieveFailureData(
957 IN ULONG FailureCode
958 );
959
960 //
961 // Utility Routines
962 //
963 BOOLEAN
964 NTAPI
965 PciStringToUSHORT(
966 IN PWCHAR String,
967 OUT PUSHORT Value
968 );
969
970 BOOLEAN
971 NTAPI
972 PciIsDatacenter(
973 VOID
974 );
975
976 NTSTATUS
977 NTAPI
978 PciBuildDefaultExclusionLists(
979 VOID
980 );
981
982 BOOLEAN
983 NTAPI
984 PciUnicodeStringStrStr(
985 IN PUNICODE_STRING InputString,
986 IN PCUNICODE_STRING EqualString,
987 IN BOOLEAN CaseInSensitive
988 );
989
990 BOOLEAN
991 NTAPI
992 PciOpenKey(
993 IN PWCHAR KeyName,
994 IN HANDLE RootKey,
995 IN ACCESS_MASK DesiredAccess,
996 OUT PHANDLE KeyHandle,
997 OUT PNTSTATUS KeyStatus
998 );
999
1000 NTSTATUS
1001 NTAPI
1002 PciGetRegistryValue(
1003 IN PWCHAR ValueName,
1004 IN PWCHAR KeyName,
1005 IN HANDLE RootHandle,
1006 IN ULONG Type,
1007 OUT PVOID *OutputBuffer,
1008 OUT PULONG OutputLength
1009 );
1010
1011 PPCI_FDO_EXTENSION
1012 NTAPI
1013 PciFindParentPciFdoExtension(
1014 IN PDEVICE_OBJECT DeviceObject,
1015 IN PKEVENT Lock
1016 );
1017
1018 VOID
1019 NTAPI
1020 PciInsertEntryAtTail(
1021 IN PSINGLE_LIST_ENTRY ListHead,
1022 IN PPCI_FDO_EXTENSION DeviceExtension,
1023 IN PKEVENT Lock
1024 );
1025
1026 NTSTATUS
1027 NTAPI
1028 PciGetDeviceProperty(
1029 IN PDEVICE_OBJECT DeviceObject,
1030 IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
1031 OUT PVOID *OutputBuffer
1032 );
1033
1034 NTSTATUS
1035 NTAPI
1036 PciSendIoctl(
1037 IN PDEVICE_OBJECT DeviceObject,
1038 IN ULONG IoControlCode,
1039 IN PVOID InputBuffer,
1040 IN ULONG InputBufferLength,
1041 IN PVOID OutputBuffer,
1042 IN ULONG OutputBufferLength
1043 );
1044
1045 VOID
1046 NTAPI
1047 PcipLinkSecondaryExtension(
1048 IN PSINGLE_LIST_ENTRY List,
1049 IN PVOID Lock,
1050 IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
1051 IN PCI_SIGNATURE ExtensionType,
1052 IN PVOID Destructor
1053 );
1054
1055 PPCI_SECONDARY_EXTENSION
1056 NTAPI
1057 PciFindNextSecondaryExtension(
1058 IN PSINGLE_LIST_ENTRY ListHead,
1059 IN PCI_SIGNATURE ExtensionType
1060 );
1061
1062 ULONGLONG
1063 NTAPI
1064 PciGetHackFlags(
1065 IN USHORT VendorId,
1066 IN USHORT DeviceId,
1067 IN USHORT SubVendorId,
1068 IN USHORT SubSystemId,
1069 IN UCHAR RevisionId
1070 );
1071
1072 PPCI_PDO_EXTENSION
1073 NTAPI
1074 PciFindPdoByFunction(
1075 IN PPCI_FDO_EXTENSION DeviceExtension,
1076 IN ULONG FunctionNumber,
1077 IN PPCI_COMMON_HEADER PciData
1078 );
1079
1080 BOOLEAN
1081 NTAPI
1082 PciIsCriticalDeviceClass(
1083 IN UCHAR BaseClass,
1084 IN UCHAR SubClass
1085 );
1086
1087 BOOLEAN
1088 NTAPI
1089 PciIsDeviceOnDebugPath(
1090 IN PPCI_PDO_EXTENSION DeviceExtension
1091 );
1092
1093 NTSTATUS
1094 NTAPI
1095 PciGetBiosConfig(
1096 IN PPCI_PDO_EXTENSION DeviceExtension,
1097 OUT PPCI_COMMON_HEADER PciData
1098 );
1099
1100 NTSTATUS
1101 NTAPI
1102 PciSaveBiosConfig(
1103 IN PPCI_PDO_EXTENSION DeviceExtension,
1104 OUT PPCI_COMMON_HEADER PciData
1105 );
1106
1107 UCHAR
1108 NTAPI
1109 PciReadDeviceCapability(
1110 IN PPCI_PDO_EXTENSION DeviceExtension,
1111 IN UCHAR Offset,
1112 IN ULONG CapabilityId,
1113 OUT PPCI_CAPABILITIES_HEADER Buffer,
1114 IN ULONG Length
1115 );
1116
1117 BOOLEAN
1118 NTAPI
1119 PciCanDisableDecodes(
1120 IN PPCI_PDO_EXTENSION DeviceExtension,
1121 IN PPCI_COMMON_HEADER Config,
1122 IN ULONGLONG HackFlags,
1123 IN BOOLEAN ForPowerDown
1124 );
1125
1126 PCI_DEVICE_TYPES
1127 NTAPI
1128 PciClassifyDeviceType(
1129 IN PPCI_PDO_EXTENSION PdoExtension
1130 );
1131
1132 KIPI_BROADCAST_WORKER PciExecuteCriticalSystemRoutine;
1133
1134 ULONG_PTR
1135 NTAPI
1136 PciExecuteCriticalSystemRoutine(
1137 IN ULONG_PTR IpiContext
1138 );
1139
1140 BOOLEAN
1141 NTAPI
1142 PciCreateIoDescriptorFromBarLimit(
1143 PIO_RESOURCE_DESCRIPTOR ResourceDescriptor,
1144 IN PULONG BarArray,
1145 IN BOOLEAN Rom
1146 );
1147
1148 BOOLEAN
1149 NTAPI
1150 PciIsSlotPresentInParentMethod(
1151 IN PPCI_PDO_EXTENSION PdoExtension,
1152 IN ULONG Method
1153 );
1154
1155 VOID
1156 NTAPI
1157 PciDecodeEnable(
1158 IN PPCI_PDO_EXTENSION PdoExtension,
1159 IN BOOLEAN Enable,
1160 OUT PUSHORT Command
1161 );
1162
1163 NTSTATUS
1164 NTAPI
1165 PciQueryBusInformation(
1166 IN PPCI_PDO_EXTENSION PdoExtension,
1167 IN PPNP_BUS_INFORMATION* Buffer
1168 );
1169
1170 NTSTATUS
1171 NTAPI
1172 PciQueryCapabilities(
1173 IN PPCI_PDO_EXTENSION PdoExtension,
1174 IN OUT PDEVICE_CAPABILITIES DeviceCapability
1175 );
1176
1177 //
1178 // Configuration Routines
1179 //
1180 NTSTATUS
1181 NTAPI
1182 PciGetConfigHandlers(
1183 IN PPCI_FDO_EXTENSION FdoExtension
1184 );
1185
1186 VOID
1187 NTAPI
1188 PciReadSlotConfig(
1189 IN PPCI_FDO_EXTENSION DeviceExtension,
1190 IN PCI_SLOT_NUMBER Slot,
1191 IN PVOID Buffer,
1192 IN ULONG Offset,
1193 IN ULONG Length
1194 );
1195
1196 VOID
1197 NTAPI
1198 PciWriteDeviceConfig(
1199 IN PPCI_PDO_EXTENSION DeviceExtension,
1200 IN PVOID Buffer,
1201 IN ULONG Offset,
1202 IN ULONG Length
1203 );
1204
1205 VOID
1206 NTAPI
1207 PciReadDeviceConfig(
1208 IN PPCI_PDO_EXTENSION DeviceExtension,
1209 IN PVOID Buffer,
1210 IN ULONG Offset,
1211 IN ULONG Length
1212 );
1213
1214 UCHAR
1215 NTAPI
1216 PciGetAdjustedInterruptLine(
1217 IN PPCI_PDO_EXTENSION PdoExtension
1218 );
1219
1220 //
1221 // State Machine Logic Transition Routines
1222 //
1223 VOID
1224 NTAPI
1225 PciInitializeState(
1226 IN PPCI_FDO_EXTENSION DeviceExtension
1227 );
1228
1229 NTSTATUS
1230 NTAPI
1231 PciBeginStateTransition(
1232 IN PPCI_FDO_EXTENSION DeviceExtension,
1233 IN PCI_STATE NewState
1234 );
1235
1236 NTSTATUS
1237 NTAPI
1238 PciCancelStateTransition(
1239 IN PPCI_FDO_EXTENSION DeviceExtension,
1240 IN PCI_STATE NewState
1241 );
1242
1243 VOID
1244 NTAPI
1245 PciCommitStateTransition(
1246 IN PPCI_FDO_EXTENSION DeviceExtension,
1247 IN PCI_STATE NewState
1248 );
1249
1250 //
1251 // Arbiter Support
1252 //
1253 NTSTATUS
1254 NTAPI
1255 PciInitializeArbiters(
1256 IN PPCI_FDO_EXTENSION FdoExtension
1257 );
1258
1259 NTSTATUS
1260 NTAPI
1261 PciInitializeArbiterRanges(
1262 IN PPCI_FDO_EXTENSION DeviceExtension,
1263 IN PCM_RESOURCE_LIST Resources
1264 );
1265
1266 //
1267 // Debug Helpers
1268 //
1269 BOOLEAN
1270 NTAPI
1271 PciDebugIrpDispatchDisplay(
1272 IN PIO_STACK_LOCATION IoStackLocation,
1273 IN PPCI_FDO_EXTENSION DeviceExtension,
1274 IN USHORT MaxMinor
1275 );
1276
1277 VOID
1278 NTAPI
1279 PciDebugDumpCommonConfig(
1280 IN PPCI_COMMON_HEADER PciData
1281 );
1282
1283 VOID
1284 NTAPI
1285 PciDebugDumpQueryCapabilities(
1286 IN PDEVICE_CAPABILITIES DeviceCaps
1287 );
1288
1289 VOID
1290 NTAPI
1291 PciDebugPrintIoResReqList(
1292 IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements
1293 );
1294
1295 VOID
1296 NTAPI
1297 PciDebugPrintCmResList(
1298 IN PCM_RESOURCE_LIST ResourceList
1299 );
1300
1301 VOID
1302 NTAPI
1303 PciDebugPrintPartialResource(
1304 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource
1305 );
1306
1307 //
1308 // Interface Support
1309 //
1310 NTSTATUS
1311 NTAPI
1312 PciQueryInterface(
1313 IN PPCI_FDO_EXTENSION DeviceExtension,
1314 IN CONST GUID* InterfaceType,
1315 IN ULONG Size,
1316 IN ULONG Version,
1317 IN PVOID InterfaceData,
1318 IN PINTERFACE Interface,
1319 IN BOOLEAN LastChance
1320 );
1321
1322 NTSTATUS
1323 NTAPI
1324 PciPmeInterfaceInitializer(
1325 IN PVOID Instance
1326 );
1327
1328 NTSTATUS
1329 NTAPI
1330 routeintrf_Initializer(
1331 IN PVOID Instance
1332 );
1333
1334 NTSTATUS
1335 NTAPI
1336 arbusno_Initializer(
1337 IN PVOID Instance
1338 );
1339
1340 NTSTATUS
1341 NTAPI
1342 agpintrf_Initializer(
1343 IN PVOID Instance
1344 );
1345
1346 NTSTATUS
1347 NTAPI
1348 tranirq_Initializer(
1349 IN PVOID Instance
1350 );
1351
1352 NTSTATUS
1353 NTAPI
1354 busintrf_Initializer(
1355 IN PVOID Instance
1356 );
1357
1358 NTSTATUS
1359 NTAPI
1360 armem_Initializer(
1361 IN PVOID Instance
1362 );
1363
1364 NTSTATUS
1365 NTAPI
1366 ario_Initializer(
1367 IN PVOID Instance
1368 );
1369
1370 NTSTATUS
1371 NTAPI
1372 locintrf_Initializer(
1373 IN PVOID Instance
1374 );
1375
1376 NTSTATUS
1377 NTAPI
1378 pcicbintrf_Initializer(
1379 IN PVOID Instance
1380 );
1381
1382 NTSTATUS
1383 NTAPI
1384 lddintrf_Initializer(
1385 IN PVOID Instance
1386 );
1387
1388 NTSTATUS
1389 NTAPI
1390 devpresent_Initializer(
1391 IN PVOID Instance
1392 );
1393
1394 NTSTATUS
1395 NTAPI
1396 agpintrf_Constructor(
1397 IN PVOID DeviceExtension,
1398 IN PVOID Instance,
1399 IN PVOID InterfaceData,
1400 IN USHORT Version,
1401 IN USHORT Size,
1402 IN PINTERFACE Interface
1403 );
1404
1405 NTSTATUS
1406 NTAPI
1407 arbusno_Constructor(
1408 IN PVOID DeviceExtension,
1409 IN PVOID Instance,
1410 IN PVOID InterfaceData,
1411 IN USHORT Version,
1412 IN USHORT Size,
1413 IN PINTERFACE Interface
1414 );
1415
1416 NTSTATUS
1417 NTAPI
1418 tranirq_Constructor(
1419 IN PVOID DeviceExtension,
1420 IN PVOID Instance,
1421 IN PVOID InterfaceData,
1422 IN USHORT Version,
1423 IN USHORT Size,
1424 IN PINTERFACE Interface
1425 );
1426
1427 NTSTATUS
1428 NTAPI
1429 armem_Constructor(
1430 IN PVOID DeviceExtension,
1431 IN PVOID Instance,
1432 IN PVOID InterfaceData,
1433 IN USHORT Version,
1434 IN USHORT Size,
1435 IN PINTERFACE Interface
1436 );
1437
1438 NTSTATUS
1439 NTAPI
1440 busintrf_Constructor(
1441 IN PVOID DeviceExtension,
1442 IN PVOID Instance,
1443 IN PVOID InterfaceData,
1444 IN USHORT Version,
1445 IN USHORT Size,
1446 IN PINTERFACE Interface
1447 );
1448
1449 NTSTATUS
1450 NTAPI
1451 ario_Constructor(
1452 IN PVOID DeviceExtension,
1453 IN PVOID Instance,
1454 IN PVOID InterfaceData,
1455 IN USHORT Version,
1456 IN USHORT Size,
1457 IN PINTERFACE Interface
1458 );
1459
1460 VOID
1461 NTAPI
1462 ario_ApplyBrokenVideoHack(
1463 IN PPCI_FDO_EXTENSION FdoExtension
1464 );
1465
1466 NTSTATUS
1467 NTAPI
1468 pcicbintrf_Constructor(
1469 IN PVOID DeviceExtension,
1470 IN PVOID Instance,
1471 IN PVOID InterfaceData,
1472 IN USHORT Version,
1473 IN USHORT Size,
1474 IN PINTERFACE Interface
1475 );
1476
1477 NTSTATUS
1478 NTAPI
1479 lddintrf_Constructor(
1480 IN PVOID DeviceExtension,
1481 IN PVOID Instance,
1482 IN PVOID InterfaceData,
1483 IN USHORT Version,
1484 IN USHORT Size,
1485 IN PINTERFACE Interface
1486 );
1487
1488 NTSTATUS
1489 NTAPI
1490 locintrf_Constructor(
1491 IN PVOID DeviceExtension,
1492 IN PVOID Instance,
1493 IN PVOID InterfaceData,
1494 IN USHORT Version,
1495 IN USHORT Size,
1496 IN PINTERFACE Interface
1497 );
1498
1499 NTSTATUS
1500 NTAPI
1501 PciPmeInterfaceConstructor(
1502 IN PVOID DeviceExtension,
1503 IN PVOID Instance,
1504 IN PVOID InterfaceData,
1505 IN USHORT Version,
1506 IN USHORT Size,
1507 IN PINTERFACE Interface
1508 );
1509
1510 NTSTATUS
1511 NTAPI
1512 routeintrf_Constructor(
1513 IN PVOID DeviceExtension,
1514 IN PVOID Instance,
1515 IN PVOID InterfaceData,
1516 IN USHORT Version,
1517 IN USHORT Size,
1518 IN PINTERFACE Interface
1519 );
1520
1521 NTSTATUS
1522 NTAPI
1523 devpresent_Constructor(
1524 IN PVOID DeviceExtension,
1525 IN PVOID Instance,
1526 IN PVOID InterfaceData,
1527 IN USHORT Version,
1528 IN USHORT Size,
1529 IN PINTERFACE Interface
1530 );
1531
1532 //
1533 // PCI Enumeration and Resources
1534 //
1535 NTSTATUS
1536 NTAPI
1537 PciQueryDeviceRelations(
1538 IN PPCI_FDO_EXTENSION DeviceExtension,
1539 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1540 );
1541
1542 NTSTATUS
1543 NTAPI
1544 PciQueryResources(
1545 IN PPCI_PDO_EXTENSION PdoExtension,
1546 OUT PCM_RESOURCE_LIST *Buffer
1547 );
1548
1549 NTSTATUS
1550 NTAPI
1551 PciQueryTargetDeviceRelations(
1552 IN PPCI_PDO_EXTENSION PdoExtension,
1553 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1554 );
1555
1556 NTSTATUS
1557 NTAPI
1558 PciQueryEjectionRelations(
1559 IN PPCI_PDO_EXTENSION PdoExtension,
1560 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1561 );
1562
1563 NTSTATUS
1564 NTAPI
1565 PciQueryRequirements(
1566 IN PPCI_PDO_EXTENSION PdoExtension,
1567 IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList
1568 );
1569
1570 BOOLEAN
1571 NTAPI
1572 PciComputeNewCurrentSettings(
1573 IN PPCI_PDO_EXTENSION PdoExtension,
1574 IN PCM_RESOURCE_LIST ResourceList
1575 );
1576
1577 NTSTATUS
1578 NTAPI
1579 PciSetResources(
1580 IN PPCI_PDO_EXTENSION PdoExtension,
1581 IN BOOLEAN DoReset,
1582 IN BOOLEAN SomethingSomethingDarkSide
1583 );
1584
1585 NTSTATUS
1586 NTAPI
1587 PciBuildRequirementsList(
1588 IN PPCI_PDO_EXTENSION PdoExtension,
1589 IN PPCI_COMMON_HEADER PciData,
1590 OUT PIO_RESOURCE_REQUIREMENTS_LIST* Buffer
1591 );
1592
1593 //
1594 // Identification Functions
1595 //
1596 PWCHAR
1597 NTAPI
1598 PciGetDeviceDescriptionMessage(
1599 IN UCHAR BaseClass,
1600 IN UCHAR SubClass
1601 );
1602
1603 NTSTATUS
1604 NTAPI
1605 PciQueryDeviceText(
1606 IN PPCI_PDO_EXTENSION PdoExtension,
1607 IN DEVICE_TEXT_TYPE QueryType,
1608 IN ULONG Locale,
1609 OUT PWCHAR *Buffer
1610 );
1611
1612 NTSTATUS
1613 NTAPI
1614 PciQueryId(
1615 IN PPCI_PDO_EXTENSION DeviceExtension,
1616 IN BUS_QUERY_ID_TYPE QueryType,
1617 OUT PWCHAR *Buffer
1618 );
1619
1620 //
1621 // CardBUS Support
1622 //
1623 VOID
1624 NTAPI
1625 Cardbus_MassageHeaderForLimitsDetermination(
1626 IN PPCI_CONFIGURATOR_CONTEXT Context
1627 );
1628
1629 VOID
1630 NTAPI
1631 Cardbus_SaveCurrentSettings(
1632 IN PPCI_CONFIGURATOR_CONTEXT Context
1633 );
1634
1635 VOID
1636 NTAPI
1637 Cardbus_SaveLimits(
1638 IN PPCI_CONFIGURATOR_CONTEXT Context
1639 );
1640
1641 VOID
1642 NTAPI
1643 Cardbus_RestoreCurrent(
1644 IN PPCI_CONFIGURATOR_CONTEXT Context
1645 );
1646
1647 VOID
1648 NTAPI
1649 Cardbus_GetAdditionalResourceDescriptors(
1650 IN PPCI_CONFIGURATOR_CONTEXT Context,
1651 IN PPCI_COMMON_HEADER PciData,
1652 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1653 );
1654
1655 VOID
1656 NTAPI
1657 Cardbus_ResetDevice(
1658 IN PPCI_PDO_EXTENSION PdoExtension,
1659 IN PPCI_COMMON_HEADER PciData
1660 );
1661
1662 VOID
1663 NTAPI
1664 Cardbus_ChangeResourceSettings(
1665 IN PPCI_PDO_EXTENSION PdoExtension,
1666 IN PPCI_COMMON_HEADER PciData
1667 );
1668
1669 //
1670 // PCI Device Support
1671 //
1672 VOID
1673 NTAPI
1674 Device_MassageHeaderForLimitsDetermination(
1675 IN PPCI_CONFIGURATOR_CONTEXT Context
1676 );
1677
1678 VOID
1679 NTAPI
1680 Device_SaveCurrentSettings(
1681 IN PPCI_CONFIGURATOR_CONTEXT Context
1682 );
1683
1684 VOID
1685 NTAPI
1686 Device_SaveLimits(
1687 IN PPCI_CONFIGURATOR_CONTEXT Context
1688 );
1689
1690 VOID
1691 NTAPI
1692 Device_RestoreCurrent(
1693 IN PPCI_CONFIGURATOR_CONTEXT Context
1694 );
1695
1696 VOID
1697 NTAPI
1698 Device_GetAdditionalResourceDescriptors(
1699 IN PPCI_CONFIGURATOR_CONTEXT Context,
1700 IN PPCI_COMMON_HEADER PciData,
1701 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1702 );
1703
1704 VOID
1705 NTAPI
1706 Device_ResetDevice(
1707 IN PPCI_PDO_EXTENSION PdoExtension,
1708 IN PPCI_COMMON_HEADER PciData
1709 );
1710
1711 VOID
1712 NTAPI
1713 Device_ChangeResourceSettings(
1714 IN PPCI_PDO_EXTENSION PdoExtension,
1715 IN PPCI_COMMON_HEADER PciData
1716 );
1717
1718 //
1719 // PCI-to-PCI Bridge Device Support
1720 //
1721 VOID
1722 NTAPI
1723 PPBridge_MassageHeaderForLimitsDetermination(
1724 IN PPCI_CONFIGURATOR_CONTEXT Context
1725 );
1726
1727 VOID
1728 NTAPI
1729 PPBridge_SaveCurrentSettings(
1730 IN PPCI_CONFIGURATOR_CONTEXT Context
1731 );
1732
1733 VOID
1734 NTAPI
1735 PPBridge_SaveLimits(
1736 IN PPCI_CONFIGURATOR_CONTEXT Context
1737 );
1738
1739 VOID
1740 NTAPI
1741 PPBridge_RestoreCurrent(
1742 IN PPCI_CONFIGURATOR_CONTEXT Context
1743 );
1744
1745 VOID
1746 NTAPI
1747 PPBridge_GetAdditionalResourceDescriptors(
1748 IN PPCI_CONFIGURATOR_CONTEXT Context,
1749 IN PPCI_COMMON_HEADER PciData,
1750 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1751 );
1752
1753 VOID
1754 NTAPI
1755 PPBridge_ResetDevice(
1756 IN PPCI_PDO_EXTENSION PdoExtension,
1757 IN PPCI_COMMON_HEADER PciData
1758 );
1759
1760 VOID
1761 NTAPI
1762 PPBridge_ChangeResourceSettings(
1763 IN PPCI_PDO_EXTENSION PdoExtension,
1764 IN PPCI_COMMON_HEADER PciData
1765 );
1766
1767 //
1768 // Bus Number Routines
1769 //
1770 BOOLEAN
1771 NTAPI
1772 PciAreBusNumbersConfigured(
1773 IN PPCI_PDO_EXTENSION PdoExtension
1774 );
1775
1776 //
1777 // Routine Interface
1778 //
1779 NTSTATUS
1780 NTAPI
1781 PciCacheLegacyDeviceRouting(
1782 IN PDEVICE_OBJECT DeviceObject,
1783 IN ULONG BusNumber,
1784 IN ULONG SlotNumber,
1785 IN UCHAR InterruptLine,
1786 IN UCHAR InterruptPin,
1787 IN UCHAR BaseClass,
1788 IN UCHAR SubClass,
1789 IN PDEVICE_OBJECT PhysicalDeviceObject,
1790 IN PPCI_PDO_EXTENSION PdoExtension,
1791 OUT PDEVICE_OBJECT *pFoundDeviceObject
1792 );
1793
1794 //
1795 // External Resources
1796 //
1797 extern SINGLE_LIST_ENTRY PciFdoExtensionListHead;
1798 extern KEVENT PciGlobalLock;
1799 extern PPCI_INTERFACE PciInterfaces[];
1800 extern PCI_INTERFACE ArbiterInterfaceBusNumber;
1801 extern PCI_INTERFACE ArbiterInterfaceMemory;
1802 extern PCI_INTERFACE ArbiterInterfaceIo;
1803 extern PCI_INTERFACE BusHandlerInterface;
1804 extern PCI_INTERFACE PciRoutingInterface;
1805 extern PCI_INTERFACE PciCardbusPrivateInterface;
1806 extern PCI_INTERFACE PciLegacyDeviceDetectionInterface;
1807 extern PCI_INTERFACE PciPmeInterface;
1808 extern PCI_INTERFACE PciDevicePresentInterface;
1809 //extern PCI_INTERFACE PciNativeIdeInterface;
1810 extern PCI_INTERFACE PciLocationInterface;
1811 extern PCI_INTERFACE AgpTargetInterface;
1812 extern PCI_INTERFACE TranslatorInterfaceInterrupt;
1813 extern PDRIVER_OBJECT PciDriverObject;
1814 extern PWATCHDOG_TABLE WdTable;
1815 extern PPCI_HACK_ENTRY PciHackTable;
1816 extern BOOLEAN PciAssignBusNumbers;
1817 extern BOOLEAN PciEnableNativeModeATA;
1818 extern PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable;
1819 extern BOOLEAN PciRunningDatacenter;
1820
1821 /* Exported by NTOS, should this go in the NDK? */
1822 extern NTSYSAPI BOOLEAN InitSafeBootMode;
1823
1824 #endif /* _PCIX_PCH_ */