2 * PROJECT: ReactOS Universal Serial Bus Bulk Enhanced Host Controller Interface
3 * LICENSE: GPL - See COPYING in the top level directory
4 * FILE: drivers/usb/usbohci/hcd_controller.cpp
5 * PURPOSE: USB OHCI device driver.
7 * Michael Martin (michael.martin@reactos.org)
8 * Johannes Anderwald (johannes.anderwald@reactos.org)
15 typedef VOID __stdcall
HD_INIT_CALLBACK(IN PVOID CallBackContext
);
19 InterruptServiceRoutine(
20 IN PKINTERRUPT Interrupt
,
21 IN PVOID ServiceContext
);
27 IN PVOID DeferredContext
,
28 IN PVOID SystemArgument1
,
29 IN PVOID SystemArgument2
);
33 StatusChangeWorkItemRoutine(PVOID Context
);
35 class CUSBHardwareDevice
: public IUSBHardwareDevice
38 STDMETHODIMP
QueryInterface( REFIID InterfaceId
, PVOID
* Interface
);
40 STDMETHODIMP_(ULONG
) AddRef()
42 InterlockedIncrement(&m_Ref
);
45 STDMETHODIMP_(ULONG
) Release()
47 InterlockedDecrement(&m_Ref
);
57 NTSTATUS
Initialize(PDRIVER_OBJECT DriverObject
, PDEVICE_OBJECT FunctionalDeviceObject
, PDEVICE_OBJECT PhysicalDeviceObject
, PDEVICE_OBJECT LowerDeviceObject
);
58 NTSTATUS
PnpStart(PCM_RESOURCE_LIST RawResources
, PCM_RESOURCE_LIST TranslatedResources
);
59 NTSTATUS
PnpStop(void);
60 NTSTATUS
HandlePower(PIRP Irp
);
61 NTSTATUS
GetDeviceDetails(PUSHORT VendorId
, PUSHORT DeviceId
, PULONG NumberOfPorts
, PULONG Speed
);
62 NTSTATUS
GetBulkHeadEndpointDescriptor(struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
);
63 NTSTATUS
GetControlHeadEndpointDescriptor(struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
);
64 NTSTATUS
GetInterruptEndpointDescriptors(struct _OHCI_ENDPOINT_DESCRIPTOR
*** OutDescriptor
);
65 NTSTATUS
GetIsochronousHeadEndpointDescriptor(struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
);
66 VOID
HeadEndpointDescriptorModified(ULONG HeadType
);
69 NTSTATUS
GetDMA(OUT
struct IDMAMemoryManager
**m_DmaManager
);
70 NTSTATUS
GetUSBQueue(OUT
struct IUSBQueue
**OutUsbQueue
);
72 NTSTATUS
StartController();
73 NTSTATUS
StopController();
74 NTSTATUS
ResetController();
75 NTSTATUS
ResetPort(ULONG PortIndex
);
77 NTSTATUS
GetPortStatus(ULONG PortId
, OUT USHORT
*PortStatus
, OUT USHORT
*PortChange
);
78 NTSTATUS
ClearPortStatus(ULONG PortId
, ULONG Status
);
79 NTSTATUS
SetPortFeature(ULONG PortId
, ULONG Feature
);
81 VOID
SetStatusChangeEndpointCallBack(PVOID CallBack
, PVOID Context
);
83 KIRQL
AcquireDeviceLock(void);
84 VOID
ReleaseDeviceLock(KIRQL OldLevel
);
85 virtual VOID
GetCurrentFrameNumber(PULONG FrameNumber
);
87 BOOLEAN
InterruptService();
88 NTSTATUS
InitializeController();
89 NTSTATUS
AllocateEndpointDescriptor(OUT POHCI_ENDPOINT_DESCRIPTOR
*OutDescriptor
);
92 friend BOOLEAN NTAPI
InterruptServiceRoutine(IN PKINTERRUPT Interrupt
, IN PVOID ServiceContext
);
93 friend VOID NTAPI
OhciDefferedRoutine(IN PKDPC Dpc
, IN PVOID DeferredContext
, IN PVOID SystemArgument1
, IN PVOID SystemArgument2
);
94 friend VOID NTAPI
StatusChangeWorkItemRoutine(PVOID Context
);
95 // constructor / destructor
96 CUSBHardwareDevice(IUnknown
*OuterUnknown
){}
97 virtual ~CUSBHardwareDevice(){}
100 LONG m_Ref
; // reference count
101 PDRIVER_OBJECT m_DriverObject
; // driver object
102 PDEVICE_OBJECT m_PhysicalDeviceObject
; // pdo
103 PDEVICE_OBJECT m_FunctionalDeviceObject
; // fdo (hcd controller)
104 PDEVICE_OBJECT m_NextDeviceObject
; // lower device object
105 KSPIN_LOCK m_Lock
; // hardware lock
106 PKINTERRUPT m_Interrupt
; // interrupt object
107 KDPC m_IntDpcObject
; // dpc object for deferred isr processing
108 PVOID VirtualBase
; // virtual base for memory manager
109 PHYSICAL_ADDRESS PhysicalAddress
; // physical base for memory manager
110 PULONG m_Base
; // OHCI operational port base registers
111 PDMA_ADAPTER m_Adapter
; // dma adapter object
112 ULONG m_MapRegisters
; // map registers count
113 USHORT m_VendorID
; // vendor id
114 USHORT m_DeviceID
; // device id
115 PUSBQUEUE m_UsbQueue
; // usb request queue
116 POHCIHCCA m_HCCA
; // hcca virtual base
117 PHYSICAL_ADDRESS m_HCCAPhysicalAddress
; // hcca physical address
118 POHCI_ENDPOINT_DESCRIPTOR m_ControlEndpointDescriptor
; // dummy control endpoint descriptor
119 POHCI_ENDPOINT_DESCRIPTOR m_BulkEndpointDescriptor
; // dummy control endpoint descriptor
120 POHCI_ENDPOINT_DESCRIPTOR m_IsoEndpointDescriptor
; // iso endpoint descriptor
121 POHCI_ENDPOINT_DESCRIPTOR m_InterruptEndpoints
[OHCI_STATIC_ENDPOINT_COUNT
]; // endpoints for interrupt / iso transfers
122 ULONG m_NumberOfPorts
; // number of ports
123 OHCI_PORT_STATUS m_PortStatus
[OHCI_MAX_PORT_COUNT
]; // port change status
124 PDMAMEMORYMANAGER m_MemoryManager
; // memory manager
125 HD_INIT_CALLBACK
* m_SCECallBack
; // status change callback routine
126 PVOID m_SCEContext
; // status change callback routine context
127 WORK_QUEUE_ITEM m_StatusChangeWorkItem
; // work item for status change callback
128 ULONG m_SyncFramePhysAddr
; // periodic frame list physical address
129 ULONG m_IntervalValue
; // periodic interval value
132 //=================================================================================================
137 CUSBHardwareDevice::QueryInterface(
141 if (IsEqualGUIDAligned(refiid
, IID_IUnknown
))
143 *Output
= PVOID(PUNKNOWN(this));
144 PUNKNOWN(*Output
)->AddRef();
145 return STATUS_SUCCESS
;
148 return STATUS_UNSUCCESSFUL
;
152 CUSBHardwareDevice::Initialize(
153 PDRIVER_OBJECT DriverObject
,
154 PDEVICE_OBJECT FunctionalDeviceObject
,
155 PDEVICE_OBJECT PhysicalDeviceObject
,
156 PDEVICE_OBJECT LowerDeviceObject
)
158 BUS_INTERFACE_STANDARD BusInterface
;
159 PCI_COMMON_CONFIG PciConfig
;
163 DPRINT1("CUSBHardwareDevice::Initialize\n");
166 // Create DMAMemoryManager for use with QueueHeads and Transfer Descriptors.
168 Status
= CreateDMAMemoryManager(&m_MemoryManager
);
169 if (!NT_SUCCESS(Status
))
171 DPRINT1("Failed to create DMAMemoryManager Object\n");
176 // Create the UsbQueue class that will handle the Asynchronous and Periodic Schedules
178 Status
= CreateUSBQueue(&m_UsbQueue
);
179 if (!NT_SUCCESS(Status
))
181 DPRINT1("Failed to create UsbQueue!\n");
186 // store device objects
188 m_DriverObject
= DriverObject
;
189 m_FunctionalDeviceObject
= FunctionalDeviceObject
;
190 m_PhysicalDeviceObject
= PhysicalDeviceObject
;
191 m_NextDeviceObject
= LowerDeviceObject
;
194 // initialize device lock
196 KeInitializeSpinLock(&m_Lock
);
199 // intialize status change work item
201 ExInitializeWorkItem(&m_StatusChangeWorkItem
, StatusChangeWorkItemRoutine
, PVOID(this));
206 Status
= GetBusInterface(PhysicalDeviceObject
, &BusInterface
);
207 if (!NT_SUCCESS(Status
))
209 DPRINT1("Failed to get BusInteface!\n");
213 BytesRead
= (*BusInterface
.GetBusData
)(BusInterface
.Context
,
214 PCI_WHICHSPACE_CONFIG
,
217 PCI_COMMON_HDR_LENGTH
);
219 if (BytesRead
!= PCI_COMMON_HDR_LENGTH
)
221 DPRINT1("Failed to get pci config information!\n");
222 return STATUS_SUCCESS
;
225 if (!(PciConfig
.Command
& PCI_ENABLE_BUS_MASTER
))
227 DPRINT1("PCI Configuration shows this as a non Bus Mastering device!\n");
230 m_VendorID
= PciConfig
.VendorID
;
231 m_DeviceID
= PciConfig
.DeviceID
;
233 return STATUS_SUCCESS
;
237 CUSBHardwareDevice::PnpStart(
238 PCM_RESOURCE_LIST RawResources
,
239 PCM_RESOURCE_LIST TranslatedResources
)
242 PCM_PARTIAL_RESOURCE_DESCRIPTOR ResourceDescriptor
;
243 DEVICE_DESCRIPTION DeviceDescription
;
248 DPRINT1("CUSBHardwareDevice::PnpStart\n");
249 for(Index
= 0; Index
< TranslatedResources
->List
[0].PartialResourceList
.Count
; Index
++)
252 // get resource descriptor
254 ResourceDescriptor
= &TranslatedResources
->List
[0].PartialResourceList
.PartialDescriptors
[Index
];
256 switch(ResourceDescriptor
->Type
)
258 case CmResourceTypeInterrupt
:
260 KeInitializeDpc(&m_IntDpcObject
,
264 Status
= IoConnectInterrupt(&m_Interrupt
,
265 InterruptServiceRoutine
,
268 ResourceDescriptor
->u
.Interrupt
.Vector
,
269 (KIRQL
)ResourceDescriptor
->u
.Interrupt
.Level
,
270 (KIRQL
)ResourceDescriptor
->u
.Interrupt
.Level
,
271 (KINTERRUPT_MODE
)(ResourceDescriptor
->Flags
& CM_RESOURCE_INTERRUPT_LATCHED
),
272 (ResourceDescriptor
->ShareDisposition
!= CmResourceShareDeviceExclusive
),
273 ResourceDescriptor
->u
.Interrupt
.Affinity
,
276 if (!NT_SUCCESS(Status
))
279 // failed to register interrupt
281 DPRINT1("IoConnect Interrupt failed with %x\n", Status
);
286 case CmResourceTypeMemory
:
291 ResourceBase
= MmMapIoSpace(ResourceDescriptor
->u
.Memory
.Start
, ResourceDescriptor
->u
.Memory
.Length
, MmNonCached
);
295 // failed to map registers
297 DPRINT1("MmMapIoSpace failed\n");
298 return STATUS_INSUFFICIENT_RESOURCES
;
302 // Get controllers capabilities
304 Version
= READ_REGISTER_ULONG((PULONG
)((ULONG_PTR
)ResourceBase
+ OHCI_REVISION_OFFSET
));
306 DPRINT1("Version %x\n", Version
);
309 // Store Resource base
311 m_Base
= (PULONG
)ResourceBase
;
319 // zero device description
321 RtlZeroMemory(&DeviceDescription
, sizeof(DEVICE_DESCRIPTION
));
324 // initialize device description
326 DeviceDescription
.Version
= DEVICE_DESCRIPTION_VERSION
;
327 DeviceDescription
.Master
= TRUE
;
328 DeviceDescription
.ScatterGather
= TRUE
;
329 DeviceDescription
.Dma32BitAddresses
= TRUE
;
330 DeviceDescription
.DmaWidth
= Width32Bits
;
331 DeviceDescription
.InterfaceType
= PCIBus
;
332 DeviceDescription
.MaximumLength
= MAXULONG
;
337 m_Adapter
= IoGetDmaAdapter(m_PhysicalDeviceObject
, &DeviceDescription
, &m_MapRegisters
);
341 // failed to get dma adapter
343 DPRINT1("Failed to acquire dma adapter\n");
344 return STATUS_INSUFFICIENT_RESOURCES
;
348 // Create Common Buffer
350 VirtualBase
= m_Adapter
->DmaOperations
->AllocateCommonBuffer(m_Adapter
,
356 DPRINT1("Failed to allocate a common buffer\n");
357 return STATUS_INSUFFICIENT_RESOURCES
;
361 // Initialize the DMAMemoryManager
363 Status
= m_MemoryManager
->Initialize(this, &m_Lock
, PAGE_SIZE
* 4, VirtualBase
, PhysicalAddress
, 32);
364 if (!NT_SUCCESS(Status
))
366 DPRINT1("Failed to initialize the DMAMemoryManager\n");
371 // initializes the controller
373 Status
= InitializeController();
374 if (!NT_SUCCESS(Status
))
376 DPRINT1("Failed to Initialize the controller \n");
382 // Initialize the UsbQueue now that we have an AdapterObject.
384 Status
= m_UsbQueue
->Initialize(PUSBHARDWAREDEVICE(this), m_Adapter
, m_MemoryManager
, NULL
);
385 if (!NT_SUCCESS(Status
))
387 DPRINT1("Failed to Initialize the UsbQueue\n");
393 // Stop the controller before modifying schedules
395 Status
= StopController();
396 if (!NT_SUCCESS(Status
))
398 DPRINT1("Failed to stop the controller \n");
405 // Start the controller
407 DPRINT1("Starting Controller\n");
408 Status
= StartController();
417 CUSBHardwareDevice::PnpStop(void)
420 return STATUS_NOT_IMPLEMENTED
;
424 CUSBHardwareDevice::HandlePower(
428 return STATUS_NOT_IMPLEMENTED
;
432 CUSBHardwareDevice::GetDeviceDetails(
433 OUT OPTIONAL PUSHORT VendorId
,
434 OUT OPTIONAL PUSHORT DeviceId
,
435 OUT OPTIONAL PULONG NumberOfPorts
,
436 OUT OPTIONAL PULONG Speed
)
443 *VendorId
= m_VendorID
;
451 *DeviceId
= m_DeviceID
;
457 // get number of ports
459 *NumberOfPorts
= m_NumberOfPorts
;
470 return STATUS_SUCCESS
;
473 NTSTATUS
CUSBHardwareDevice::GetDMA(
474 OUT
struct IDMAMemoryManager
**OutDMAMemoryManager
)
476 if (!m_MemoryManager
)
477 return STATUS_UNSUCCESSFUL
;
478 *OutDMAMemoryManager
= m_MemoryManager
;
479 return STATUS_SUCCESS
;
483 CUSBHardwareDevice::GetUSBQueue(
484 OUT
struct IUSBQueue
**OutUsbQueue
)
487 return STATUS_UNSUCCESSFUL
;
488 *OutUsbQueue
= m_UsbQueue
;
489 return STATUS_SUCCESS
;
494 CUSBHardwareDevice::StartController(void)
496 ULONG Control
, NumberOfPorts
, Index
, Descriptor
, FrameInterval
, Periodic
;
499 // first write address of HCCA
501 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_HCCA_OFFSET
), m_HCCAPhysicalAddress
.LowPart
);
504 // lets write physical address of dummy control endpoint descriptor
506 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_HEAD_ED_OFFSET
), m_ControlEndpointDescriptor
->PhysicalAddress
.LowPart
);
509 // lets write physical address of dummy bulk endpoint descriptor
511 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_BULK_HEAD_ED_OFFSET
), m_BulkEndpointDescriptor
->PhysicalAddress
.LowPart
);
514 // read control register
516 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
));
521 Control
&= ~(OHCI_CONTROL_BULK_SERVICE_RATIO_MASK
| OHCI_ENABLE_LIST
| OHCI_HC_FUNCTIONAL_STATE_MASK
| OHCI_INTERRUPT_ROUTING
);
524 // set command status flags
526 Control
|= OHCI_ENABLE_LIST
| OHCI_CONTROL_BULK_RATIO_1_4
| OHCI_HC_FUNCTIONAL_STATE_OPERATIONAL
;
529 // now start the controller
531 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
), Control
);
536 KeStallExecutionProcessor(100);
539 // is the controller started
541 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
));
544 // assert that the controller has been started
546 ASSERT((Control
& OHCI_HC_FUNCTIONAL_STATE_MASK
) == OHCI_HC_FUNCTIONAL_STATE_OPERATIONAL
);
547 ASSERT((Control
& OHCI_ENABLE_LIST
) == OHCI_ENABLE_LIST
);
548 DPRINT1("Control %x\n", Control
);
551 // get frame interval
553 FrameInterval
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_OFFSET
));
554 DPRINT1("FrameInterval %x IntervalValue %x\n", FrameInterval
, m_IntervalValue
);
555 FrameInterval
|= OHCI_FSMPS(m_IntervalValue
) | m_IntervalValue
;
556 DPRINT1("FrameInterval %x\n", FrameInterval
);
559 // write frame interval
561 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_OFFSET
), FrameInterval
);
566 Periodic
= OHCI_PERIODIC(m_IntervalValue
);
567 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_PERIODIC_START_OFFSET
), Periodic
);
568 DPRINT1("Periodic Start %x\n", Periodic
);
573 Descriptor
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_DESCRIPTOR_A_OFFSET
));
576 // no over current protection
578 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_DESCRIPTOR_A_OFFSET
), Descriptor
| OHCI_RH_NO_OVER_CURRENT_PROTECTION
);
581 // enable power on all ports
583 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_STATUS_OFFSET
), OHCI_RH_LOCAL_POWER_STATUS_CHANGE
);
588 KeStallExecutionProcessor(10);
593 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_DESCRIPTOR_A_OFFSET
), Descriptor
);
598 // retrieve number of ports
600 for(Index
= 0; Index
< 10; Index
++)
605 KeStallExecutionProcessor(10);
610 Descriptor
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_DESCRIPTOR_A_OFFSET
));
613 // get number of ports
615 NumberOfPorts
= OHCI_RH_GET_PORT_COUNT(Descriptor
);
618 // check if we have received the ports
627 ASSERT(NumberOfPorts
< OHCI_MAX_PORT_COUNT
);
630 // store number of ports
632 m_NumberOfPorts
= NumberOfPorts
;
635 // print out number ports
637 DPRINT1("NumberOfPorts %lu\n", m_NumberOfPorts
);
641 // now enable the interrupts
643 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
), OHCI_NORMAL_INTERRUPTS
| OHCI_MASTER_INTERRUPT_ENABLE
);
648 return STATUS_SUCCESS
;
652 CUSBHardwareDevice::AllocateEndpointDescriptor(
653 OUT POHCI_ENDPOINT_DESCRIPTOR
*OutDescriptor
)
655 POHCI_ENDPOINT_DESCRIPTOR Descriptor
;
656 PHYSICAL_ADDRESS DescriptorAddress
;
660 // allocate descriptor
662 Status
= m_MemoryManager
->Allocate(sizeof(OHCI_ENDPOINT_DESCRIPTOR
), (PVOID
*)&Descriptor
, &DescriptorAddress
);
663 if (!NT_SUCCESS(Status
))
666 // failed to allocate descriptor
672 // intialize descriptor
674 Descriptor
->Flags
= OHCI_ENDPOINT_SKIP
;
675 Descriptor
->HeadPhysicalDescriptor
= 0;
676 Descriptor
->NextPhysicalEndpoint
= 0;
677 Descriptor
->TailPhysicalDescriptor
= 0;
678 Descriptor
->PhysicalAddress
.QuadPart
= DescriptorAddress
.QuadPart
;
683 *OutDescriptor
= Descriptor
;
688 return STATUS_SUCCESS
;
692 CUSBHardwareDevice::GetBulkHeadEndpointDescriptor(
693 struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
)
695 *OutDescriptor
= m_BulkEndpointDescriptor
;
696 return STATUS_SUCCESS
;
700 CUSBHardwareDevice::GetInterruptEndpointDescriptors(
701 struct _OHCI_ENDPOINT_DESCRIPTOR
*** OutDescriptor
)
703 *OutDescriptor
= m_InterruptEndpoints
;
704 return STATUS_SUCCESS
;
708 CUSBHardwareDevice::GetIsochronousHeadEndpointDescriptor(
709 struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
)
714 *OutDescriptor
= m_IsoEndpointDescriptor
;
715 return STATUS_SUCCESS
;
719 CUSBHardwareDevice::HeadEndpointDescriptorModified(
722 ULONG Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
));
724 if (Type
== USB_ENDPOINT_TYPE_CONTROL
)
729 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
), Value
| OHCI_CONTROL_LIST_FILLED
);
731 else if (Type
== USB_ENDPOINT_TYPE_BULK
)
736 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
), Value
| OHCI_BULK_LIST_FILLED
);
741 CUSBHardwareDevice::GetControlHeadEndpointDescriptor(
742 struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
)
744 *OutDescriptor
= m_ControlEndpointDescriptor
;
745 return STATUS_SUCCESS
;
749 CUSBHardwareDevice::InitializeController()
752 ULONG Index
, Interval
, IntervalIndex
, InsertIndex
;
753 POHCI_ENDPOINT_DESCRIPTOR Descriptor
;
756 // first allocate the hcca area
758 Status
= m_MemoryManager
->Allocate(sizeof(OHCIHCCA
), (PVOID
*)&m_HCCA
, &m_HCCAPhysicalAddress
);
759 if (!NT_SUCCESS(Status
))
768 // now allocate an endpoint for control transfers
769 // this endpoint will never be removed
771 Status
= AllocateEndpointDescriptor(&m_ControlEndpointDescriptor
);
772 if (!NT_SUCCESS(Status
))
781 // now allocate an endpoint for bulk transfers
782 // this endpoint will never be removed
784 Status
= AllocateEndpointDescriptor(&m_BulkEndpointDescriptor
);
785 if (!NT_SUCCESS(Status
))
794 // now allocate an endpoint for iso transfers
795 // this endpoint will never be removed
797 Status
= AllocateEndpointDescriptor(&m_IsoEndpointDescriptor
);
798 if (!NT_SUCCESS(Status
))
807 // now allocate endpoint descriptors for iso / interrupt transfers interval is 1,2,4,8,16,32
809 for(Index
= 0; Index
< OHCI_STATIC_ENDPOINT_COUNT
; Index
++)
812 // allocate endpoint descriptor
814 Status
= AllocateEndpointDescriptor(&Descriptor
);
815 if (!NT_SUCCESS(Status
))
826 m_InterruptEndpoints
[Index
] = Descriptor
;
831 // now link the descriptors, taken from Haiku
833 Interval
= OHCI_BIGGEST_INTERVAL
;
834 IntervalIndex
= OHCI_STATIC_ENDPOINT_COUNT
- 1;
837 InsertIndex
= Interval
/ 2;
838 while (InsertIndex
< OHCI_BIGGEST_INTERVAL
)
841 // assign endpoint address
843 m_HCCA
->InterruptTable
[InsertIndex
] = m_InterruptEndpoints
[IntervalIndex
]->PhysicalAddress
.LowPart
;
844 InsertIndex
+= Interval
;
852 // link all endpoint descriptors to first descriptor in array
854 m_HCCA
->InterruptTable
[0] = m_InterruptEndpoints
[0]->PhysicalAddress
.LowPart
;
855 for (Index
= 1; Index
< OHCI_STATIC_ENDPOINT_COUNT
; Index
++)
860 m_InterruptEndpoints
[Index
]->NextPhysicalEndpoint
= m_InterruptEndpoints
[0]->PhysicalAddress
.LowPart
;
864 // Now link the first endpoint to the isochronous endpoint
866 m_InterruptEndpoints
[0]->NextPhysicalEndpoint
= m_IsoEndpointDescriptor
->PhysicalAddress
.LowPart
;
869 // set iso endpoint type
871 m_IsoEndpointDescriptor
->Flags
|= OHCI_ENDPOINT_ISOCHRONOUS_FORMAT
;
876 return STATUS_SUCCESS
;
880 CUSBHardwareDevice::StopController(void)
882 ULONG Control
, Reset
;
883 ULONG Index
, FrameInterval
;
886 // first turn off all interrupts
888 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_INTERRUPT_DISABLE_OFFSET
), OHCI_ALL_INTERRUPTS
);
893 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
));
896 // FIXME: support routing
898 ASSERT((Control
& OHCI_INTERRUPT_ROUTING
) == 0);
903 KeStallExecutionProcessor(100);
906 // some controllers also depend on this
908 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
), OHCI_HC_FUNCTIONAL_STATE_RESET
);
913 KeStallExecutionProcessor(100);
916 // read from interval
918 FrameInterval
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_OFFSET
));
921 // store interval value for later
923 m_IntervalValue
= OHCI_GET_INTERVAL_VALUE(FrameInterval
);
925 DPRINT1("FrameInterval %x Interval %x\n", FrameInterval
, m_IntervalValue
);
928 // now reset controller
930 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
), OHCI_HOST_CONTROLLER_RESET
);
933 // reset time is 10ms
935 for(Index
= 0; Index
< 10; Index
++)
940 KeStallExecutionProcessor(10);
943 // read command status
945 Reset
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
));
948 // was reset bit cleared
950 if ((Reset
& OHCI_HOST_CONTROLLER_RESET
) == 0)
953 // controller completed reset
955 return STATUS_SUCCESS
;
960 // failed to reset controller
962 return STATUS_UNSUCCESSFUL
;
966 CUSBHardwareDevice::ResetController(void)
969 return STATUS_NOT_IMPLEMENTED
;
973 CUSBHardwareDevice::ResetPort(
978 return STATUS_SUCCESS
;
982 CUSBHardwareDevice::GetPortStatus(
984 OUT USHORT
*PortStatus
,
985 OUT USHORT
*PortChange
)
988 // FIXME: should read status from hardware
990 *PortStatus
= m_PortStatus
[PortId
].PortStatus
;
991 *PortChange
= m_PortStatus
[PortId
].PortChange
;
992 return STATUS_SUCCESS
;
996 CUSBHardwareDevice::ClearPortStatus(
1002 DPRINT("CUSBHardwareDevice::ClearPortStatus PortId %x Feature %x\n", PortId
, Status
);
1004 if (PortId
> m_NumberOfPorts
)
1005 return STATUS_UNSUCCESSFUL
;
1007 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1008 KeStallExecutionProcessor(100);
1010 if (Status
== C_PORT_RESET
)
1017 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1019 if ((Value
& OHCI_RH_PORTSTATUS_PRS
) == 0)
1022 // reset is complete
1030 KeStallExecutionProcessor(100);
1032 //DPRINT1("Value %x Index %lu\n", Value, Index);
1037 // check if reset bit is still set
1039 if (Value
& OHCI_RH_PORTSTATUS_PRS
)
1044 DPRINT1("PortId %lu Reset failed\n", PortId
);
1045 return STATUS_UNSUCCESSFUL
;
1051 ASSERT((Value
& OHCI_RH_PORTSTATUS_PRS
) == 0);
1052 ASSERT((Value
& OHCI_RH_PORTSTATUS_PRSC
));
1055 // clear reset bit complete
1057 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PRSC
);
1060 // read status register
1062 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1065 // reset complete bit should be cleared
1067 ASSERT((Value
& OHCI_RH_PORTSTATUS_PRSC
) == 0);
1070 // update port status
1072 m_PortStatus
[PortId
].PortChange
&= ~USB_PORT_STATUS_RESET
;
1077 ASSERT((Value
& OHCI_RH_PORTSTATUS_PES
));
1082 m_PortStatus
[PortId
].PortStatus
|= USB_PORT_STATUS_ENABLE
;
1085 // re-enable root hub change
1087 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
));
1088 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
), Value
| OHCI_ROOT_HUB_STATUS_CHANGE
);
1092 if (Status
== C_PORT_CONNECTION
)
1097 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_CSC
);
1098 m_PortStatus
[PortId
].PortChange
&= ~USB_PORT_STATUS_CONNECT
;
1103 return STATUS_SUCCESS
;
1108 CUSBHardwareDevice::SetPortFeature(
1114 DPRINT1("CUSBHardwareDevice::SetPortFeature PortId %x Feature %x\n", PortId
, Feature
);
1119 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1122 if (Feature
== PORT_ENABLE
)
1127 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PES
);
1128 return STATUS_SUCCESS
;
1130 else if (Feature
== PORT_POWER
)
1135 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PPS
);
1136 return STATUS_SUCCESS
;
1138 else if (Feature
== PORT_SUSPEND
)
1143 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PSS
);
1144 return STATUS_SUCCESS
;
1146 else if (Feature
== PORT_RESET
)
1151 ASSERT((Value
& OHCI_RH_PORTSTATUS_CCS
));
1156 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PRS
);
1161 KeStallExecutionProcessor(100);
1164 // update cached settings
1166 m_PortStatus
[PortId
].PortChange
|= USB_PORT_STATUS_RESET
;
1167 m_PortStatus
[PortId
].PortStatus
&= ~USB_PORT_STATUS_ENABLE
;
1170 // is there a status change callback
1172 if (m_SCECallBack
!= NULL
)
1177 m_SCECallBack(m_SCEContext
);
1180 return STATUS_SUCCESS
;
1186 CUSBHardwareDevice::SetStatusChangeEndpointCallBack(
1190 m_SCECallBack
= (HD_INIT_CALLBACK
*)CallBack
;
1191 m_SCEContext
= Context
;
1195 CUSBHardwareDevice::AcquireDeviceLock(void)
1202 KeAcquireSpinLock(&m_Lock
, &OldLevel
);
1211 CUSBHardwareDevice::GetCurrentFrameNumber(
1218 Number
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_NUMBER_OFFSET
));
1219 DPRINT1("FrameNumberInterval %x Frame %x\n", Number
, m_HCCA
->CurrentFrameNumber
);
1222 // remove reserved bits
1227 // store frame number
1229 *FrameNumber
= Number
;
1232 // is the controller started
1234 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
));
1235 ASSERT((Control
& OHCI_ENABLE_LIST
) == OHCI_ENABLE_LIST
);
1241 CUSBHardwareDevice::ReleaseDeviceLock(
1244 KeReleaseSpinLock(&m_Lock
, OldLevel
);
1249 InterruptServiceRoutine(
1250 IN PKINTERRUPT Interrupt
,
1251 IN PVOID ServiceContext
)
1253 CUSBHardwareDevice
*This
;
1254 ULONG DoneHead
, Status
, Acknowledge
= 0;
1259 This
= (CUSBHardwareDevice
*) ServiceContext
;
1261 DPRINT("InterruptServiceRoutine\n");
1266 DoneHead
= This
->m_HCCA
->DoneHead
;
1274 // the interrupt was not caused by DoneHead update
1275 // check if something important happened
1277 Status
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_STATUS_OFFSET
)) & READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
)) & (~OHCI_WRITEBACK_DONE_HEAD
);
1281 // nothing happened, appears to be shared interrupt
1289 // DoneHead update happened, check if there are other events too
1291 Status
= OHCI_WRITEBACK_DONE_HEAD
;
1294 // since ed descriptors are 16 byte aligned, the controller sets the lower bits if there were other interrupt requests
1296 if (DoneHead
& OHCI_DONE_INTERRUPTS
)
1301 Status
|= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_STATUS_OFFSET
)) & READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
));
1308 ASSERT(Status
!= 0);
1310 if (Status
& OHCI_WRITEBACK_DONE_HEAD
)
1315 Acknowledge
|= OHCI_WRITEBACK_DONE_HEAD
;
1316 This
->m_HCCA
->DoneHead
= 0;
1319 if (Status
& OHCI_RESUME_DETECTED
)
1324 DPRINT1("InterruptServiceRoutine> Resume\n");
1325 Acknowledge
|= OHCI_RESUME_DETECTED
;
1329 if (Status
& OHCI_UNRECOVERABLE_ERROR
)
1331 DPRINT1("InterruptServiceRoutine> Controller error\n");
1337 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_CONTROL_OFFSET
), OHCI_HC_FUNCTIONAL_STATE_RESET
);
1340 if (Status
& OHCI_ROOT_HUB_STATUS_CHANGE
)
1343 // new device has arrived
1347 // disable interrupt as it will fire untill the port has been reset
1349 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_DISABLE_OFFSET
), OHCI_ROOT_HUB_STATUS_CHANGE
);
1350 Acknowledge
|= OHCI_ROOT_HUB_STATUS_CHANGE
;
1354 // is there something to acknowledge
1361 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_STATUS_OFFSET
), Acknowledge
);
1367 DPRINT("Status %x Acknowledge %x FrameNumber %x\n", Status
, Acknowledge
, This
->m_HCCA
->CurrentFrameNumber
);
1368 KeInsertQueueDpc(&This
->m_IntDpcObject
, (PVOID
)Status
, (PVOID
)(DoneHead
& ~1));
1371 // interrupt handled
1378 OhciDefferedRoutine(
1380 IN PVOID DeferredContext
,
1381 IN PVOID SystemArgument1
,
1382 IN PVOID SystemArgument2
)
1384 CUSBHardwareDevice
*This
;
1385 ULONG CStatus
, Index
, PortStatus
;
1391 This
= (CUSBHardwareDevice
*)DeferredContext
;
1392 CStatus
= (ULONG
) SystemArgument1
;
1393 DoneHead
= (ULONG
)SystemArgument2
;
1395 DPRINT("OhciDefferedRoutine Status %x\n", CStatus
);
1397 if (CStatus
& OHCI_WRITEBACK_DONE_HEAD
)
1400 // notify queue of event
1402 This
->m_UsbQueue
->TransferDescriptorCompletionCallback(DoneHead
);
1404 if (CStatus
& OHCI_ROOT_HUB_STATUS_CHANGE
)
1407 // device connected, lets check which port
1409 for(Index
= 0; Index
< This
->m_NumberOfPorts
; Index
++)
1414 PortStatus
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_RH_PORT_STATUS(Index
)));
1417 // check if there is a status change
1419 if (PortStatus
& OHCI_RH_PORTSTATUS_CSC
)
1422 // did a device connect
1424 if (PortStatus
& OHCI_RH_PORTSTATUS_CCS
)
1429 DPRINT1("New device arrival at Port %d LowSpeed %x\n", Index
, (PortStatus
& OHCI_RH_PORTSTATUS_LSDA
));
1434 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_RH_PORT_STATUS(Index
)), OHCI_RH_PORTSTATUS_PES
);
1440 This
->m_PortStatus
[Index
].PortStatus
|= USB_PORT_STATUS_CONNECT
;
1441 This
->m_PortStatus
[Index
].PortChange
|= USB_PORT_STATUS_CONNECT
;
1443 if ((PortStatus
& OHCI_RH_PORTSTATUS_LSDA
))
1446 // low speed device connected
1448 This
->m_PortStatus
[Index
].PortStatus
|= USB_PORT_STATUS_LOW_SPEED
;
1454 // device disconnected
1456 DPRINT1("Device disconnected at Port %x\n", Index
);
1459 // update port status flags
1461 This
->m_PortStatus
[Index
].PortStatus
&= ~USB_PORT_STATUS_LOW_SPEED
;
1462 This
->m_PortStatus
[Index
].PortStatus
&= ~USB_PORT_STATUS_CONNECT
;
1463 This
->m_PortStatus
[Index
].PortChange
|= USB_PORT_STATUS_CONNECT
;
1467 // is there a status change callback
1469 if (This
->m_SCECallBack
!= NULL
)
1472 // queue work item for processing
1474 ExQueueWorkItem(&This
->m_StatusChangeWorkItem
, DelayedWorkQueue
);
1485 StatusChangeWorkItemRoutine(
1489 // cast to hardware object
1491 CUSBHardwareDevice
* This
= (CUSBHardwareDevice
*)Context
;
1494 // is there a callback
1496 if (This
->m_SCECallBack
)
1501 This
->m_SCECallBack(This
->m_SCEContext
);
1508 PUSBHARDWAREDEVICE
*OutHardware
)
1510 PUSBHARDWAREDEVICE This
;
1512 This
= new(NonPagedPool
, TAG_USBOHCI
) CUSBHardwareDevice(0);
1515 return STATUS_INSUFFICIENT_RESOURCES
;
1520 *OutHardware
= (PUSBHARDWAREDEVICE
)This
;
1522 return STATUS_SUCCESS
;