include/ddk/ide.h

   1 /*
   2  * ide.h
   3  *
   4  * IDE driver interface
   5  *
   6  * This file is part of the w32api package.
   7  *
   8  * Contributors:
   9  *   Created by Hervé Poussineau <hpoussin@reactos.org>
  10  *
  11  * THIS SOFTWARE IS NOT COPYRIGHTED
  12  *
  13  * This source code is offered for use in the public domain. You may
  14  * use, modify or distribute it freely.
  15  *
  16  * This code is distributed in the hope that it will be useful but
  17  * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
  18  * DISCLAIMED. This includes but is not limited to warranties of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  20  *
  21  */
  22
  23 #ifndef __IDE_H
  24 #define __IDE_H
  25
  26 #if __GNUC__ >=3
  27 #pragma GCC system_header
  28 #endif
  29
  30 #ifdef __cplusplus
  31 extern "C" {
  32 #endif
  33
  34 #define MAX_IDE_CHANNEL   2
  35 #define MAX_IDE_LINE      2
  36 #define MAX_IDE_DEVICE    2
  37
  38 #include <pshpack1.h>
  39 typedef struct _IDENTIFY_DATA {
  40   USHORT GeneralConfiguration;       /* 00 */
  41   USHORT NumCylinders;               /* 02 */
  42   USHORT Reserved1;                  /* 04 */
  43   USHORT NumHeads;                   /* 06 */
  44   USHORT UnformattedBytesPerTrack;   /* 08 */
  45   USHORT UnformattedBytesPerSector;  /* 10 */
  46   USHORT NumSectorsPerTrack;         /* 12 */
  47   USHORT VendorUnique1[3];           /* 14 */
  48   UCHAR  SerialNumber[20];           /* 20 */
  49   USHORT BufferType;                 /* 40 */
  50   USHORT BufferSectorSize;           /* 42 */
  51   USHORT NumberOfEccBytes;           /* 44 */
  52   UCHAR  FirmwareRevision[8];        /* 46 */
  53   UCHAR  ModelNumber[40];            /* 54 */
  54   UCHAR  MaximumBlockTransfer;       /* 94 */
  55   UCHAR  VendorUnique2;              /* 95 */
  56   USHORT DoubleWordIo;               /* 96 */
  57   USHORT Capabilities;               /* 98 */
  58   USHORT Reserved2;                  /* 100 */
  59   UCHAR  VendorUnique3;              /* 102 */
  60   UCHAR  PioCycleTimingMode;         /* 103 */
  61   UCHAR  VendorUnique4;              /* 104 */
  62   UCHAR  DmaCycleTimingMode;         /* 105 */
  63   USHORT TranslationFieldsValid:3;   /* 106 */
  64   USHORT Reserved3:13;               /*  -  */
  65   USHORT NumberOfCurrentCylinders;   /* 108 */
  66   USHORT NumberOfCurrentHeads;       /* 110 */
  67   USHORT CurrentSectorsPerTrack;     /* 112 */
  68   ULONG  CurrentSectorCapacity;      /* 114 */
  69   USHORT CurrentMultiSectorSetting;  /* 118 */
  70   ULONG  UserAddressableSectors;     /* 120 */
  71   USHORT SingleWordDMASupport:8;     /* 124 */
  72   USHORT SingleWordDMAActive:8;      /*  -  */
  73   USHORT MultiWordDMASupport:8;      /* 126 */
  74   USHORT MultiWordDMAActive:8;       /*  -  */
  75   USHORT AdvancedPIOModes:8;         /* 128 */
  76   USHORT Reserved4:8;                /*  -  */
  77   USHORT MinimumMWXferCycleTime;     /* 130 */
  78   USHORT RecommendedMWXferCycleTime; /* 132 */
  79   USHORT MinimumPIOCycleTime;        /* 134 */
  80   USHORT MinimumPIOCycleTimeIORDY;   /* 136 */
  81   USHORT Reserved5[11];              /* 138 */
  82   USHORT MajorRevision;              /* 160 */
  83   USHORT MinorRevision;              /* 162 */
  84   USHORT Reserved6;                  /* 164 */
  85   USHORT CommandSetSupport;          /* 166 */
  86   USHORT Reserved6a[2];              /* 168 */
  87   USHORT CommandSetActive;           /* 172 */
  88   USHORT Reserved6b;                 /* 174 */
  89   USHORT UltraDMASupport:8;          /* 176 */
  90   USHORT UltraDMAActive:8;           /*  -  */
  91   USHORT Reserved7[11];              /* 178 */
  92   ULONG  Max48BitLBA[2];             /* 200 */
  93   USHORT Reserved7a[22];             /* 208 */
  94   USHORT LastLun:3;                  /* 252 */
  95   USHORT Reserved8:13;               /*  -  */
  96   USHORT MediaStatusNotification:2;  /* 254 */
  97   USHORT Reserved9:6;                /*  -  */
  98   USHORT DeviceWriteProtect:1;       /*  -  */
  99   USHORT Reserved10:7;               /*  -  */
 100   USHORT Reserved11[128];            /* 256 */
 101 } IDENTIFY_DATA, *PIDENTIFY_DATA;
 102
 103 typedef struct _EXTENDED_IDENTIFY_DATA {
 104   USHORT GeneralConfiguration;       /* 00 */
 105   USHORT NumCylinders;               /* 02 */
 106   USHORT Reserved1;                  /* 04 */
 107   USHORT NumHeads;                   /* 06 */
 108   USHORT UnformattedBytesPerTrack;   /* 08 */
 109   USHORT UnformattedBytesPerSector;  /* 10 */
 110   USHORT NumSectorsPerTrack;         /* 12 */
 111   union
 112   {
 113     USHORT VendorUnique1[3];         /* 14 */
 114     struct
 115     {
 116       UCHAR InterSectorGap;          /* 14 */
 117       UCHAR InterSectorGapSize;      /* -  */
 118       UCHAR Reserved16;              /* 16 */
 119       UCHAR BytesInPLO;              /* -  */
 120       USHORT VendorUniqueCnt;        /* 18 */
 121     } u;
 122   };
 123   UCHAR  SerialNumber[20];           /* 20 */
 124   USHORT BufferType;                 /* 40 */
 125   USHORT BufferSectorSize;           /* 42 */
 126   USHORT NumberOfEccBytes;           /* 44 */
 127   UCHAR  FirmwareRevision[8];        /* 46 */
 128   UCHAR  ModelNumber[40];            /* 54 */
 129   UCHAR  MaximumBlockTransfer;       /* 94 */
 130   UCHAR  VendorUnique2;              /* 95 */
 131   USHORT DoubleWordIo;               /* 96 */
 132   USHORT Capabilities;               /* 98 */
 133   USHORT Reserved2;                  /* 100 */
 134   UCHAR  VendorUnique3;              /* 102 */
 135   UCHAR  PioCycleTimingMode;         /* 103 */
 136   UCHAR  VendorUnique4;              /* 104 */
 137   UCHAR  DmaCycleTimingMode;         /* 105 */
 138   USHORT TranslationFieldsValid:3;   /* 106 */
 139   USHORT Reserved3:13;               /*  -  */
 140   USHORT NumberOfCurrentCylinders;   /* 108 */
 141   USHORT NumberOfCurrentHeads;       /* 110 */
 142   USHORT CurrentSectorsPerTrack;     /* 112 */
 143   ULONG  CurrentSectorCapacity;      /* 114 */
 144   USHORT CurrentMultiSectorSetting;  /* 118 */
 145   ULONG  UserAddressableSectors;     /* 120 */
 146   USHORT SingleWordDMASupport:8;     /* 124 */
 147   USHORT SingleWordDMAActive:8;      /*  -  */
 148   USHORT MultiWordDMASupport:8;      /* 126 */
 149   USHORT MultiWordDMAActive:8;       /*  -  */
 150   USHORT AdvancedPIOModes:8;         /* 128 */
 151   USHORT Reserved4:8;                /*  -  */
 152   USHORT MinimumMWXferCycleTime;     /* 130 */
 153   USHORT RecommendedMWXferCycleTime; /* 132 */
 154   USHORT MinimumPIOCycleTime;        /* 134 */
 155   USHORT MinimumPIOCycleTimeIORDY;   /* 136 */
 156   USHORT Reserved5[11];              /* 138 */
 157   USHORT MajorRevision;              /* 160 */
 158   USHORT MinorRevision;              /* 162 */
 159   USHORT Reserved6;                  /* 164 */
 160   USHORT CommandSetSupport;          /* 166 */
 161   USHORT Reserved6a[2];              /* 168 */
 162   USHORT CommandSetActive;           /* 172 */
 163   USHORT Reserved6b;                 /* 174 */
 164   USHORT UltraDMASupport:8;          /* 176 */
 165   USHORT UltraDMAActive:8;           /*  -  */
 166   USHORT Reserved7[11];              /* 178 */
 167   ULONG  Max48BitLBA[2];             /* 200 */
 168   USHORT Reserved7a[22];             /* 208 */
 169   USHORT LastLun:3;                  /* 252 */
 170   USHORT Reserved8:13;               /*  -  */
 171   USHORT MediaStatusNotification:2;  /* 254 */
 172   USHORT Reserved9:6;                /*  -  */
 173   USHORT DeviceWriteProtect:1;       /*  -  */
 174   USHORT Reserved10:7;               /*  -  */
 175   USHORT Reserved11[128];            /* 256 */
 176 } EXTENDED_IDENTIFY_DATA, *PEXTENDED_IDENTIFY_DATA;
 177 #include <poppack.h>
 178
 179 typedef struct _PCIIDE_TRANSFER_MODE_SELECT
 180 {
 181   ULONG Channel;
 182   BOOLEAN DevicePresent[MAX_IDE_DEVICE * MAX_IDE_LINE];
 183   BOOLEAN FixedDisk[MAX_IDE_DEVICE * MAX_IDE_LINE];
 184   BOOLEAN IoReadySupported[MAX_IDE_DEVICE * MAX_IDE_LINE];
 185   ULONG DeviceTransferModeSupported[MAX_IDE_DEVICE * MAX_IDE_LINE];
 186   ULONG BestPioCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
 187   ULONG BestSwDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
 188   ULONG BestMwDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
 189   ULONG BestUDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
 190   ULONG DeviceTransferModeCurrent[MAX_IDE_DEVICE * MAX_IDE_LINE];
 191   ULONG UserChoiceTransferMode[MAX_IDE_DEVICE * MAX_IDE_LINE];
 192   ULONG EnableUDMA66;
 193   IDENTIFY_DATA IdentifyData[MAX_IDE_DEVICE];
 194   ULONG DeviceTransferModeSelected[MAX_IDE_DEVICE * MAX_IDE_LINE];
 195   PULONG TransferModeTimingTable;
 196   ULONG TransferModeTableLength;
 197 } PCIIDE_TRANSFER_MODE_SELECT, *PPCIIDE_TRANSFER_MODE_SELECT;
 198
 199 typedef enum
 200 {
 201   ChannelDisabled = 0,
 202   ChannelEnabled,
 203   ChannelStateUnknown
 204 } IDE_CHANNEL_STATE;
 205
 206 typedef IDE_CHANNEL_STATE
 207 (NTAPI *PCIIDE_CHANNEL_ENABLED)(
 208   IN PVOID DeviceExtension,
 209   IN ULONG Channel);
 210
 211 typedef BOOLEAN
 212 (NTAPI *PCIIDE_SYNC_ACCESS_REQUIRED)(
 213   IN PVOID DeviceExtension);
 214
 215 typedef NTSTATUS
 216 (NTAPI *PCIIDE_TRANSFER_MODE_SELECT_FUNC)(
 217   IN PVOID DeviceExtension,
 218   IN OUT PPCIIDE_TRANSFER_MODE_SELECT XferMode);
 219
 220 typedef ULONG
 221 (NTAPI *PCIIDE_USEDMA_FUNC)(
 222   IN PVOID DeviceExtension,
 223   IN PUCHAR CdbCommand,
 224   IN PUCHAR Slave);
 225
 226 typedef NTSTATUS
 227 (NTAPI *PCIIDE_UDMA_MODES_SUPPORTED)(
 228   IN IDENTIFY_DATA IdentifyData,
 229   OUT PULONG BestXferMode,
 230   OUT PULONG CurrentXferMode);
 231
 232 typedef struct _IDE_CONTROLLER_PROPERTIES
 233 {
 234   ULONG Size;
 235   ULONG ExtensionSize;
 236   ULONG SupportedTransferMode[MAX_IDE_CHANNEL][MAX_IDE_DEVICE];
 237   PCIIDE_CHANNEL_ENABLED PciIdeChannelEnabled;
 238   PCIIDE_SYNC_ACCESS_REQUIRED PciIdeSyncAccessRequired;
 239   PCIIDE_TRANSFER_MODE_SELECT_FUNC PciIdeTransferModeSelect;
 240   BOOLEAN IgnoreActiveBitForAtaDevice;
 241   BOOLEAN AlwaysClearBusMasterInterrupt;
 242   PCIIDE_USEDMA_FUNC PciIdeUseDma;
 243   ULONG AlignmentRequirement;
 244   ULONG DefaultPIO;
 245   PCIIDE_UDMA_MODES_SUPPORTED PciIdeUdmaModesSupported;
 246 } IDE_CONTROLLER_PROPERTIES, *PIDE_CONTROLLER_PROPERTIES;
 247
 248 typedef NTSTATUS
 249 (NTAPI *PCONTROLLER_PROPERTIES)(
 250   IN PVOID DeviceExtension,
 251   IN PIDE_CONTROLLER_PROPERTIES ControllerProperties);
 252
 253 NTSTATUS NTAPI
 254 PciIdeXInitialize(
 255   IN PDRIVER_OBJECT DriverObject,
 256   IN PUNICODE_STRING RegistryPath,
 257   IN PCONTROLLER_PROPERTIES HwGetControllerProperties,
 258   IN ULONG ExtensionSize);
 259
 260 NTSTATUS NTAPI
 261 PciIdeXGetBusData(
 262   IN PVOID DeviceExtension,
 263   IN PVOID Buffer,
 264   IN ULONG ConfigDataOffset,
 265   IN ULONG BufferLength);
 266
 267 NTSTATUS NTAPI
 268 PciIdeXSetBusData(
 269   IN PVOID DeviceExtension,
 270   IN PVOID Buffer,
 271   IN PVOID DataMask,
 272   IN ULONG ConfigDataOffset,
 273   IN ULONG BufferLength);
 274
 275 /* Bit field values for
 276  * PCIIDE_TRANSFER_MODE_SELECT.DeviceTransferModeSupported and
 277  * IDE_CONTROLLER_PROPERTIES.SupportedTransferMode
 278  */
 279 // PIO Modes
 280 #define PIO_MODE0   (1 << 0)
 281 #define PIO_MODE1   (1 << 1)
 282 #define PIO_MODE2   (1 << 2)
 283 #define PIO_MODE3   (1 << 3)
 284 #define PIO_MODE4   (1 << 4)
 285 // Single-word DMA Modes
 286 #define SWDMA_MODE0 (1 << 5)
 287 #define SWDMA_MODE1 (1 << 6)
 288 #define SWDMA_MODE2 (1 << 7)
 289 // Multi-word DMA Modes
 290 #define MWDMA_MODE0 (1 << 8)
 291 #define MWDMA_MODE1 (1 << 9)
 292 #define MWDMA_MODE2 (1 << 10)
 293 // Ultra DMA Modes
 294 #define UDMA_MODE0  (1 << 11)
 295 #define UDMA_MODE1  (1 << 12)
 296 #define UDMA_MODE2  (1 << 13)
 297 #define UDMA_MODE3  (1 << 14)
 298 #define UDMA_MODE4  (1 << 15)
 299 #define UDMA_MODE5  (1 << 16)
 300
 301 #ifdef __cplusplus
 302 }
 303 #endif
 304
 305 #endif /* __IDE_H */