Sync with trunk (r48414)
[reactos.git] / lib / 3rdparty / libmpg123 / synth_arm.S
1 /*
2 synth_arm: ARM optimized synth
3
4 copyright 1995-2009 by the mpg123 project - free software under the terms of the LGPL 2.1
5 see COPYING and AUTHORS files in distribution or http://mpg123.org
6 initially written by Taihei Monma
7 */
8
9 #include "mangle.h"
10
11 #define WINDOW r0
12 #define B0 r1
13 #define SAMPLES r2
14 #define REG_CLIP r4
15 #define REG_MAX r12
16
17 /*
18 int synth_1to1_arm_asm(real *window, real *b0, short *samples, int bo1);
19 return value: number of clipped samples
20 */
21
22 .text
23 ALIGN4
24 .globl ASM_NAME(synth_1to1_arm_asm)
25 ASM_NAME(synth_1to1_arm_asm):
26 stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, lr}
27
28 add WINDOW, WINDOW, #64
29 sub WINDOW, WINDOW, r3, lsl #2
30 eor REG_CLIP, REG_CLIP, REG_CLIP
31 mov REG_MAX, #1073741824
32 sub REG_MAX, REG_MAX, #32768
33
34 mov r3, #16
35
36 ldr r5, [WINDOW], #4
37 ldr r6, [B0], #4
38 .Loop_start_1:
39 ldr r8, [WINDOW], #4
40 ldr r9, [B0], #4
41 mul r7, r5, r6
42 ldr r5, [WINDOW], #4
43 ldr r6, [B0], #4
44 mul r10, r8, r9
45 ldr r8, [WINDOW], #4
46 ldr r9, [B0], #4
47 mla r7, r5, r6, r7
48 ldr r5, [WINDOW], #4
49 ldr r6, [B0], #4
50 mla r10, r8, r9, r10
51 ldr r8, [WINDOW], #4
52 ldr r9, [B0], #4
53 mla r7, r5, r6, r7
54 ldr r5, [WINDOW], #4
55 ldr r6, [B0], #4
56 mla r10, r8, r9, r10
57 ldr r8, [WINDOW], #4
58 ldr r9, [B0], #4
59 mla r7, r5, r6, r7
60 ldr r5, [WINDOW], #4
61 ldr r6, [B0], #4
62 mla r10, r8, r9, r10
63 ldr r8, [WINDOW], #4
64 ldr r9, [B0], #4
65 mla r7, r5, r6, r7
66 ldr r5, [WINDOW], #4
67 ldr r6, [B0], #4
68 mla r10, r8, r9, r10
69 ldr r8, [WINDOW], #4
70 ldr r9, [B0], #4
71 mla r7, r5, r6, r7
72 ldr r5, [WINDOW], #4
73 ldr r6, [B0], #4
74 mla r10, r8, r9, r10
75 ldr r8, [WINDOW], #4
76 ldr r9, [B0], #4
77 mla r7, r5, r6, r7
78 ldr r5, [WINDOW], #4
79 ldr r6, [B0], #4
80 mla r10, r8, r9, r10
81 ldr r8, [WINDOW], #68
82 ldr r9, [B0], #4
83 mla r7, r5, r6, r7
84 ldr r5, [WINDOW], #4
85 ldr r6, [B0], #4
86 mla r10, r8, r9, r10
87
88 sub r7, r7, r10
89
90 cmp r7, REG_MAX
91 movgt r7, REG_MAX
92 addgt REG_CLIP, REG_CLIP, #1
93 cmp r7, #-1073741824
94 movlt r7, #-1073741824
95 addlt REG_CLIP, REG_CLIP, #1
96 movs r7, r7, asr #15
97 adc r7, r7, #0
98 strh r7, [SAMPLES], #4
99
100 subs r3, r3, #1
101 bne .Loop_start_1
102
103 add WINDOW, WINDOW, #4
104 add B0, B0, #4
105
106 ldr r8, [WINDOW], #8
107 ldr r9, [B0], #8
108 mul r7, r5, r6
109 ldr r5, [WINDOW], #8
110 ldr r6, [B0], #8
111 mul r10, r8, r9
112 ldr r8, [WINDOW], #8
113 ldr r9, [B0], #8
114 mla r7, r5, r6, r7
115 ldr r5, [WINDOW], #8
116 ldr r6, [B0], #8
117 mla r10, r8, r9, r10
118 ldr r8, [WINDOW], #8
119 ldr r9, [B0], #8
120 mla r7, r5, r6, r7
121 ldr r5, [WINDOW], #8
122 ldr r6, [B0], #8
123 mla r10, r8, r9, r10
124 ldr r8, [WINDOW], #72
125 ldr r9, [B0], #-120
126 mla r7, r5, r6, r7
127 ldr r5, [WINDOW], #4
128 ldr r6, [B0], #4
129 mla r10, r8, r9, r10
130
131 add r7, r7, r10
132
133 cmp r7, REG_MAX
134 movgt r7, REG_MAX
135 addgt REG_CLIP, REG_CLIP, #1
136 cmp r7, #-1073741824
137 movlt r7, #-1073741824
138 addlt REG_CLIP, REG_CLIP, #1
139 movs r7, r7, asr #15
140 adc r7, r7, #0
141 strh r7, [SAMPLES], #4
142
143 mov r3, #14
144
145 .Loop_start_2:
146 ldr r8, [WINDOW], #4
147 ldr r9, [B0], #4
148 mul r7, r5, r6
149 ldr r5, [WINDOW], #4
150 ldr r6, [B0], #4
151 mul r10, r8, r9
152 ldr r8, [WINDOW], #4
153 ldr r9, [B0], #4
154 mla r7, r5, r6, r7
155 ldr r5, [WINDOW], #4
156 ldr r6, [B0], #4
157 mla r10, r8, r9, r10
158 ldr r8, [WINDOW], #4
159 ldr r9, [B0], #4
160 mla r7, r5, r6, r7
161 ldr r5, [WINDOW], #4
162 ldr r6, [B0], #4
163 mla r10, r8, r9, r10
164 ldr r8, [WINDOW], #4
165 ldr r9, [B0], #4
166 mla r7, r5, r6, r7
167 ldr r5, [WINDOW], #4
168 ldr r6, [B0], #4
169 mla r10, r8, r9, r10
170 ldr r8, [WINDOW], #4
171 ldr r9, [B0], #4
172 mla r7, r5, r6, r7
173 ldr r5, [WINDOW], #4
174 ldr r6, [B0], #4
175 mla r10, r8, r9, r10
176 ldr r8, [WINDOW], #4
177 ldr r9, [B0], #4
178 mla r7, r5, r6, r7
179 ldr r5, [WINDOW], #4
180 ldr r6, [B0], #4
181 mla r10, r8, r9, r10
182 ldr r8, [WINDOW], #4
183 ldr r9, [B0], #4
184 mla r7, r5, r6, r7
185 ldr r5, [WINDOW], #4
186 ldr r6, [B0], #4
187 mla r10, r8, r9, r10
188 ldr r8, [WINDOW], #68
189 ldr r9, [B0], #-124
190 mla r7, r5, r6, r7
191 ldr r5, [WINDOW], #4
192 ldr r6, [B0], #4
193 mla r10, r8, r9, r10
194
195 add r7, r7, r10
196
197 cmp r7, REG_MAX
198 movgt r7, REG_MAX
199 addgt REG_CLIP, REG_CLIP, #1
200 cmp r7, #-1073741824
201 movlt r7, #-1073741824
202 addlt REG_CLIP, REG_CLIP, #1
203 movs r7, r7, asr #15
204 adc r7, r7, #0
205 strh r7, [SAMPLES], #4
206
207 subs r3, r3, #1
208 bne .Loop_start_2
209
210 ldr r8, [WINDOW], #4
211 ldr r9, [B0], #4
212 mul r7, r5, r6
213 ldr r5, [WINDOW], #4
214 ldr r6, [B0], #4
215 mul r10, r8, r9
216 ldr r8, [WINDOW], #4
217 ldr r9, [B0], #4
218 mla r7, r5, r6, r7
219 ldr r5, [WINDOW], #4
220 ldr r6, [B0], #4
221 mla r10, r8, r9, r10
222 ldr r8, [WINDOW], #4
223 ldr r9, [B0], #4
224 mla r7, r5, r6, r7
225 ldr r5, [WINDOW], #4
226 ldr r6, [B0], #4
227 mla r10, r8, r9, r10
228 ldr r8, [WINDOW], #4
229 ldr r9, [B0], #4
230 mla r7, r5, r6, r7
231 ldr r5, [WINDOW], #4
232 ldr r6, [B0], #4
233 mla r10, r8, r9, r10
234 ldr r8, [WINDOW], #4
235 ldr r9, [B0], #4
236 mla r7, r5, r6, r7
237 ldr r5, [WINDOW], #4
238 ldr r6, [B0], #4
239 mla r10, r8, r9, r10
240 ldr r8, [WINDOW], #4
241 ldr r9, [B0], #4
242 mla r7, r5, r6, r7
243 ldr r5, [WINDOW], #4
244 ldr r6, [B0], #4
245 mla r10, r8, r9, r10
246 ldr r8, [WINDOW], #4
247 ldr r9, [B0], #4
248 mla r7, r5, r6, r7
249 ldr r5, [WINDOW], #4
250 ldr r6, [B0], #4
251 mla r10, r8, r9, r10
252 ldr r8, [WINDOW]
253 ldr r9, [B0]
254 mla r7, r5, r6, r7
255 mla r10, r8, r9, r10
256
257 add r7, r7, r10
258
259 cmp r7, REG_MAX
260 movgt r7, REG_MAX
261 addgt REG_CLIP, REG_CLIP, #1
262 cmp r7, #-1073741824
263 movlt r7, #-1073741824
264 addlt REG_CLIP, REG_CLIP, #1
265 movs r7, r7, asr #15
266 adc r7, r7, #0
267 strh r7, [SAMPLES]
268
269 mov r0, REG_CLIP
270
271 ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}