reactos/drivers/dd/sound/dsp.c

   1 /*
   2  * COPYRIGHT:        See COPYING in the top level directory
   3  * PROJECT:          ReactOS kernel
   4  * FILE:             drivers/dd/sound/dsp.c
   5  * PURPOSE:          Digital Signal Processing ?
   6  * PROGRAMMER:       Snatched from ?
   7  *
   8  * UPDATE HISTORY:
   9  *              ??/??/??: Created
  10  *              10/23/02: Steven Edwards (Steven_Ed4153@yahoo.com)
  11  *                        Minor build fix
  12  */
  13
  14 #include "sb16.h"
  15 #include "dsp.h"
  16
  17 /************************************
  18  * unsigned char read_dsp(void)
  19  *
  20  * Reads the DSP chip
  21  * Arguments: none
  22  * Returns: Byte read
  23  ************************************/
  24 unsigned char read_dsp(unsigned short base)
  25 {
  26 //      while((inb(base+0x0e)&0x80)==0);        //Wait until there is something to read
  27 //      return  inb(base+0x0a);
  28         return 0;
  29 }
  30
  31 /************************************'
  32  * sb_status detect_dsp(void);
  33  *
  34  * Detects if a SB16 is installed
  35  * Arguments: None
  36  * Returns: Success or failure
  37  ************************************/
  38 sb_status detect_dsp(SB16* sb16)
  39 {
  40         for(base=0x200;base<0x280;base+=0x10)   //Tries to reset all DSP addresses there is
  41                 if(reset_dsp(base)==SB_TRUE)
  42                 {
  43                         sb16->base=base;
  44                         return SB_TRUE;
  45                 }
  46         return SB_FALSE;
  47 }
  48
  49 /**************************************
  50  * sb_status reset_dsp(unsigned short base_address);
  51  *
  52  * Tries to reset a DSP chip
  53  * Arguments: base address
  54  * Returns: Success of failure
  55  **************************************/
  56 sb_status reset_dsp(unsigned short base_address)
  57 {
  58 //      int delay;
  59
  60 //      outb(base_address+DSP_RESET_PORT,1);
  61 //      for(delay=0;delay<0xffff;delay++);
  62
  63 //      outb(base_address+DSP_RESET_PORT,0);
  64 //      for(delay=0;delay<0xffff;delay++);
  65
  66 //      if((inb(base_address+DSP_READ_STATUS_PORT)&0x80)==0) return SB_FALSE;
  67
  68 //      if(inb(base_address+DSP_READ_DATA_PORT)!=0xAA) return SB_FALSE;
  69
  70         return SB_TRUE;
  71 }
  72
  73 void write_dsp(unsigned short base,unsigned char data)
  74 {
  75 //  while ((inb(base+DSP_WRITE_PORT) & 0x80) != 0);
  76 //  outb(base+DSP_WRITE_PORT, data);
  77 }
  78