Branch setupapi
[reactos.git] / reactos / hal / hal / hal.c
1 /* $Id$
2 *
3 * COPYRIGHT: See COPYING in the top level directory
4 * PROJECT: ReactOS kernel
5 * FILE: hal/hal.c
6 * PURPOSE: Hardware Abstraction Layer DLL
7 * PROGRAMMER: Casper S. Hornstrup (chorns@users.sourceforge.net)
8 * REVISION HISTORY:
9 * 01-08-2001 CSH Created
10 */
11
12 /* INCLUDES ******************************************************************/
13
14 #include <ddk/ntddk.h>
15 #include <roscfg.h>
16
17 #define NDEBUG
18 #include <internal/debug.h>
19
20 /* DATA **********************************************************************/
21
22 ULONG EXPORTED KdComPortInUse = 0;
23
24 /* FUNCTIONS *****************************************************************/
25
26 NTSTATUS
27 STDCALL
28 DriverEntry(
29 PDRIVER_OBJECT DriverObject,
30 PUNICODE_STRING RegistryPath)
31 {
32 UNIMPLEMENTED;
33
34 return STATUS_SUCCESS;
35 }
36
37
38 VOID
39 FASTCALL
40 ExAcquireFastMutex(
41 PFAST_MUTEX FastMutex)
42 {
43 UNIMPLEMENTED;
44 }
45
46
47 VOID
48 FASTCALL
49 ExReleaseFastMutex(
50 PFAST_MUTEX FastMutex)
51 {
52 UNIMPLEMENTED;
53 }
54
55
56 BOOLEAN FASTCALL
57 ExTryToAcquireFastMutex(
58 PFAST_MUTEX FastMutex)
59 {
60 UNIMPLEMENTED;
61
62 return TRUE;
63 }
64
65
66 VOID
67 STDCALL
68 HalAcquireDisplayOwnership(
69 PHAL_RESET_DISPLAY_PARAMETERS ResetDisplayParameters)
70 {
71 UNIMPLEMENTED;
72 }
73
74
75 NTSTATUS
76 STDCALL
77 HalAdjustResourceList(
78 PCM_RESOURCE_LIST Resources)
79 {
80 UNIMPLEMENTED;
81
82 return STATUS_SUCCESS;
83 }
84
85
86 BOOLEAN
87 STDCALL
88 HalAllProcessorsStarted(VOID)
89 {
90 UNIMPLEMENTED;
91
92 return TRUE;
93 }
94
95
96 NTSTATUS
97 STDCALL
98 HalAllocateAdapterChannel(
99 PADAPTER_OBJECT AdapterObject,
100 PWAIT_CONTEXT_BLOCK WaitContextBlock,
101 ULONG NumberOfMapRegisters,
102 PDRIVER_CONTROL ExecutionRoutine)
103 {
104 UNIMPLEMENTED;
105
106 return STATUS_SUCCESS;
107 }
108
109
110 PVOID
111 STDCALL
112 HalAllocateCommonBuffer(
113 PADAPTER_OBJECT AdapterObject,
114 ULONG Length,
115 PPHYSICAL_ADDRESS LogicalAddress,
116 BOOLEAN CacheEnabled)
117 {
118 UNIMPLEMENTED;
119
120 return NULL;
121 }
122
123
124 NTSTATUS
125 STDCALL
126 HalAssignSlotResources(
127 PUNICODE_STRING RegistryPath,
128 PUNICODE_STRING DriverClassName,
129 PDRIVER_OBJECT DriverObject,
130 PDEVICE_OBJECT DeviceObject,
131 INTERFACE_TYPE BusType,
132 ULONG BusNumber,
133 ULONG SlotNumber,
134 PCM_RESOURCE_LIST *AllocatedResources)
135 {
136 UNIMPLEMENTED;
137
138 return TRUE;
139 }
140
141
142 BOOLEAN
143 STDCALL
144 HalBeginSystemInterrupt (ULONG Vector,
145 KIRQL Irql,
146 PKIRQL OldIrql)
147 {
148 UNIMPLEMENTED;
149
150 return TRUE;
151 }
152
153
154 VOID
155 STDCALL
156 HalCalibratePerformanceCounter(
157 ULONG Count)
158 {
159 UNIMPLEMENTED;
160 }
161
162
163 BOOLEAN
164 STDCALL
165 HalDisableSystemInterrupt(
166 ULONG Vector,
167 KIRQL Irql)
168 {
169 UNIMPLEMENTED;
170
171 return TRUE;
172 }
173
174
175 VOID
176 STDCALL
177 HalDisplayString(
178 PCH String)
179 {
180 UNIMPLEMENTED;
181 }
182
183
184 BOOLEAN
185 STDCALL
186 HalEnableSystemInterrupt(
187 ULONG Vector,
188 KIRQL Irql,
189 KINTERRUPT_MODE InterruptMode)
190 {
191 UNIMPLEMENTED;
192
193 return TRUE;
194 }
195
196
197 VOID
198 STDCALL
199 HalEndSystemInterrupt(
200 KIRQL Irql,
201 ULONG Unknown2)
202 {
203 UNIMPLEMENTED;
204 }
205
206
207 BOOLEAN
208 STDCALL
209 HalFlushCommonBuffer(
210 ULONG Unknown1,
211 ULONG Unknown2,
212 ULONG Unknown3,
213 ULONG Unknown4,
214 ULONG Unknown5,
215 ULONG Unknown6,
216 ULONG Unknown7,
217 ULONG Unknown8)
218 {
219 UNIMPLEMENTED;
220
221 return TRUE;
222 }
223
224
225 VOID
226 STDCALL
227 HalFreeCommonBuffer(
228 PADAPTER_OBJECT AdapterObject,
229 ULONG Length,
230 PHYSICAL_ADDRESS LogicalAddress,
231 PVOID VirtualAddress,
232 BOOLEAN CacheEnabled)
233 {
234 UNIMPLEMENTED;
235 }
236
237
238 PADAPTER_OBJECT
239 STDCALL
240 HalGetAdapter(
241 PDEVICE_DESCRIPTION DeviceDescription,
242 PULONG NumberOfMapRegisters)
243 {
244 UNIMPLEMENTED;
245
246 return (PADAPTER_OBJECT)NULL;
247 }
248
249
250 ULONG
251 STDCALL
252 HalGetBusData(
253 BUS_DATA_TYPE BusDataType,
254 ULONG BusNumber,
255 ULONG SlotNumber,
256 PVOID Buffer,
257 ULONG Length)
258 {
259 UNIMPLEMENTED;
260
261 return 0;
262 }
263
264
265 ULONG
266 STDCALL
267 HalGetBusDataByOffset(
268 BUS_DATA_TYPE BusDataType,
269 ULONG BusNumber,
270 ULONG SlotNumber,
271 PVOID Buffer,
272 ULONG Offset,
273 ULONG Length)
274 {
275 UNIMPLEMENTED;
276
277 return 0;
278 }
279
280
281 BOOLEAN
282 STDCALL
283 HalGetEnvironmentVariable(
284 PCH Name,
285 PCH Value,
286 USHORT ValueLength)
287 {
288 UNIMPLEMENTED;
289
290 return FALSE;
291 }
292
293
294 ULONG
295 STDCALL
296 HalGetInterruptVector(
297 INTERFACE_TYPE InterfaceType,
298 ULONG BusNumber,
299 ULONG BusInterruptLevel,
300 ULONG BusInterruptVector,
301 PKIRQL Irql,
302 PKAFFINITY Affinity)
303 {
304 UNIMPLEMENTED;
305
306 return 0;
307 }
308
309
310 VOID
311 STDCALL
312 HalHandleNMI(
313 ULONG Unused)
314 {
315 UNIMPLEMENTED;
316 }
317
318
319 BOOLEAN
320 STDCALL
321 HalInitSystem(
322 ULONG BootPhase,
323 PLOADER_PARAMETER_BLOCK LoaderBlock)
324 {
325 UNIMPLEMENTED;
326
327 return TRUE;
328 }
329
330
331 VOID
332 STDCALL
333 HalInitializeProcessor(
334 ULONG ProcessorNumber,
335 PVOID ProcessorStack)
336 {
337 UNIMPLEMENTED;
338 }
339
340
341 BOOLEAN
342 STDCALL
343 HalMakeBeep(
344 ULONG Frequency)
345 {
346 UNIMPLEMENTED;
347
348 return TRUE;
349 }
350
351
352 VOID
353 STDCALL
354 HalProcessorIdle(VOID)
355 {
356 UNIMPLEMENTED;
357 }
358
359
360 VOID
361 STDCALL
362 HalQueryDisplayParameters(
363 PULONG DispSizeX,
364 PULONG DispSizeY,
365 PULONG CursorPosX,
366 PULONG CursorPosY)
367 {
368 UNIMPLEMENTED;
369 }
370
371
372 VOID
373 STDCALL
374 HalQueryRealTimeClock(
375 PTIME_FIELDS Time)
376 {
377 UNIMPLEMENTED;
378 }
379
380
381 ULONG
382 STDCALL
383 HalReadDmaCounter(
384 PADAPTER_OBJECT AdapterObject)
385 {
386 UNIMPLEMENTED;
387 }
388
389
390 VOID
391 STDCALL
392 HalReportResourceUsage(VOID)
393 {
394 UNIMPLEMENTED;
395 }
396
397
398 VOID
399 STDCALL
400 HalRequestIpi(
401 ULONG Unknown)
402 {
403 UNIMPLEMENTED;
404 }
405
406
407 VOID
408 STDCALL
409 HalReturnToFirmware(
410 ULONG Action)
411 {
412 UNIMPLEMENTED;
413 }
414
415
416 ULONG
417 STDCALL
418 HalSetBusData(
419 BUS_DATA_TYPE BusDataType,
420 ULONG BusNumber,
421 ULONG SlotNumber,
422 PVOID Buffer,
423 ULONG Length)
424 {
425 UNIMPLEMENTED;
426
427 return 0;
428 }
429
430
431 ULONG
432 STDCALL
433 HalSetBusDataByOffset(
434 BUS_DATA_TYPE BusDataType,
435 ULONG BusNumber,
436 ULONG SlotNumber,
437 PVOID Buffer,
438 ULONG Offset,
439 ULONG Length)
440 {
441 UNIMPLEMENTED;
442
443 return 0;
444 }
445
446
447 VOID
448 STDCALL
449 HalSetDisplayParameters(
450 ULONG CursorPosX,
451 ULONG CursorPosY)
452 {
453 UNIMPLEMENTED;
454 }
455
456
457 BOOLEAN
458 STDCALL
459 HalSetEnvironmentVariable(
460 PCH Name,
461 PCH Value)
462 {
463 UNIMPLEMENTED;
464
465 return TRUE;
466 }
467
468
469 VOID
470 STDCALL
471 HalSetRealTimeClock(
472 PTIME_FIELDS Time)
473 {
474 UNIMPLEMENTED;
475 }
476
477
478 BOOLEAN
479 STDCALL
480 HalStartNextProcessor(
481 ULONG Unknown1,
482 ULONG Unknown2)
483 {
484 UNIMPLEMENTED;
485
486 return TRUE;
487 }
488
489
490 ULONG
491 FASTCALL
492 HalSystemVectorDispatchEntry(
493 ULONG Unknown1,
494 ULONG Unknown2,
495 ULONG Unknown3)
496 {
497 UNIMPLEMENTED;
498
499 return 0;
500 }
501
502
503 BOOLEAN
504 STDCALL
505 HalTranslateBusAddress(
506 INTERFACE_TYPE InterfaceType,
507 ULONG BusNumber,
508 PHYSICAL_ADDRESS BusAddress,
509 PULONG AddressSpace,
510 PPHYSICAL_ADDRESS TranslatedAddress)
511 {
512 UNIMPLEMENTED;
513
514 return TRUE;
515 }
516
517
518 VOID
519 STDCALL
520 IoAssignDriveLetters(
521 PLOADER_PARAMETER_BLOCK LoaderBlock,
522 PSTRING NtDeviceName,
523 PUCHAR NtSystemPath,
524 PSTRING NtSystemPathString)
525 {
526 UNIMPLEMENTED;
527 }
528
529
530 BOOLEAN
531 STDCALL
532 IoFlushAdapterBuffers(
533 PADAPTER_OBJECT AdapterObject,
534 PMDL Mdl,
535 PVOID MapRegisterBase,
536 PVOID CurrentVa,
537 ULONG Length,
538 BOOLEAN WriteToDevice)
539 {
540 UNIMPLEMENTED;
541
542 return TRUE;
543 }
544
545
546 VOID
547 STDCALL
548 IoFreeAdapterChannel(
549 PADAPTER_OBJECT AdapterObject)
550 {
551 UNIMPLEMENTED;
552 }
553
554
555 VOID
556 STDCALL
557 IoFreeMapRegisters(
558 PADAPTER_OBJECT AdapterObject,
559 PVOID MapRegisterBase,
560 ULONG NumberOfMapRegisters)
561 {
562 UNIMPLEMENTED;
563 }
564
565
566 PHYSICAL_ADDRESS
567 STDCALL
568 IoMapTransfer(
569 PADAPTER_OBJECT AdapterObject,
570 PMDL Mdl,
571 PVOID MapRegisterBase,
572 PVOID CurrentVa,
573 PULONG Length,
574 BOOLEAN WriteToDevice)
575 {
576 PHYSICAL_ADDRESS Address;
577
578 UNIMPLEMENTED;
579
580 Address.QuadPart = 0;
581
582 return Address;
583 }
584
585
586 BOOLEAN
587 STDCALL
588 KdPortGetByte(
589 PUCHAR ByteRecieved)
590 {
591 UNIMPLEMENTED;
592
593 return TRUE;
594 }
595
596
597 BOOLEAN
598 STDCALL
599 KdPortGetByteEx(
600 PKD_PORT_INFORMATION PortInformation,
601 PUCHAR ByteRecieved)
602 {
603 UNIMPLEMENTED;
604
605 return TRUE;
606 }
607
608
609 BOOLEAN
610 STDCALL
611 KdPortInitialize(
612 PKD_PORT_INFORMATION PortInformation,
613 DWORD Unknown1,
614 DWORD Unknown2)
615 {
616 UNIMPLEMENTED;
617
618 return TRUE;
619 }
620
621
622 BOOLEAN
623 STDCALL
624 KdPortPollByte(
625 PUCHAR ByteRecieved)
626 {
627 UNIMPLEMENTED;
628
629 return TRUE;
630 }
631
632
633 BOOLEAN
634 STDCALL
635 KdPortPollByteEx(
636 PKD_PORT_INFORMATION PortInformation,
637 PUCHAR ByteRecieved)
638 {
639 UNIMPLEMENTED;
640
641 return TRUE;
642 }
643
644
645 VOID
646 STDCALL
647 KdPortPutByte(
648 UCHAR ByteToSend)
649 {
650 UNIMPLEMENTED;
651 }
652
653
654 VOID
655 STDCALL
656 KdPortPutByteEx(
657 PKD_PORT_INFORMATION PortInformation,
658 UCHAR ByteToSend)
659 {
660 UNIMPLEMENTED;
661 }
662
663
664 VOID
665 STDCALL
666 KdPortRestore(VOID)
667 {
668 UNIMPLEMENTED;
669 }
670
671
672 VOID
673 STDCALL
674 KdPortSave(VOID)
675 {
676 UNIMPLEMENTED;
677 }
678
679
680 BOOLEAN
681 STDCALL
682 KdPortDisableInterrupts()
683 {
684 UNIMPLEMENTED;
685 }
686
687
688 BOOLEAN
689 STDCALL
690 KdPortEnableInterrupts()
691 {
692 UNIMPLEMENTED;
693 }
694
695
696 VOID
697 STDCALL
698 KeAcquireSpinLock(
699 PKSPIN_LOCK SpinLock,
700 PKIRQL OldIrql)
701 {
702 UNIMPLEMENTED;
703 }
704
705
706 KIRQL
707 FASTCALL
708 KeAcquireSpinLockRaiseToSynch(
709 PKSPIN_LOCK SpinLock)
710 {
711 UNIMPLEMENTED;
712 }
713
714
715 VOID
716 STDCALL
717 KeFlushWriteBuffer(VOID)
718 {
719 UNIMPLEMENTED;
720 }
721
722
723 KIRQL
724 STDCALL
725 KeGetCurrentIrql(VOID)
726 {
727 UNIMPLEMENTED;
728
729 return (KIRQL)0;
730 }
731
732
733 VOID
734 STDCALL
735 KeLowerIrql(
736 KIRQL NewIrql)
737 {
738 UNIMPLEMENTED;
739 }
740
741
742 LARGE_INTEGER
743 STDCALL
744 KeQueryPerformanceCounter(
745 PLARGE_INTEGER PerformanceFreq)
746 {
747 LARGE_INTEGER Value;
748
749 UNIMPLEMENTED;
750
751 Value.QuadPart = 0;
752
753 return Value;
754 }
755
756
757 VOID
758 STDCALL
759 KeRaiseIrql(
760 KIRQL NewIrql,
761 PKIRQL OldIrql)
762 {
763 UNIMPLEMENTED;
764 }
765
766
767 KIRQL
768 STDCALL
769 KeRaiseIrqlToDpcLevel(VOID)
770 {
771 UNIMPLEMENTED;
772
773 return (KIRQL)0;
774 }
775
776
777 KIRQL
778 STDCALL
779 KeRaiseIrqlToSynchLevel(VOID)
780 {
781 UNIMPLEMENTED;
782
783 return (KIRQL)0;
784 }
785
786
787 VOID
788 STDCALL
789 KeReleaseSpinLock(
790 PKSPIN_LOCK SpinLock,
791 KIRQL NewIrql)
792 {
793 UNIMPLEMENTED;
794 }
795
796
797 VOID
798 STDCALL
799 KeStallExecutionProcessor(
800 ULONG Microseconds)
801 {
802 UNIMPLEMENTED;
803 }
804
805
806 KIRQL
807 FASTCALL
808 KfAcquireSpinLock(
809 PKSPIN_LOCK SpinLock)
810 {
811 UNIMPLEMENTED;
812
813 return (KIRQL)0;
814 }
815
816
817 VOID
818 FASTCALL
819 KfLowerIrql(
820 KIRQL NewIrql)
821 {
822 UNIMPLEMENTED;
823 }
824
825
826 KIRQL
827 FASTCALL
828 KfRaiseIrql(
829 KIRQL NewIrql)
830 {
831 UNIMPLEMENTED;
832
833 return (KIRQL)0;
834 }
835
836
837 VOID
838 FASTCALL
839 KfReleaseSpinLock(
840 PKSPIN_LOCK SpinLock,
841 KIRQL NewIrql)
842 {
843 UNIMPLEMENTED;
844 }
845
846
847 VOID
848 STDCALL
849 READ_PORT_BUFFER_UCHAR(
850 PUCHAR Port,
851 PUCHAR Buffer,
852 ULONG Count)
853 {
854 UNIMPLEMENTED;
855 }
856
857
858 VOID
859 STDCALL
860 READ_PORT_BUFFER_ULONG(
861 PULONG Port,
862 PULONG Buffer,
863 ULONG Count)
864 {
865 UNIMPLEMENTED;
866 }
867
868
869 VOID
870 STDCALL
871 READ_PORT_BUFFER_USHORT(
872 PUSHORT Port,
873 PUSHORT Buffer,
874 ULONG Count)
875 {
876 UNIMPLEMENTED;
877 }
878
879
880 UCHAR
881 STDCALL
882 READ_PORT_UCHAR(
883 PUCHAR Port)
884 {
885 UNIMPLEMENTED;
886
887 return 0;
888 }
889
890
891 ULONG
892 STDCALL
893 READ_PORT_ULONG(
894 PULONG Port)
895 {
896 UNIMPLEMENTED;
897
898 return 0;
899 }
900
901
902 USHORT
903 STDCALL
904 READ_PORT_USHORT(
905 PUSHORT Port)
906 {
907 UNIMPLEMENTED;
908
909 return 0;
910 }
911
912
913 VOID
914 STDCALL
915 WRITE_PORT_BUFFER_UCHAR(
916 PUCHAR Port,
917 PUCHAR Buffer,
918 ULONG Count)
919 {
920 UNIMPLEMENTED;
921 }
922
923
924 VOID
925 STDCALL
926 WRITE_PORT_BUFFER_USHORT(
927 PUSHORT Port,
928 PUSHORT Buffer,
929 ULONG Count)
930 {
931 UNIMPLEMENTED;
932 }
933
934
935 VOID
936 STDCALL
937 WRITE_PORT_BUFFER_ULONG(
938 PULONG Port,
939 PULONG Buffer,
940 ULONG Count)
941 {
942 UNIMPLEMENTED;
943 }
944
945
946 VOID
947 STDCALL
948 WRITE_PORT_UCHAR(
949 PUCHAR Port,
950 UCHAR Value)
951 {
952 UNIMPLEMENTED;
953 }
954
955 VOID
956 STDCALL
957 WRITE_PORT_ULONG(
958 PULONG Port,
959 ULONG Value)
960 {
961 UNIMPLEMENTED;
962 }
963
964 VOID
965 STDCALL
966 WRITE_PORT_USHORT(
967 PUSHORT Port,
968 USHORT Value)
969 {
970 UNIMPLEMENTED;
971 }
972
973 /* EOF */