reactos/hal/halarm/generic/hal.c

   1 /*
   2  * PROJECT:         ReactOS HAL
   3  * LICENSE:         BSD - See COPYING.ARM in the top level directory
   4  * FILE:            hal/halarm/generic/hal.c
   5  * PURPOSE:         Hardware Abstraction Layer
   6  * PROGRAMMERS:     ReactOS Portable Systems Group
   7  */
   8
   9 /* INCLUDES *******************************************************************/
  10
  11 #include <hal.h>
  12 #define NDEBUG
  13 #include <debug.h>
  14
  15 #undef ExAcquireFastMutex
  16 #undef ExReleaseFastMutex
  17 #undef ExTryToAcquireFastMutex
  18 #undef KeAcquireSpinLock
  19 #undef KeLowerIrql
  20 #undef KeRaiseIrql
  21 #undef KeReleaseSpinLock
  22
  23 #define READ_REGISTER_ULONG(r) (*(volatile ULONG * const)(r))
  24 #define WRITE_REGISTER_ULONG(r, v) (*(volatile ULONG *)(r) = (v))
  25
  26 /* DATA **********************************************************************/
  27
  28 ULONG HalpCurrentTimeIncrement, HalpNextTimeIncrement, HalpNextIntervalCount;
  29 ULONG _KdComPortInUse = 0;
  30
  31 ULONG HalpIrqlTable[HIGH_LEVEL + 1] =
  32 {
  33     0xFFFFFFFF, // IRQL 0 PASSIVE_LEVEL
  34     0xFFFFFFFD, // IRQL 1 APC_LEVEL
  35     0xFFFFFFF9, // IRQL 2 DISPATCH_LEVEL
  36     0xFFFFFFD9, // IRQL 3
  37     0xFFFFFF99, // IRQL 4
  38     0xFFFFFF19, // IRQL 5
  39     0xFFFFFE19, // IRQL 6
  40     0xFFFFFC19, // IRQL 7
  41     0xFFFFF819, // IRQL 8
  42     0xFFFFF019, // IRQL 9
  43     0xFFFFE019, // IRQL 10
  44     0xFFFFC019, // IRQL 11
  45     0xFFFF8019, // IRQL 12
  46     0xFFFF0019, // IRQL 13
  47     0xFFFE0019, // IRQL 14
  48     0xFFFC0019, // IRQL 15
  49     0xFFF80019, // IRQL 16
  50     0xFFF00019, // IRQL 17
  51     0xFFE00019, // IRQL 18
  52     0xFFC00019, // IRQL 19
  53     0xFF800019, // IRQL 20
  54     0xFF000019, // IRQL 21
  55     0xFE000019, // IRQL 22
  56     0xFC000019, // IRQL 23
  57     0xF0000019, // IRQL 24
  58     0x80000019, // IRQL 25
  59     0x19,       // IRQL 26
  60     0x18,       // IRQL 27 PROFILE_LEVEL
  61     0x10,       // IRQL 28 CLOCK2_LEVEL
  62     0x00,       // IRQL 29 IPI_LEVEL
  63     0x00,       // IRQL 30 POWER_LEVEL
  64     0x00,       // IRQL 31 HIGH_LEVEL
  65 };
  66
  67 UCHAR HalpMaskTable[HIGH_LEVEL + 1] =
  68 {
  69     PROFILE_LEVEL, // INT 0 WATCHDOG
  70     APC_LEVEL,     // INT 1 SOFTWARE INTERRUPT
  71     DISPATCH_LEVEL,// INT 2 COMM RX
  72     IPI_LEVEL,     // INT 3 COMM TX
  73     CLOCK2_LEVEL,  // INT 4 TIMER 0
  74     3,
  75     4,
  76     5,
  77     6,
  78     7,
  79     8,
  80     9,
  81     10,
  82     11,
  83     12,
  84     13,
  85     14,
  86     15,
  87     16,
  88     17,
  89     18,
  90     19,
  91     20,
  92     21,
  93     22,
  94     23,
  95     24,
  96     25,
  97     26,
  98     26,
  99     26
 100 };
 101
 102 /* FUNCTIONS *****************************************************************/
 103
 104 NTSTATUS
 105 NTAPI
 106 DriverEntry(
 107   PDRIVER_OBJECT DriverObject,
 108   PUNICODE_STRING RegistryPath)
 109 {
 110   UNIMPLEMENTED;
 111
 112   return STATUS_SUCCESS;
 113 }
 114
 115 /*
 116 * @unimplemented
 117 */
 118 VOID
 119 NTAPI
 120 HalStopProfileInterrupt(IN KPROFILE_SOURCE ProfileSource)
 121 {
 122     KEBUGCHECK(0);
 123     return;
 124 }
 125
 126 /*
 127 * @unimplemented
 128 */
 129 VOID
 130 NTAPI
 131 HalStartProfileInterrupt(IN KPROFILE_SOURCE ProfileSource)
 132 {
 133     KEBUGCHECK(0);
 134     return;
 135 }
 136
 137 /*
 138 * @unimplemented
 139 */
 140 ULONG_PTR
 141 NTAPI
 142 HalSetProfileInterval(IN ULONG_PTR Interval)
 143 {
 144     KEBUGCHECK(0);
 145     return Interval;
 146 }
 147
 148 VOID
 149 FASTCALL
 150 ExAcquireFastMutex(
 151   PFAST_MUTEX FastMutex)
 152 {
 153   UNIMPLEMENTED;
 154 }
 155
 156
 157 VOID
 158 FASTCALL
 159 ExReleaseFastMutex(
 160   PFAST_MUTEX FastMutex)
 161 {
 162   UNIMPLEMENTED;
 163 }
 164
 165
 166 BOOLEAN FASTCALL
 167 ExTryToAcquireFastMutex(
 168   PFAST_MUTEX FastMutex)
 169 {
 170   UNIMPLEMENTED;
 171
 172   return TRUE;
 173 }
 174
 175
 176 VOID
 177 NTAPI
 178 HalAcquireDisplayOwnership(
 179   PHAL_RESET_DISPLAY_PARAMETERS ResetDisplayParameters)
 180 {
 181   UNIMPLEMENTED;
 182 }
 183
 184
 185 NTSTATUS
 186 NTAPI
 187 HalAdjustResourceList(
 188   PCM_RESOURCE_LIST Resources)
 189 {
 190   UNIMPLEMENTED;
 191
 192   return STATUS_SUCCESS;
 193 }
 194
 195
 196 /*
 197  * @implemented
 198  */
 199 BOOLEAN
 200 NTAPI
 201 HalAllProcessorsStarted(VOID)
 202 {
 203     /* Do nothing */
 204     return TRUE;
 205 }
 206
 207
 208 NTSTATUS
 209 NTAPI
 210 HalAllocateAdapterChannel(
 211   PADAPTER_OBJECT AdapterObject,
 212   PWAIT_CONTEXT_BLOCK WaitContextBlock,
 213   ULONG NumberOfMapRegisters,
 214   PDRIVER_CONTROL ExecutionRoutine)
 215 {
 216   UNIMPLEMENTED;
 217
 218   return STATUS_SUCCESS;
 219 }
 220
 221
 222 PVOID
 223 NTAPI
 224 HalAllocateCommonBuffer(
 225   PADAPTER_OBJECT AdapterObject,
 226   ULONG Length,
 227   PPHYSICAL_ADDRESS LogicalAddress,
 228   BOOLEAN CacheEnabled)
 229 {
 230   UNIMPLEMENTED;
 231
 232   return NULL;
 233 }
 234
 235
 236 PVOID
 237 NTAPI
 238 HalAllocateCrashDumpRegisters(
 239   PADAPTER_OBJECT AdapterObject,
 240   PULONG NumberOfMapRegisters)
 241 {
 242   UNIMPLEMENTED;
 243   return NULL;
 244 }
 245
 246
 247 NTSTATUS
 248 NTAPI
 249 HalAssignSlotResources(
 250   PUNICODE_STRING RegistryPath,
 251   PUNICODE_STRING DriverClassName,
 252   PDRIVER_OBJECT DriverObject,
 253   PDEVICE_OBJECT DeviceObject,
 254   INTERFACE_TYPE BusType,
 255   ULONG BusNumber,
 256   ULONG SlotNumber,
 257   PCM_RESOURCE_LIST *AllocatedResources)
 258 {
 259   UNIMPLEMENTED;
 260
 261   return TRUE;
 262 }
 263
 264
 265 BOOLEAN
 266 NTAPI
 267 HalBeginSystemInterrupt (KIRQL Irql,
 268                          ULONG Vector,
 269                          PKIRQL OldIrql)
 270 {
 271   UNIMPLEMENTED;
 272
 273   return TRUE;
 274 }
 275
 276
 277 VOID
 278 NTAPI
 279 HalCalibratePerformanceCounter(
 280   volatile LONG *Count,
 281   ULONGLONG NewCount)
 282 {
 283   UNIMPLEMENTED;
 284 }
 285
 286
 287 BOOLEAN
 288 NTAPI
 289 HalDisableSystemInterrupt(
 290   ULONG Vector,
 291   KIRQL Irql)
 292 {
 293   UNIMPLEMENTED;
 294
 295   return TRUE;
 296 }
 297
 298
 299 VOID
 300 NTAPI
 301 HalDisplayString(
 302   PCH String)
 303 {
 304   UNIMPLEMENTED;
 305 }
 306
 307
 308 BOOLEAN
 309 NTAPI
 310 HalEnableSystemInterrupt(
 311   ULONG Vector,
 312   KIRQL Irql,
 313   KINTERRUPT_MODE InterruptMode)
 314 {
 315   UNIMPLEMENTED;
 316
 317   return TRUE;
 318 }
 319
 320
 321 VOID
 322 NTAPI
 323 HalEndSystemInterrupt(
 324   KIRQL Irql,
 325   ULONG Unknown2)
 326 {
 327   UNIMPLEMENTED;
 328 }
 329
 330
 331 BOOLEAN
 332 NTAPI
 333 HalFlushCommonBuffer(
 334   ULONG Unknown1,
 335   ULONG Unknown2,
 336   ULONG Unknown3,
 337   ULONG Unknown4,
 338   ULONG Unknown5)
 339 {
 340   UNIMPLEMENTED;
 341
 342    return TRUE;
 343 }
 344
 345
 346 VOID
 347 NTAPI
 348 HalFreeCommonBuffer(
 349   PADAPTER_OBJECT AdapterObject,
 350   ULONG Length,
 351   PHYSICAL_ADDRESS LogicalAddress,
 352   PVOID VirtualAddress,
 353   BOOLEAN CacheEnabled)
 354 {
 355   UNIMPLEMENTED;
 356 }
 357
 358
 359 PADAPTER_OBJECT
 360 NTAPI
 361 HalGetAdapter(
 362   PDEVICE_DESCRIPTION DeviceDescription,
 363   PULONG NumberOfMapRegisters)
 364 {
 365   UNIMPLEMENTED;
 366
 367   return (PADAPTER_OBJECT)NULL;
 368 }
 369
 370
 371 ULONG
 372 NTAPI
 373 HalGetBusData(
 374   BUS_DATA_TYPE BusDataType,
 375   ULONG BusNumber,
 376   ULONG SlotNumber,
 377   PVOID Buffer,
 378   ULONG Length)
 379 {
 380   UNIMPLEMENTED;
 381
 382   return 0;
 383 }
 384
 385
 386 ULONG
 387 NTAPI
 388 HalGetBusDataByOffset(
 389   BUS_DATA_TYPE BusDataType,
 390   ULONG BusNumber,
 391   ULONG SlotNumber,
 392   PVOID Buffer,
 393   ULONG Offset,
 394   ULONG Length)
 395 {
 396   UNIMPLEMENTED;
 397
 398   return 0;
 399 }
 400
 401
 402 ARC_STATUS
 403 NTAPI
 404 HalGetEnvironmentVariable(
 405   PCH Name,
 406   USHORT ValueLength,
 407   PCH Value)
 408 {
 409   UNIMPLEMENTED;
 410
 411   return ENOENT;
 412 }
 413
 414
 415 ULONG
 416 NTAPI
 417 HalGetInterruptVector(
 418   INTERFACE_TYPE InterfaceType,
 419   ULONG BusNumber,
 420   ULONG BusInterruptLevel,
 421   ULONG BusInterruptVector,
 422   PKIRQL Irql,
 423   PKAFFINITY Affinity)
 424 {
 425   UNIMPLEMENTED;
 426
 427   return 0;
 428 }
 429
 430
 431 VOID
 432 NTAPI
 433 HalHandleNMI(
 434   PVOID NmiData)
 435 {
 436   UNIMPLEMENTED;
 437 }
 438
 439 VOID
 440 NTAPI
 441 HalpGetParameters(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
 442 {
 443     PCHAR CommandLine;
 444
 445     /* Make sure we have a loader block and command line */
 446     if ((LoaderBlock) && (LoaderBlock->LoadOptions))
 447     {
 448         /* Read the command line */
 449         CommandLine = LoaderBlock->LoadOptions;
 450
 451         /* Check for initial breakpoint */
 452         if (strstr(CommandLine, "BREAK")) DbgBreakPoint();
 453     }
 454 }
 455
 456 ULONG
 457 HalGetInterruptSource(VOID)
 458 {
 459     ULONG InterruptStatus;
 460
 461     //
 462     // Get the interrupt status, and return the highest bit set
 463     //
 464     InterruptStatus = READ_REGISTER_ULONG(VIC_INT_STATUS);
 465     return 31 - _clz(InterruptStatus);
 466 }
 467
 468 VOID
 469 HalpClockInterrupt(VOID)
 470 {
 471     //
 472     // Clear the interrupt
 473     //
 474     ASSERT(KeGetCurrentIrql() == CLOCK2_LEVEL);
 475     WRITE_REGISTER_ULONG(TIMER0_INT_CLEAR, 1);
 476
 477     //
 478     // FIXME: Update HAL Perf counters
 479     //
 480
 481     //
 482     // FIXME: Check if someone changed the clockrate
 483     //
 484
 485     //
 486     // Call the kernel
 487     //
 488     KeUpdateSystemTime(KeGetCurrentThread()->TrapFrame,
 489                        CLOCK2_LEVEL,
 490                        HalpCurrentTimeIncrement);
 491
 492     //
 493     // We're done
 494     //
 495 }
 496
 497 VOID
 498 HalpStallInterrupt(VOID)
 499 {
 500     //
 501     // Clear the interrupt
 502     //
 503     WRITE_REGISTER_ULONG(TIMER0_INT_CLEAR, 1);
 504 }
 505
 506 VOID
 507 HalpInitializeInterrupts(VOID)
 508 {
 509     PKPCR Pcr = (PKPCR)KeGetPcr();
 510     ULONG ClockInterval;
 511     SP804_CONTROL_REGISTER ControlRegister;
 512
 513     //
 514     // Fill out the IRQL mappings
 515     //
 516     RtlCopyMemory(Pcr->IrqlTable, HalpIrqlTable, sizeof(Pcr->IrqlTable));
 517     RtlCopyMemory(Pcr->IrqlMask, HalpMaskTable, sizeof(Pcr->IrqlMask));
 518
 519     //
 520     // Setup the clock and profile interrupt
 521     //
 522     Pcr->InterruptRoutine[CLOCK2_LEVEL] = HalpStallInterrupt;
 523
 524     //
 525     // Configure the interval to 10ms
 526     //  (INTERVAL (10ms) * TIMCLKfreq (1MHz))
 527     // --------------------------------------- == 10^4
 528     //  (TIMCLKENXdiv (1) * PRESCALEdiv (1))
 529     //
 530     ClockInterval = 0x2710;
 531
 532     //
 533     // Configure the timer
 534     //
 535     ControlRegister.AsUlong = 0;
 536     ControlRegister.Wide = TRUE;
 537     ControlRegister.Periodic = TRUE;
 538     ControlRegister.Interrupt = TRUE;
 539     ControlRegister.Enabled = TRUE;
 540
 541     //
 542     // Enable the timer
 543     //
 544     WRITE_REGISTER_ULONG(TIMER0_LOAD, ClockInterval);
 545     WRITE_REGISTER_ULONG(TIMER0_CONTROL, ControlRegister.AsUlong);
 546 }
 547
 548 /*
 549  * @implemented
 550  */
 551 BOOLEAN
 552 NTAPI
 553 HalInitSystem(IN ULONG BootPhase,
 554               IN PLOADER_PARAMETER_BLOCK LoaderBlock)
 555 {
 556     PKPRCB Prcb = KeGetCurrentPrcb();
 557
 558     //
 559     // Check the boot phase
 560     //
 561     if (!BootPhase)
 562     {
 563         //
 564         // Get command-line parameters
 565         //
 566         HalpGetParameters(LoaderBlock);
 567
 568 #if DBG
 569         //
 570         // Checked HAL requires checked kernel
 571         //
 572         if (!(Prcb->BuildType & PRCB_BUILD_DEBUG))
 573         {
 574             //
 575             // No match, bugcheck
 576             //
 577             KeBugCheckEx(MISMATCHED_HAL, 2, Prcb->BuildType, 1, 0);
 578         }
 579 #else
 580         //
 581         // Release build requires release HAL
 582         //
 583         if (Prcb->BuildType & PRCB_BUILD_DEBUG)
 584         {
 585             //
 586             // No match, bugcheck
 587             //
 588             KeBugCheckEx(MISMATCHED_HAL, 2, Prcb->BuildType, 0, 0);
 589         }
 590 #endif
 591
 592 #ifdef CONFIG_SMP
 593         //
 594         // SMP HAL requires SMP kernel
 595         //
 596         if (Prcb->BuildType & PRCB_BUILD_UNIPROCESSOR)
 597         {
 598             //
 599             // No match, bugcheck
 600             //
 601             KeBugCheckEx(MISMATCHED_HAL, 2, Prcb->BuildType, 0, 0);
 602         }
 603 #endif
 604
 605         //
 606         // Validate the PRCB
 607         //
 608         if (Prcb->MajorVersion != PRCB_MAJOR_VERSION)
 609         {
 610             //
 611             // Validation failed, bugcheck
 612             //
 613             KeBugCheckEx(MISMATCHED_HAL, 1, Prcb->MajorVersion, 1, 0);
 614         }
 615
 616         //
 617         // Setup time increments to 10ms and 1ms
 618         //
 619         HalpCurrentTimeIncrement = 100000;
 620         HalpNextTimeIncrement = 100000;
 621         HalpNextIntervalCount = 0;
 622         KeSetTimeIncrement(100000, 10000);
 623
 624         //
 625         // Initialize interrupts
 626         //
 627         HalpInitializeInterrupts();
 628     }
 629     else if (BootPhase == 1)
 630     {
 631         //
 632         // Switch to real clock interrupt
 633         //
 634         PCR->InterruptRoutine[CLOCK2_LEVEL] = HalpClockInterrupt;
 635     }
 636
 637     //
 638     // All done, return
 639     //
 640     return TRUE;
 641 }
 642
 643
 644 VOID
 645 NTAPI
 646 HalInitializeProcessor(IN ULONG ProcessorNumber,
 647                        IN PLOADER_PARAMETER_BLOCK LoaderBlock)
 648 {
 649     //
 650     // Nothing to do
 651     //
 652     return;
 653 }
 654
 655
 656 BOOLEAN
 657 NTAPI
 658 HalMakeBeep(
 659   ULONG Frequency)
 660 {
 661   UNIMPLEMENTED;
 662
 663   return TRUE;
 664 }
 665
 666
 667 VOID
 668 NTAPI
 669 HalProcessorIdle(VOID)
 670 {
 671   UNIMPLEMENTED;
 672 }
 673
 674
 675 BOOLEAN
 676 NTAPI
 677 HalQueryDisplayOwnership(VOID)
 678 {
 679   UNIMPLEMENTED;
 680
 681   return FALSE;
 682 }
 683
 684
 685 VOID
 686 NTAPI
 687 HalQueryDisplayParameters(
 688   OUT PULONG DispSizeX,
 689   OUT PULONG DispSizeY,
 690   OUT PULONG CursorPosX,
 691   OUT PULONG CursorPosY)
 692 {
 693   UNIMPLEMENTED;
 694 }
 695
 696 #define RTC_DATA   (PVOID)0xE00E8000
 697
 698 BOOLEAN
 699 NTAPI
 700 HalQueryRealTimeClock(IN PTIME_FIELDS Time)
 701 {
 702     LARGE_INTEGER LargeTime;
 703     ULONG Seconds;
 704
 705     //
 706     // Query the RTC value
 707     //
 708     Seconds = READ_REGISTER_ULONG(RTC_DATA);
 709
 710     //
 711     // Convert to time
 712     //
 713     RtlSecondsSince1970ToTime(Seconds, &LargeTime);
 714
 715     //
 716     // Convert to time-fields
 717     //
 718     RtlTimeToTimeFields(&LargeTime, Time);
 719     return TRUE;
 720 }
 721
 722 ULONG
 723 NTAPI
 724 HalReadDmaCounter(
 725   PADAPTER_OBJECT AdapterObject)
 726 {
 727   UNIMPLEMENTED;
 728
 729   return 0;
 730 }
 731
 732
 733 VOID
 734 NTAPI
 735 HalReleaseDisplayOwnership(VOID)
 736 {
 737   UNIMPLEMENTED;
 738 }
 739
 740 VOID
 741 NTAPI
 742 HalReportResourceUsage(VOID)
 743 {
 744   UNIMPLEMENTED;
 745 }
 746
 747
 748 VOID
 749 NTAPI
 750 HalRequestIpi(
 751   ULONG Unknown)
 752 {
 753   UNIMPLEMENTED;
 754 }
 755
 756
 757 VOID
 758 FASTCALL
 759 HalRequestSoftwareInterrupt(IN KIRQL Request)
 760 {
 761     //
 762     // Force a software interrupt
 763     //
 764     DPRINT1("[SOFTINT]: %d\n", Request);
 765     WRITE_REGISTER_ULONG(VIC_SOFT_INT, 1 << Request);
 766 }
 767
 768 VOID
 769 FASTCALL
 770 HalClearSoftwareInterrupt(IN KIRQL Request)
 771 {
 772     //
 773     // Force a software interrupt
 774     //
 775     DPRINT1("[SOFTINTC] %d\n", Request);
 776     WRITE_REGISTER_ULONG(VIC_SOFT_INT_CLEAR, 1 << Request);
 777 }
 778
 779 VOID
 780 NTAPI
 781 HalReturnToFirmware(
 782   FIRMWARE_REENTRY Action)
 783 {
 784   UNIMPLEMENTED;
 785 }
 786
 787
 788 ULONG
 789 NTAPI
 790 HalSetBusData(
 791   BUS_DATA_TYPE BusDataType,
 792   ULONG BusNumber,
 793   ULONG SlotNumber,
 794   PVOID Buffer,
 795   ULONG Length)
 796 {
 797   UNIMPLEMENTED;
 798
 799   return 0;
 800 }
 801
 802
 803 ULONG
 804 NTAPI
 805 HalSetBusDataByOffset(
 806   BUS_DATA_TYPE BusDataType,
 807   ULONG BusNumber,
 808   ULONG SlotNumber,
 809   PVOID Buffer,
 810   ULONG Offset,
 811   ULONG Length)
 812 {
 813   UNIMPLEMENTED;
 814
 815   return 0;
 816 }
 817
 818
 819 VOID
 820 NTAPI
 821 HalSetDisplayParameters(
 822   ULONG CursorPosX,
 823   ULONG CursorPosY)
 824 {
 825   UNIMPLEMENTED;
 826 }
 827
 828
 829 ARC_STATUS
 830 NTAPI
 831 HalSetEnvironmentVariable(
 832   PCH Name,
 833   PCH Value)
 834 {
 835   UNIMPLEMENTED;
 836
 837   return ESUCCESS;
 838 }
 839
 840
 841 BOOLEAN
 842 NTAPI
 843 HalSetRealTimeClock(
 844   PTIME_FIELDS Time)
 845 {
 846   UNIMPLEMENTED;
 847
 848   return TRUE;
 849 }
 850
 851
 852 ULONG
 853 NTAPI
 854 HalSetTimeIncrement(
 855   ULONG Increment)
 856 {
 857   UNIMPLEMENTED;
 858
 859   return Increment;
 860 }
 861
 862
 863 BOOLEAN
 864 NTAPI
 865 HalStartNextProcessor(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
 866                       IN PKPROCESSOR_STATE ProcessorState)
 867 {
 868   UNIMPLEMENTED;
 869
 870   return TRUE;
 871 }
 872
 873
 874 ULONG
 875 FASTCALL
 876 HalSystemVectorDispatchEntry(
 877   ULONG Unknown1,
 878   ULONG Unknown2,
 879   ULONG Unknown3)
 880 {
 881   UNIMPLEMENTED;
 882
 883   return 0;
 884 }
 885
 886
 887 BOOLEAN
 888 NTAPI
 889 HalTranslateBusAddress(
 890   INTERFACE_TYPE InterfaceType,
 891   ULONG BusNumber,
 892   PHYSICAL_ADDRESS BusAddress,
 893   PULONG AddressSpace,
 894   PPHYSICAL_ADDRESS TranslatedAddress)
 895 {
 896   UNIMPLEMENTED;
 897
 898   return TRUE;
 899 }
 900
 901
 902 VOID
 903 NTAPI
 904 HalpAssignDriveLetters(IN struct _LOADER_PARAMETER_BLOCK *LoaderBlock,
 905                        IN PSTRING NtDeviceName,
 906                        OUT PUCHAR NtSystemPath,
 907                        OUT PSTRING NtSystemPathString)
 908 {
 909     /* Call the kernel */
 910     IoAssignDriveLetters(LoaderBlock,
 911                                 NtDeviceName,
 912                                 NtSystemPath,
 913                                 NtSystemPathString);
 914 }
 915
 916 NTSTATUS
 917 NTAPI
 918 HalpReadPartitionTable(IN PDEVICE_OBJECT DeviceObject,
 919                        IN ULONG SectorSize,
 920                        IN BOOLEAN ReturnRecognizedPartitions,
 921                        IN OUT PDRIVE_LAYOUT_INFORMATION *PartitionBuffer)
 922 {
 923     /* Call the kernel */
 924     return IoReadPartitionTable(DeviceObject,
 925                                 SectorSize,
 926                                 ReturnRecognizedPartitions,
 927                                 PartitionBuffer);
 928 }
 929
 930 NTSTATUS
 931 NTAPI
 932 HalpWritePartitionTable(IN PDEVICE_OBJECT DeviceObject,
 933                         IN ULONG SectorSize,
 934                         IN ULONG SectorsPerTrack,
 935                         IN ULONG NumberOfHeads,
 936                         IN PDRIVE_LAYOUT_INFORMATION PartitionBuffer)
 937 {
 938     /* Call the kernel */
 939     return IoWritePartitionTable(DeviceObject,
 940                                  SectorSize,
 941                                  SectorsPerTrack,
 942                                  NumberOfHeads,
 943                                  PartitionBuffer);
 944 }
 945
 946 NTSTATUS
 947 NTAPI
 948 HalpSetPartitionInformation(IN PDEVICE_OBJECT DeviceObject,
 949                             IN ULONG SectorSize,
 950                             IN ULONG PartitionNumber,
 951                             IN ULONG PartitionType)
 952 {
 953     /* Call the kernel */
 954     return IoSetPartitionInformation(DeviceObject,
 955                                      SectorSize,
 956                                      PartitionNumber,
 957                                      PartitionType);
 958 }
 959
 960
 961 BOOLEAN
 962 NTAPI
 963 IoFlushAdapterBuffers(
 964   PADAPTER_OBJECT AdapterObject,
 965   PMDL Mdl,
 966   PVOID MapRegisterBase,
 967   PVOID CurrentVa,
 968   ULONG Length,
 969   BOOLEAN WriteToDevice)
 970 {
 971   UNIMPLEMENTED;
 972
 973   return TRUE;
 974 }
 975
 976
 977 VOID
 978 NTAPI
 979 IoFreeAdapterChannel(
 980   PADAPTER_OBJECT AdapterObject)
 981 {
 982   UNIMPLEMENTED;
 983 }
 984
 985
 986 VOID
 987 NTAPI
 988 IoFreeMapRegisters(
 989   PADAPTER_OBJECT AdapterObject,
 990   PVOID MapRegisterBase,
 991   ULONG NumberOfMapRegisters)
 992 {
 993   UNIMPLEMENTED;
 994 }
 995
 996
 997 PHYSICAL_ADDRESS
 998 NTAPI
 999 IoMapTransfer(
1000   PADAPTER_OBJECT AdapterObject,
1001   PMDL Mdl,
1002   PVOID MapRegisterBase,
1003   PVOID CurrentVa,
1004   PULONG Length,
1005   BOOLEAN WriteToDevice)
1006 {
1007   PHYSICAL_ADDRESS Address;
1008
1009   UNIMPLEMENTED;
1010
1011   Address.QuadPart = 0;
1012
1013   return Address;
1014 }
1015
1016 VOID
1017 NTAPI
1018 KeFlushWriteBuffer(VOID)
1019 {
1020   UNIMPLEMENTED;
1021 }
1022
1023 LARGE_INTEGER
1024 NTAPI
1025 KeQueryPerformanceCounter(
1026   PLARGE_INTEGER PerformanceFreq)
1027 {
1028   LARGE_INTEGER Value;
1029
1030   UNIMPLEMENTED;
1031
1032   Value.QuadPart = 0;
1033
1034   return Value;
1035 }
1036
1037 VOID
1038 NTAPI
1039 KeStallExecutionProcessor(IN ULONG Microseconds)
1040 {
1041     SP804_CONTROL_REGISTER ControlRegister;
1042
1043     //
1044     // Enable the timer
1045     //
1046     WRITE_REGISTER_ULONG(TIMER1_LOAD, Microseconds);
1047
1048     //
1049     // Configure the timer
1050     //
1051     ControlRegister.AsUlong = 0;
1052     ControlRegister.OneShot = TRUE;
1053     ControlRegister.Wide = TRUE;
1054     ControlRegister.Periodic = TRUE;
1055     ControlRegister.Enabled = TRUE;
1056     WRITE_REGISTER_ULONG(TIMER1_CONTROL, ControlRegister.AsUlong);
1057
1058     //
1059     // Now we will loop until the timer reached 0
1060     //
1061     while (READ_REGISTER_ULONG(TIMER1_VALUE));
1062 }
1063
1064 VOID
1065 FASTCALL
1066 KfLowerIrql(IN KIRQL NewIrql)
1067 {
1068     ULONG InterruptMask;
1069     ARM_STATUS_REGISTER Flags;
1070     PKPCR Pcr = (PKPCR)KeGetPcr();
1071
1072     //
1073     // Validate the new IRQL
1074     //
1075     Flags = KeArmStatusRegisterGet();
1076     _disable();
1077     ASSERT(NewIrql <= Pcr->CurrentIrql);
1078
1079     //
1080     // IRQLs are internally 8 bits
1081     //
1082     NewIrql &= 0xFF;
1083
1084     //
1085     // Setup the interrupt mask for this IRQL
1086     //
1087     InterruptMask = KeGetPcr()->IrqlTable[NewIrql];
1088 //    DPRINT1("[LOWER] IRQL: %d InterruptMask: %lx\n", NewIrql, InterruptMask);
1089
1090     //
1091     // Clear interrupts associated to the old IRQL
1092     //
1093     WRITE_REGISTER_ULONG(VIC_INT_CLEAR, 0xFFFFFFFF);
1094
1095     //
1096     // Set the new interrupt mask
1097     // PL190 VIC support only for now
1098     //
1099     WRITE_REGISTER_ULONG(VIC_INT_ENABLE, InterruptMask);
1100
1101     //
1102     // Save the new IRQL
1103     //
1104     Pcr->CurrentIrql = NewIrql;
1105     if (!Flags.IrqDisable) _enable();
1106 }
1107
1108 KIRQL
1109 FASTCALL
1110 KfRaiseIrql(IN KIRQL NewIrql)
1111 {
1112     KIRQL OldIrql;
1113     ULONG InterruptMask;
1114     ARM_STATUS_REGISTER Flags;
1115     PKPCR Pcr = (PKPCR)KeGetPcr();
1116
1117     //
1118     // Save the current IRQL
1119     //
1120     Flags = KeArmStatusRegisterGet();
1121     _disable();
1122     OldIrql = Pcr->CurrentIrql;
1123
1124     //
1125     // IRQLs are internally 8 bits
1126     //
1127     NewIrql &= 0xFF;
1128
1129     //
1130     // Setup the interrupt mask for this IRQL
1131     //
1132     InterruptMask = KeGetPcr()->IrqlTable[NewIrql];
1133   //  DPRINT1("[RAISE] IRQL: %d InterruptMask: %lx\n", NewIrql, InterruptMask);
1134     ASSERT(NewIrql >= OldIrql);
1135
1136     //
1137     // Clear interrupts associated to the old IRQL
1138     //
1139     WRITE_REGISTER_ULONG(VIC_INT_CLEAR, 0xFFFFFFFF);
1140
1141     //
1142     // Set the new interrupt mask
1143     // PL190 VIC support only for now
1144     //
1145     WRITE_REGISTER_ULONG(VIC_INT_ENABLE, InterruptMask);
1146
1147     //
1148     // Save the new IRQL
1149     //
1150     Pcr->CurrentIrql = NewIrql;
1151     if (!Flags.IrqDisable) _enable();
1152     return OldIrql;
1153 }
1154
1155 VOID
1156 NTAPI
1157 READ_PORT_BUFFER_UCHAR(
1158   PUCHAR Port,
1159   PUCHAR Buffer,
1160   ULONG Count)
1161 {
1162   UNIMPLEMENTED;
1163 }
1164
1165
1166 VOID
1167 NTAPI
1168 READ_PORT_BUFFER_ULONG(
1169   PULONG Port,
1170   PULONG Buffer,
1171   ULONG Count)
1172 {
1173   UNIMPLEMENTED;
1174 }
1175
1176
1177 VOID
1178 NTAPI
1179 READ_PORT_BUFFER_USHORT(
1180   PUSHORT Port,
1181   PUSHORT Buffer,
1182   ULONG Count)
1183 {
1184   UNIMPLEMENTED;
1185 }
1186
1187
1188 UCHAR
1189 NTAPI
1190 READ_PORT_UCHAR(
1191   PUCHAR Port)
1192 {
1193   UNIMPLEMENTED;
1194
1195   return 0;
1196 }
1197
1198
1199 ULONG
1200 NTAPI
1201 READ_PORT_ULONG(
1202   PULONG Port)
1203 {
1204   UNIMPLEMENTED;
1205
1206   return 0;
1207 }
1208
1209
1210 USHORT
1211 NTAPI
1212 READ_PORT_USHORT(
1213   PUSHORT Port)
1214 {
1215   UNIMPLEMENTED;
1216
1217   return 0;
1218 }
1219
1220
1221 VOID
1222 NTAPI
1223 WRITE_PORT_BUFFER_UCHAR(
1224   PUCHAR Port,
1225   PUCHAR Buffer,
1226   ULONG Count)
1227 {
1228   UNIMPLEMENTED;
1229 }
1230
1231
1232 VOID
1233 NTAPI
1234 WRITE_PORT_BUFFER_USHORT(
1235   PUSHORT Port,
1236   PUSHORT Buffer,
1237   ULONG Count)
1238 {
1239   UNIMPLEMENTED;
1240 }
1241
1242
1243 VOID
1244 NTAPI
1245 WRITE_PORT_BUFFER_ULONG(
1246   PULONG Port,
1247   PULONG Buffer,
1248   ULONG Count)
1249 {
1250   UNIMPLEMENTED;
1251 }
1252
1253
1254 VOID
1255 NTAPI
1256 WRITE_PORT_UCHAR(
1257   PUCHAR Port,
1258   UCHAR Value)
1259 {
1260   UNIMPLEMENTED;
1261 }
1262
1263 VOID
1264 NTAPI
1265 WRITE_PORT_ULONG(
1266   PULONG Port,
1267   ULONG Value)
1268 {
1269   UNIMPLEMENTED;
1270 }
1271
1272 VOID
1273 NTAPI
1274 WRITE_PORT_USHORT(
1275   PUSHORT Port,
1276   USHORT Value)
1277 {
1278   UNIMPLEMENTED;
1279 }
1280
1281 KIRQL
1282 KeRaiseIrqlToDpcLevel(VOID)
1283 {
1284     //
1285     // Call the generic routine
1286     //
1287     return KfRaiseIrql(DISPATCH_LEVEL);
1288 }
1289
1290 KIRQL
1291 KeRaiseIrqlToSynchLevel(VOID)
1292 {
1293     //
1294     // Call the generic routine
1295     //
1296     return KfRaiseIrql(DISPATCH_LEVEL);
1297 }
1298
1299 BOOLEAN HalpProcessorIdentified;
1300 BOOLEAN HalpTestCleanSupported;
1301
1302 VOID
1303 HalpIdentifyProcessor(VOID)
1304 {
1305     ARM_ID_CODE_REGISTER IdRegister;
1306
1307     //
1308     // Don't do it again
1309     //
1310     HalpProcessorIdentified = TRUE;
1311
1312     //
1313     // Read the ID Code
1314     //
1315     IdRegister = KeArmIdCodeRegisterGet();
1316
1317     //
1318     // Architecture "6" CPUs support test-and-clean (926EJ-S and 1026EJ-S)
1319     //
1320     HalpTestCleanSupported = (IdRegister.Architecture == 6);
1321 }
1322
1323 VOID
1324 HalSweepDcache(VOID)
1325 {
1326     //
1327     // We get called very early on, before HalInitSystem or any of the Hal*
1328     // processor routines, so we need to figure out what CPU we're on.
1329     //
1330     if (!HalpProcessorIdentified) HalpIdentifyProcessor();
1331
1332     //
1333     // Check if we can do it the ARMv5TE-J way
1334     //
1335     if (HalpTestCleanSupported)
1336     {
1337         //
1338         // Test, clean, flush D-Cache
1339         //
1340         __asm__ __volatile__ ("1: mrc p15, 0, pc, c7, c14, 3; bne 1b");
1341     }
1342     else
1343     {
1344         //
1345         // We need to do it it by set/way
1346         //
1347         UNIMPLEMENTED;
1348     }
1349 }
1350
1351 VOID
1352 HalSweepIcache(VOID)
1353 {
1354     //
1355     // All ARM cores support the same Icache flush command, no need for HAL work
1356     //
1357     KeArmFlushIcache();
1358 }
1359
1360 /*
1361  * @implemented
1362  */
1363 #undef KeGetCurrentIrql
1364 KIRQL
1365 NTAPI
1366 KeGetCurrentIrql(VOID)
1367 {
1368     /* Return IRQL */
1369     return PCR->CurrentIrql;
1370 }
1371
1372 /*
1373  * @implemented
1374  */
1375 VOID
1376 NTAPI
1377 KeLowerIrql(KIRQL NewIrql)
1378 {
1379     /* Call the fastcall function */
1380     KfLowerIrql(NewIrql);
1381 }
1382
1383 /*
1384  * @implemented
1385  */
1386 VOID
1387 NTAPI
1388 KeRaiseIrql(KIRQL NewIrql,
1389             PKIRQL OldIrql)
1390 {
1391     /* Call the fastcall function */
1392     *OldIrql = KfRaiseIrql(NewIrql);
1393 }
1394
1395 /*
1396  * @implemented
1397  */
1398 VOID
1399 NTAPI
1400 KeAcquireSpinLock(PKSPIN_LOCK SpinLock,
1401                   PKIRQL OldIrql)
1402 {
1403     /* Call the fastcall function */
1404     *OldIrql = KfAcquireSpinLock(SpinLock);
1405 }
1406
1407 /*
1408  * @implemented
1409  */
1410 KIRQL
1411 FASTCALL
1412 KeAcquireSpinLockRaiseToSynch(PKSPIN_LOCK SpinLock)
1413 {
1414     /* Simply raise to dispatch */
1415     return KfRaiseIrql(DISPATCH_LEVEL);
1416 }
1417
1418 /*
1419  * @implemented
1420  */
1421 VOID
1422 NTAPI
1423 KeReleaseSpinLock(PKSPIN_LOCK SpinLock,
1424                   KIRQL NewIrql)
1425 {
1426     /* Call the fastcall function */
1427     KfReleaseSpinLock(SpinLock, NewIrql);
1428 }
1429
1430 /*
1431  * @implemented
1432  */
1433 KIRQL
1434 FASTCALL
1435 KfAcquireSpinLock(PKSPIN_LOCK SpinLock)
1436 {
1437     /* Simply raise to dispatch */
1438     return KfRaiseIrql(DISPATCH_LEVEL);
1439 }
1440
1441 /*
1442  * @implemented
1443  */
1444 VOID
1445 FASTCALL
1446 KfReleaseSpinLock(PKSPIN_LOCK SpinLock,
1447                   KIRQL OldIrql)
1448 {
1449     /* Simply lower IRQL back */
1450     KfLowerIrql(OldIrql);
1451 }
1452
1453 /*
1454  * @implemented
1455  */
1456 KIRQL
1457 FASTCALL
1458 KeAcquireQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber)
1459 {
1460     /* Simply raise to dispatch */
1461     return KfRaiseIrql(DISPATCH_LEVEL);
1462 }
1463
1464 /*
1465  * @implemented
1466  */
1467 KIRQL
1468 FASTCALL
1469 KeAcquireQueuedSpinLockRaiseToSynch(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber)
1470 {
1471     /* Simply raise to dispatch */
1472     return KfRaiseIrql(DISPATCH_LEVEL);
1473 }
1474
1475 /*
1476  * @implemented
1477  */
1478 VOID
1479 FASTCALL
1480 KeAcquireInStackQueuedSpinLock(IN PKSPIN_LOCK SpinLock,
1481                                IN PKLOCK_QUEUE_HANDLE LockHandle)
1482 {
1483     /* Simply raise to dispatch */
1484     LockHandle->OldIrql = KfRaiseIrql(DISPATCH_LEVEL);
1485 }
1486
1487 /*
1488  * @implemented
1489  */
1490 VOID
1491 FASTCALL
1492 KeAcquireInStackQueuedSpinLockRaiseToSynch(IN PKSPIN_LOCK SpinLock,
1493                                            IN PKLOCK_QUEUE_HANDLE LockHandle)
1494 {
1495     /* Simply raise to synch */
1496     LockHandle->OldIrql = KfRaiseIrql(DISPATCH_LEVEL);
1497 }
1498
1499 /*
1500  * @implemented
1501  */
1502 VOID
1503 FASTCALL
1504 KeReleaseQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber,
1505                         IN KIRQL OldIrql)
1506 {
1507     /* Simply lower IRQL back */
1508     KfLowerIrql(OldIrql);
1509 }
1510
1511 /*
1512  * @implemented
1513  */
1514 VOID
1515 FASTCALL
1516 KeReleaseInStackQueuedSpinLock(IN PKLOCK_QUEUE_HANDLE LockHandle)
1517 {
1518     /* Simply lower IRQL back */
1519     KfLowerIrql(LockHandle->OldIrql);
1520 }
1521
1522 /*
1523  * @implemented
1524  */
1525 BOOLEAN
1526 FASTCALL
1527 KeTryToAcquireQueuedSpinLockRaiseToSynch(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber,
1528                                          IN PKIRQL OldIrql)
1529 {
1530     /* Simply raise to dispatch */
1531     *OldIrql = KfRaiseIrql(DISPATCH_LEVEL);
1532
1533     /* Always return true on UP Machines */
1534     return TRUE;
1535 }
1536
1537 /*
1538  * @implemented
1539  */
1540 LOGICAL
1541 FASTCALL
1542 KeTryToAcquireQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber,
1543                              OUT PKIRQL OldIrql)
1544 {
1545     /* Simply raise to dispatch */
1546     *OldIrql = KfRaiseIrql(DISPATCH_LEVEL);
1547
1548     /* Always return true on UP Machines */
1549     return TRUE;
1550 }
1551
1552 /* EOF */