2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: ntoskrnl/mm/ARM3/mminit.c
5 * PURPOSE: ARM Memory Manager Initialization
6 * PROGRAMMERS: ReactOS Portable Systems Group
9 /* INCLUDES *******************************************************************/
15 #define MODULE_INVOLVED_IN_ARM3
17 #undef MmSystemRangeStart
19 /* GLOBALS ********************************************************************/
22 // These are all registry-configurable, but by default, the memory manager will
23 // figure out the most appropriate values.
25 ULONG MmMaximumNonPagedPoolPercent
;
26 SIZE_T MmSizeOfNonPagedPoolInBytes
;
27 SIZE_T MmMaximumNonPagedPoolInBytes
;
29 /* Some of the same values, in pages */
30 PFN_NUMBER MmMaximumNonPagedPoolInPages
;
33 // These numbers describe the discrete equation components of the nonpaged
34 // pool sizing algorithm.
36 // They are described on http://support.microsoft.com/default.aspx/kb/126402/ja
37 // along with the algorithm that uses them, which is implemented later below.
39 SIZE_T MmMinimumNonPagedPoolSize
= 256 * 1024;
40 ULONG MmMinAdditionNonPagedPoolPerMb
= 32 * 1024;
41 SIZE_T MmDefaultMaximumNonPagedPool
= 1024 * 1024;
42 ULONG MmMaxAdditionNonPagedPoolPerMb
= 400 * 1024;
45 // The memory layout (and especially variable names) of the NT kernel mode
46 // components can be a bit hard to twig, especially when it comes to the non
49 // There are really two components to the non-paged pool:
51 // - The initial nonpaged pool, sized dynamically up to a maximum.
52 // - The expansion nonpaged pool, sized dynamically up to a maximum.
54 // The initial nonpaged pool is physically continuous for performance, and
55 // immediately follows the PFN database, typically sharing the same PDE. It is
56 // a very small resource (32MB on a 1GB system), and capped at 128MB.
58 // Right now we call this the "ARM³ Nonpaged Pool" and it begins somewhere after
59 // the PFN database (which starts at 0xB0000000).
61 // The expansion nonpaged pool, on the other hand, can grow much bigger (400MB
62 // for a 1GB system). On ARM³ however, it is currently capped at 128MB.
64 // The address where the initial nonpaged pool starts is aptly named
65 // MmNonPagedPoolStart, and it describes a range of MmSizeOfNonPagedPoolInBytes
68 // Expansion nonpaged pool starts at an address described by the variable called
69 // MmNonPagedPoolExpansionStart, and it goes on for MmMaximumNonPagedPoolInBytes
70 // minus MmSizeOfNonPagedPoolInBytes bytes, always reaching MmNonPagedPoolEnd
71 // (because of the way it's calculated) at 0xFFBE0000.
73 // Initial nonpaged pool is allocated and mapped early-on during boot, but what
74 // about the expansion nonpaged pool? It is instead composed of special pages
75 // which belong to what are called System PTEs. These PTEs are the matter of a
76 // later discussion, but they are also considered part of the "nonpaged" OS, due
77 // to the fact that they are never paged out -- once an address is described by
78 // a System PTE, it is always valid, until the System PTE is torn down.
80 // System PTEs are actually composed of two "spaces", the system space proper,
81 // and the nonpaged pool expansion space. The latter, as we've already seen,
82 // begins at MmNonPagedPoolExpansionStart. Based on the number of System PTEs
83 // that the system will support, the remaining address space below this address
84 // is used to hold the system space PTEs. This address, in turn, is held in the
85 // variable named MmNonPagedSystemStart, which itself is never allowed to go
86 // below 0xEB000000 (thus creating an upper bound on the number of System PTEs).
88 // This means that 330MB are reserved for total nonpaged system VA, on top of
89 // whatever the initial nonpaged pool allocation is.
91 // The following URLs, valid as of April 23rd, 2008, support this evidence:
93 // http://www.cs.miami.edu/~burt/journal/NT/memory.html
94 // http://www.ditii.com/2007/09/28/windows-memory-management-x86-virtual-address-space/
96 PVOID MmNonPagedSystemStart
;
97 SIZE_T MiNonPagedSystemSize
;
98 PVOID MmNonPagedPoolStart
;
99 PVOID MmNonPagedPoolExpansionStart
;
100 PVOID MmNonPagedPoolEnd
= MI_NONPAGED_POOL_END
;
103 // This is where paged pool starts by default
105 PVOID MmPagedPoolStart
= MI_PAGED_POOL_START
;
106 PVOID MmPagedPoolEnd
;
109 // And this is its default size
111 SIZE_T MmSizeOfPagedPoolInBytes
= MI_MIN_INIT_PAGED_POOLSIZE
;
112 PFN_NUMBER MmSizeOfPagedPoolInPages
= MI_MIN_INIT_PAGED_POOLSIZE
/ PAGE_SIZE
;
115 // Session space starts at 0xBFFFFFFF and grows downwards
116 // By default, it includes an 8MB image area where we map win32k and video card
117 // drivers, followed by a 4MB area containing the session's working set. This is
118 // then followed by a 20MB mapped view area and finally by the session's paged
119 // pool, by default 16MB.
121 // On a normal system, this results in session space occupying the region from
122 // 0xBD000000 to 0xC0000000
124 // See miarm.h for the defines that determine the sizing of this region. On an
125 // NT system, some of these can be configured through the registry, but we don't
128 PVOID MiSessionSpaceEnd
; // 0xC0000000
129 PVOID MiSessionImageEnd
; // 0xC0000000
130 PVOID MiSessionImageStart
; // 0xBF800000
131 PVOID MiSessionSpaceWs
;
132 PVOID MiSessionViewStart
; // 0xBE000000
133 PVOID MiSessionPoolEnd
; // 0xBE000000
134 PVOID MiSessionPoolStart
; // 0xBD000000
135 PVOID MmSessionBase
; // 0xBD000000
136 SIZE_T MmSessionSize
;
137 SIZE_T MmSessionViewSize
;
138 SIZE_T MmSessionPoolSize
;
139 SIZE_T MmSessionImageSize
;
142 * These are the PTE addresses of the boundaries carved out above
144 PMMPTE MiSessionImagePteStart
;
145 PMMPTE MiSessionImagePteEnd
;
146 PMMPTE MiSessionBasePte
;
147 PMMPTE MiSessionLastPte
;
150 // The system view space, on the other hand, is where sections that are memory
151 // mapped into "system space" end up.
153 // By default, it is a 16MB region, but we hack it to be 32MB for ReactOS
155 PVOID MiSystemViewStart
;
156 SIZE_T MmSystemViewSize
;
158 #if (_MI_PAGING_LEVELS == 2)
160 // A copy of the system page directory (the page directory associated with the
161 // System process) is kept (double-mapped) by the manager in order to lazily
162 // map paged pool PDEs into external processes when they fault on a paged pool
165 PFN_NUMBER MmSystemPageDirectory
[PD_COUNT
];
166 PMMPDE MmSystemPagePtes
;
170 // The system cache starts right after hyperspace. The first few pages are for
171 // keeping track of the system working set list.
173 // This should be 0xC0C00000 -- the cache itself starts at 0xC1000000
175 PMMWSL MmSystemCacheWorkingSetList
= (PVOID
)MI_SYSTEM_CACHE_WS_START
;
178 // Windows NT seems to choose between 7000, 11000 and 50000
179 // On systems with more than 32MB, this number is then doubled, and further
180 // aligned up to a PDE boundary (4MB).
182 PFN_COUNT MmNumberOfSystemPtes
;
185 // This is how many pages the PFN database will take up
186 // In Windows, this includes the Quark Color Table, but not in ARM³
188 PFN_NUMBER MxPfnAllocation
;
191 // Unlike the old ReactOS Memory Manager, ARM³ (and Windows) does not keep track
192 // of pages that are not actually valid physical memory, such as ACPI reserved
193 // regions, BIOS address ranges, or holes in physical memory address space which
194 // could indicate device-mapped I/O memory.
196 // In fact, the lack of a PFN entry for a page usually indicates that this is
197 // I/O space instead.
199 // A bitmap, called the PFN bitmap, keeps track of all page frames by assigning
200 // a bit to each. If the bit is set, then the page is valid physical RAM.
202 RTL_BITMAP MiPfnBitMap
;
205 // This structure describes the different pieces of RAM-backed address space
207 PPHYSICAL_MEMORY_DESCRIPTOR MmPhysicalMemoryBlock
;
210 // This is where we keep track of the most basic physical layout markers
212 PFN_NUMBER MmHighestPhysicalPage
, MmLowestPhysicalPage
= -1;
213 PFN_COUNT MmNumberOfPhysicalPages
;
216 // The total number of pages mapped by the boot loader, which include the kernel
217 // HAL, boot drivers, registry, NLS files and other loader data structures is
218 // kept track of here. This depends on "LoaderPagesSpanned" being correct when
219 // coming from the loader.
221 // This number is later aligned up to a PDE boundary.
223 SIZE_T MmBootImageSize
;
226 // These three variables keep track of the core separation of address space that
227 // exists between kernel mode and user mode.
229 ULONG_PTR MmUserProbeAddress
;
230 PVOID MmHighestUserAddress
;
231 PVOID MmSystemRangeStart
;
233 /* And these store the respective highest PTE/PDE address */
234 PMMPTE MiHighestUserPte
;
235 PMMPDE MiHighestUserPde
;
236 #if (_MI_PAGING_LEVELS >= 3)
237 PMMPTE MiHighestUserPpe
;
238 #if (_MI_PAGING_LEVELS >= 4)
239 PMMPTE MiHighestUserPxe
;
243 /* These variables define the system cache address space */
244 PVOID MmSystemCacheStart
;
245 PVOID MmSystemCacheEnd
;
246 MMSUPPORT MmSystemCacheWs
;
249 // This is where hyperspace ends (followed by the system cache working set)
251 PVOID MmHyperSpaceEnd
;
254 // Page coloring algorithm data
256 ULONG MmSecondaryColors
;
257 ULONG MmSecondaryColorMask
;
260 // Actual (registry-configurable) size of a GUI thread's stack
262 ULONG MmLargeStackSize
= KERNEL_LARGE_STACK_SIZE
;
265 // Before we have a PFN database, memory comes straight from our physical memory
266 // blocks, which is nice because it's guaranteed contiguous and also because once
267 // we take a page from here, the system doesn't see it anymore.
268 // However, once the fun is over, those pages must be re-integrated back into
269 // PFN society life, and that requires us keeping a copy of the original layout
270 // so that we can parse it later.
272 PMEMORY_ALLOCATION_DESCRIPTOR MxFreeDescriptor
;
273 MEMORY_ALLOCATION_DESCRIPTOR MxOldFreeDescriptor
;
276 * For each page's worth bytes of L2 cache in a given set/way line, the zero and
277 * free lists are organized in what is called a "color".
279 * This array points to the two lists, so it can be thought of as a multi-dimensional
280 * array of MmFreePagesByColor[2][MmSecondaryColors]. Since the number is dynamic,
281 * we describe the array in pointer form instead.
283 * On a final note, the color tables themselves are right after the PFN database.
285 C_ASSERT(FreePageList
== 1);
286 PMMCOLOR_TABLES MmFreePagesByColor
[FreePageList
+ 1];
288 /* An event used in Phase 0 before the rest of the system is ready to go */
291 /* All the events used for memory threshold notifications */
292 PKEVENT MiLowMemoryEvent
;
293 PKEVENT MiHighMemoryEvent
;
294 PKEVENT MiLowPagedPoolEvent
;
295 PKEVENT MiHighPagedPoolEvent
;
296 PKEVENT MiLowNonPagedPoolEvent
;
297 PKEVENT MiHighNonPagedPoolEvent
;
299 /* The actual thresholds themselves, in page numbers */
300 PFN_NUMBER MmLowMemoryThreshold
;
301 PFN_NUMBER MmHighMemoryThreshold
;
302 PFN_NUMBER MiLowPagedPoolThreshold
;
303 PFN_NUMBER MiHighPagedPoolThreshold
;
304 PFN_NUMBER MiLowNonPagedPoolThreshold
;
305 PFN_NUMBER MiHighNonPagedPoolThreshold
;
308 * This number determines how many free pages must exist, at minimum, until we
309 * start trimming working sets and flushing modified pages to obtain more free
312 * This number changes if the system detects that this is a server product
314 PFN_NUMBER MmMinimumFreePages
= 26;
317 * This number indicates how many pages we consider to be a low limit of having
318 * "plenty" of free memory.
320 * It is doubled on systems that have more than 63MB of memory
322 PFN_NUMBER MmPlentyFreePages
= 400;
324 /* These values store the type of system this is (small, med, large) and if server */
326 MM_SYSTEMSIZE MmSystemSize
;
329 * These values store the cache working set minimums and maximums, in pages
331 * The minimum value is boosted on systems with more than 24MB of RAM, and cut
332 * down to only 32 pages on embedded (<24MB RAM) systems.
334 * An extra boost of 2MB is given on systems with more than 33MB of RAM.
336 PFN_NUMBER MmSystemCacheWsMinimum
= 288;
337 PFN_NUMBER MmSystemCacheWsMaximum
= 350;
339 /* FIXME: Move to cache/working set code later */
340 BOOLEAN MmLargeSystemCache
;
343 * This value determines in how many fragments/chunks the subsection prototype
344 * PTEs should be allocated when mapping a section object. It is configurable in
345 * the registry through the MapAllocationFragment parameter.
347 * The default is 64KB on systems with more than 1GB of RAM, 32KB on systems with
348 * more than 256MB of RAM, and 16KB on systems with less than 256MB of RAM.
350 * The maximum it can be set to is 2MB, and the minimum is 4KB.
352 SIZE_T MmAllocationFragment
;
355 * These two values track how much virtual memory can be committed, and when
356 * expansion should happen.
358 // FIXME: They should be moved elsewhere since it's not an "init" setting?
359 SIZE_T MmTotalCommitLimit
;
360 SIZE_T MmTotalCommitLimitMaximum
;
362 /* Internal setting used for debugging memory descriptors */
363 BOOLEAN MiDbgEnableMdDump
=
370 /* Number of memory descriptors in the loader block */
371 ULONG MiNumberDescriptors
= 0;
373 /* Number of free pages in the loader block */
374 PFN_NUMBER MiNumberOfFreePages
= 0;
376 /* Timeout value for critical sections (2.5 minutes) */
377 ULONG MmCritsectTimeoutSeconds
= 150; // NT value: 720 * 60 * 60; (30 days)
378 LARGE_INTEGER MmCriticalSectionTimeout
;
380 /* PRIVATE FUNCTIONS **********************************************************/
384 MiScanMemoryDescriptors(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
386 PLIST_ENTRY ListEntry
;
387 PMEMORY_ALLOCATION_DESCRIPTOR Descriptor
;
388 PFN_NUMBER PageFrameIndex
, FreePages
= 0;
390 /* Loop the memory descriptors */
391 for (ListEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
392 ListEntry
!= &LoaderBlock
->MemoryDescriptorListHead
;
393 ListEntry
= ListEntry
->Flink
)
395 /* Get the descriptor */
396 Descriptor
= CONTAINING_RECORD(ListEntry
,
397 MEMORY_ALLOCATION_DESCRIPTOR
,
399 DPRINT("MD Type: %lx Base: %lx Count: %lx\n",
400 Descriptor
->MemoryType
, Descriptor
->BasePage
, Descriptor
->PageCount
);
402 /* Count this descriptor */
403 MiNumberDescriptors
++;
405 /* Check if this is invisible memory */
406 if ((Descriptor
->MemoryType
== LoaderFirmwarePermanent
) ||
407 (Descriptor
->MemoryType
== LoaderSpecialMemory
) ||
408 (Descriptor
->MemoryType
== LoaderHALCachedMemory
) ||
409 (Descriptor
->MemoryType
== LoaderBBTMemory
))
411 /* Skip this descriptor */
415 /* Check if this is bad memory */
416 if (Descriptor
->MemoryType
!= LoaderBad
)
418 /* Count this in the total of pages */
419 MmNumberOfPhysicalPages
+= (PFN_COUNT
)Descriptor
->PageCount
;
422 /* Check if this is the new lowest page */
423 if (Descriptor
->BasePage
< MmLowestPhysicalPage
)
425 /* Update the lowest page */
426 MmLowestPhysicalPage
= Descriptor
->BasePage
;
429 /* Check if this is the new highest page */
430 PageFrameIndex
= Descriptor
->BasePage
+ Descriptor
->PageCount
;
431 if (PageFrameIndex
> MmHighestPhysicalPage
)
433 /* Update the highest page */
434 MmHighestPhysicalPage
= PageFrameIndex
- 1;
437 /* Check if this is free memory */
438 if ((Descriptor
->MemoryType
== LoaderFree
) ||
439 (Descriptor
->MemoryType
== LoaderLoadedProgram
) ||
440 (Descriptor
->MemoryType
== LoaderFirmwareTemporary
) ||
441 (Descriptor
->MemoryType
== LoaderOsloaderStack
))
443 /* Count it too free pages */
444 MiNumberOfFreePages
+= Descriptor
->PageCount
;
446 /* Check if this is the largest memory descriptor */
447 if (Descriptor
->PageCount
> FreePages
)
450 MxFreeDescriptor
= Descriptor
;
451 FreePages
= Descriptor
->PageCount
;
456 /* Save original values of the free descriptor, since it'll be
457 * altered by early allocations */
458 MxOldFreeDescriptor
= *MxFreeDescriptor
;
464 MxGetNextPage(IN PFN_NUMBER PageCount
)
468 /* Make sure we have enough pages */
469 if (PageCount
> MxFreeDescriptor
->PageCount
)
471 /* Crash the system */
472 KeBugCheckEx(INSTALL_MORE_MEMORY
,
473 MmNumberOfPhysicalPages
,
474 MxFreeDescriptor
->PageCount
,
475 MxOldFreeDescriptor
.PageCount
,
479 /* Use our lowest usable free pages */
480 Pfn
= MxFreeDescriptor
->BasePage
;
481 MxFreeDescriptor
->BasePage
+= PageCount
;
482 MxFreeDescriptor
->PageCount
-= PageCount
;
489 MiComputeColorInformation(VOID
)
491 ULONG L2Associativity
;
493 /* Check if no setting was provided already */
494 if (!MmSecondaryColors
)
496 /* Get L2 cache information */
497 L2Associativity
= KeGetPcr()->SecondLevelCacheAssociativity
;
499 /* The number of colors is the number of cache bytes by set/way */
500 MmSecondaryColors
= KeGetPcr()->SecondLevelCacheSize
;
501 if (L2Associativity
) MmSecondaryColors
/= L2Associativity
;
504 /* Now convert cache bytes into pages */
505 MmSecondaryColors
>>= PAGE_SHIFT
;
506 if (!MmSecondaryColors
)
508 /* If there was no cache data from the KPCR, use the default colors */
509 MmSecondaryColors
= MI_SECONDARY_COLORS
;
513 /* Otherwise, make sure there aren't too many colors */
514 if (MmSecondaryColors
> MI_MAX_SECONDARY_COLORS
)
516 /* Set the maximum */
517 MmSecondaryColors
= MI_MAX_SECONDARY_COLORS
;
520 /* Make sure there aren't too little colors */
521 if (MmSecondaryColors
< MI_MIN_SECONDARY_COLORS
)
523 /* Set the default */
524 MmSecondaryColors
= MI_SECONDARY_COLORS
;
527 /* Finally make sure the colors are a power of two */
528 if (MmSecondaryColors
& (MmSecondaryColors
- 1))
530 /* Set the default */
531 MmSecondaryColors
= MI_SECONDARY_COLORS
;
535 /* Compute the mask and store it */
536 MmSecondaryColorMask
= MmSecondaryColors
- 1;
537 KeGetCurrentPrcb()->SecondaryColorMask
= MmSecondaryColorMask
;
543 MiInitializeColorTables(VOID
)
546 PMMPTE PointerPte
, LastPte
;
547 MMPTE TempPte
= ValidKernelPte
;
549 /* The color table starts after the ARM3 PFN database */
550 MmFreePagesByColor
[0] = (PMMCOLOR_TABLES
)&MmPfnDatabase
[MmHighestPhysicalPage
+ 1];
552 /* Loop the PTEs. We have two color tables for each secondary color */
553 PointerPte
= MiAddressToPte(&MmFreePagesByColor
[0][0]);
554 LastPte
= MiAddressToPte((ULONG_PTR
)MmFreePagesByColor
[0] +
555 (2 * MmSecondaryColors
* sizeof(MMCOLOR_TABLES
))
557 while (PointerPte
<= LastPte
)
559 /* Check for valid PTE */
560 if (PointerPte
->u
.Hard
.Valid
== 0)
562 /* Get a page and map it */
563 TempPte
.u
.Hard
.PageFrameNumber
= MxGetNextPage(1);
564 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
566 /* Zero out the page */
567 RtlZeroMemory(MiPteToAddress(PointerPte
), PAGE_SIZE
);
574 /* Now set the address of the next list, right after this one */
575 MmFreePagesByColor
[1] = &MmFreePagesByColor
[0][MmSecondaryColors
];
577 /* Now loop the lists to set them up */
578 for (i
= 0; i
< MmSecondaryColors
; i
++)
580 /* Set both free and zero lists for each color */
581 MmFreePagesByColor
[ZeroedPageList
][i
].Flink
= LIST_HEAD
;
582 MmFreePagesByColor
[ZeroedPageList
][i
].Blink
= (PVOID
)LIST_HEAD
;
583 MmFreePagesByColor
[ZeroedPageList
][i
].Count
= 0;
584 MmFreePagesByColor
[FreePageList
][i
].Flink
= LIST_HEAD
;
585 MmFreePagesByColor
[FreePageList
][i
].Blink
= (PVOID
)LIST_HEAD
;
586 MmFreePagesByColor
[FreePageList
][i
].Count
= 0;
594 MiIsRegularMemory(IN PLOADER_PARAMETER_BLOCK LoaderBlock
,
597 PLIST_ENTRY NextEntry
;
598 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
600 /* Loop the memory descriptors */
601 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
602 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
604 /* Get the memory descriptor */
605 MdBlock
= CONTAINING_RECORD(NextEntry
,
606 MEMORY_ALLOCATION_DESCRIPTOR
,
609 /* Check if this PFN could be part of the block */
610 if (Pfn
>= (MdBlock
->BasePage
))
612 /* Check if it really is part of the block */
613 if (Pfn
< (MdBlock
->BasePage
+ MdBlock
->PageCount
))
615 /* Check if the block is actually memory we don't map */
616 if ((MdBlock
->MemoryType
== LoaderFirmwarePermanent
) ||
617 (MdBlock
->MemoryType
== LoaderBBTMemory
) ||
618 (MdBlock
->MemoryType
== LoaderSpecialMemory
))
620 /* We don't need PFN database entries for this memory */
624 /* This is memory we want to map */
630 /* Blocks are ordered, so if it's not here, it doesn't exist */
634 /* Get to the next descriptor */
635 NextEntry
= MdBlock
->ListEntry
.Flink
;
638 /* Check if this PFN is actually from our free memory descriptor */
639 if ((Pfn
>= MxOldFreeDescriptor
.BasePage
) &&
640 (Pfn
< MxOldFreeDescriptor
.BasePage
+ MxOldFreeDescriptor
.PageCount
))
642 /* We use these pages for initial mappings, so we do want to count them */
646 /* Otherwise this isn't memory that we describe or care about */
653 MiMapPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
655 PFN_NUMBER FreePage
, FreePageCount
, PagesLeft
, BasePage
, PageCount
;
656 PLIST_ENTRY NextEntry
;
657 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
658 PMMPTE PointerPte
, LastPte
;
659 MMPTE TempPte
= ValidKernelPte
;
661 /* Get current page data, since we won't be using MxGetNextPage as it would corrupt our state */
662 FreePage
= MxFreeDescriptor
->BasePage
;
663 FreePageCount
= MxFreeDescriptor
->PageCount
;
666 /* Loop the memory descriptors */
667 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
668 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
670 /* Get the descriptor */
671 MdBlock
= CONTAINING_RECORD(NextEntry
,
672 MEMORY_ALLOCATION_DESCRIPTOR
,
674 if ((MdBlock
->MemoryType
== LoaderFirmwarePermanent
) ||
675 (MdBlock
->MemoryType
== LoaderBBTMemory
) ||
676 (MdBlock
->MemoryType
== LoaderSpecialMemory
))
678 /* These pages are not part of the PFN database */
679 NextEntry
= MdBlock
->ListEntry
.Flink
;
683 /* Next, check if this is our special free descriptor we've found */
684 if (MdBlock
== MxFreeDescriptor
)
686 /* Use the real numbers instead */
687 BasePage
= MxOldFreeDescriptor
.BasePage
;
688 PageCount
= MxOldFreeDescriptor
.PageCount
;
692 /* Use the descriptor's numbers */
693 BasePage
= MdBlock
->BasePage
;
694 PageCount
= MdBlock
->PageCount
;
697 /* Get the PTEs for this range */
698 PointerPte
= MiAddressToPte(&MmPfnDatabase
[BasePage
]);
699 LastPte
= MiAddressToPte(((ULONG_PTR
)&MmPfnDatabase
[BasePage
+ PageCount
]) - 1);
700 DPRINT("MD Type: %lx Base: %lx Count: %lx\n", MdBlock
->MemoryType
, BasePage
, PageCount
);
703 while (PointerPte
<= LastPte
)
705 /* We'll only touch PTEs that aren't already valid */
706 if (PointerPte
->u
.Hard
.Valid
== 0)
708 /* Use the next free page */
709 TempPte
.u
.Hard
.PageFrameNumber
= FreePage
;
710 ASSERT(FreePageCount
!= 0);
712 /* Consume free pages */
718 KeBugCheckEx(INSTALL_MORE_MEMORY
,
719 MmNumberOfPhysicalPages
,
721 MxOldFreeDescriptor
.PageCount
,
725 /* Write out this PTE */
727 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
730 RtlZeroMemory(MiPteToAddress(PointerPte
), PAGE_SIZE
);
737 /* Do the next address range */
738 NextEntry
= MdBlock
->ListEntry
.Flink
;
741 /* Now update the free descriptors to consume the pages we used up during the PFN allocation loop */
742 MxFreeDescriptor
->BasePage
= FreePage
;
743 MxFreeDescriptor
->PageCount
= FreePageCount
;
749 MiBuildPfnDatabaseFromPages(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
754 PFN_NUMBER PageFrameIndex
, StartupPdIndex
, PtePageIndex
;
756 ULONG_PTR BaseAddress
= 0;
758 /* PFN of the startup page directory */
759 StartupPdIndex
= PFN_FROM_PTE(MiAddressToPde(PDE_BASE
));
761 /* Start with the first PDE and scan them all */
762 PointerPde
= MiAddressToPde(NULL
);
763 Count
= PD_COUNT
* PDE_COUNT
;
764 for (i
= 0; i
< Count
; i
++)
766 /* Check for valid PDE */
767 if (PointerPde
->u
.Hard
.Valid
== 1)
769 /* Get the PFN from it */
770 PageFrameIndex
= PFN_FROM_PTE(PointerPde
);
772 /* Do we want a PFN entry for this page? */
773 if (MiIsRegularMemory(LoaderBlock
, PageFrameIndex
))
775 /* Yes we do, set it up */
776 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
777 Pfn1
->u4
.PteFrame
= StartupPdIndex
;
778 Pfn1
->PteAddress
= (PMMPTE
)PointerPde
;
779 Pfn1
->u2
.ShareCount
++;
780 Pfn1
->u3
.e2
.ReferenceCount
= 1;
781 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
782 Pfn1
->u3
.e1
.CacheAttribute
= MiNonCached
;
784 Pfn1
->PfnUsage
= MI_USAGE_INIT_MEMORY
;
785 memcpy(Pfn1
->ProcessName
, "Initial PDE", 16);
794 /* Now get the PTE and scan the pages */
795 PointerPte
= MiAddressToPte(BaseAddress
);
796 for (j
= 0; j
< PTE_COUNT
; j
++)
798 /* Check for a valid PTE */
799 if (PointerPte
->u
.Hard
.Valid
== 1)
801 /* Increase the shared count of the PFN entry for the PDE */
802 ASSERT(Pfn1
!= NULL
);
803 Pfn1
->u2
.ShareCount
++;
805 /* Now check if the PTE is valid memory too */
806 PtePageIndex
= PFN_FROM_PTE(PointerPte
);
807 if (MiIsRegularMemory(LoaderBlock
, PtePageIndex
))
810 * Only add pages above the end of system code or pages
811 * that are part of nonpaged pool
813 if ((BaseAddress
>= 0xA0000000) ||
814 ((BaseAddress
>= (ULONG_PTR
)MmNonPagedPoolStart
) &&
815 (BaseAddress
< (ULONG_PTR
)MmNonPagedPoolStart
+
816 MmSizeOfNonPagedPoolInBytes
)))
818 /* Get the PFN entry and make sure it too is valid */
819 Pfn2
= MiGetPfnEntry(PtePageIndex
);
820 if ((MmIsAddressValid(Pfn2
)) &&
821 (MmIsAddressValid(Pfn2
+ 1)))
823 /* Setup the PFN entry */
824 Pfn2
->u4
.PteFrame
= PageFrameIndex
;
825 Pfn2
->PteAddress
= PointerPte
;
826 Pfn2
->u2
.ShareCount
++;
827 Pfn2
->u3
.e2
.ReferenceCount
= 1;
828 Pfn2
->u3
.e1
.PageLocation
= ActiveAndValid
;
829 Pfn2
->u3
.e1
.CacheAttribute
= MiNonCached
;
831 Pfn2
->PfnUsage
= MI_USAGE_INIT_MEMORY
;
832 memcpy(Pfn1
->ProcessName
, "Initial PTE", 16);
841 BaseAddress
+= PAGE_SIZE
;
846 /* Next PDE mapped address */
847 BaseAddress
+= PDE_MAPPED_VA
;
858 MiBuildPfnDatabaseZeroPage(VOID
)
863 /* Grab the lowest page and check if it has no real references */
864 Pfn1
= MiGetPfnEntry(MmLowestPhysicalPage
);
865 if (!(MmLowestPhysicalPage
) && !(Pfn1
->u3
.e2
.ReferenceCount
))
867 /* Make it a bogus page to catch errors */
868 PointerPde
= MiAddressToPde(0xFFFFFFFF);
869 Pfn1
->u4
.PteFrame
= PFN_FROM_PTE(PointerPde
);
870 Pfn1
->PteAddress
= (PMMPTE
)PointerPde
;
871 Pfn1
->u2
.ShareCount
++;
872 Pfn1
->u3
.e2
.ReferenceCount
= 0xFFF0;
873 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
874 Pfn1
->u3
.e1
.CacheAttribute
= MiNonCached
;
881 MiBuildPfnDatabaseFromLoaderBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
883 PLIST_ENTRY NextEntry
;
884 PFN_NUMBER PageCount
= 0;
885 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
886 PFN_NUMBER PageFrameIndex
;
892 /* Now loop through the descriptors */
893 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
894 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
896 /* Get the current descriptor */
897 MdBlock
= CONTAINING_RECORD(NextEntry
,
898 MEMORY_ALLOCATION_DESCRIPTOR
,
902 PageCount
= MdBlock
->PageCount
;
903 PageFrameIndex
= MdBlock
->BasePage
;
905 /* Don't allow memory above what the PFN database is mapping */
906 if (PageFrameIndex
> MmHighestPhysicalPage
)
908 /* Since they are ordered, everything past here will be larger */
912 /* On the other hand, the end page might be higher up... */
913 if ((PageFrameIndex
+ PageCount
) > (MmHighestPhysicalPage
+ 1))
915 /* In which case we'll trim the descriptor to go as high as we can */
916 PageCount
= MmHighestPhysicalPage
+ 1 - PageFrameIndex
;
917 MdBlock
->PageCount
= PageCount
;
919 /* But if there's nothing left to trim, we got too high, so quit */
920 if (!PageCount
) break;
923 /* Now check the descriptor type */
924 switch (MdBlock
->MemoryType
)
926 /* Check for bad RAM */
929 DPRINT1("You either have specified /BURNMEMORY or damaged RAM modules.\n");
932 /* Check for free RAM */
934 case LoaderLoadedProgram
:
935 case LoaderFirmwareTemporary
:
936 case LoaderOsloaderStack
:
938 /* Get the last page of this descriptor. Note we loop backwards */
939 PageFrameIndex
+= PageCount
- 1;
940 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
942 /* Lock the PFN Database */
943 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
946 /* If the page really has no references, mark it as free */
947 if (!Pfn1
->u3
.e2
.ReferenceCount
)
949 /* Add it to the free list */
950 Pfn1
->u3
.e1
.CacheAttribute
= MiNonCached
;
951 MiInsertPageInFreeList(PageFrameIndex
);
954 /* Go to the next page */
959 /* Release PFN database */
960 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
962 /* Done with this block */
965 /* Check for pages that are invisible to us */
966 case LoaderFirmwarePermanent
:
967 case LoaderSpecialMemory
:
968 case LoaderBBTMemory
:
975 /* Map these pages with the KSEG0 mapping that adds 0x80000000 */
976 PointerPte
= MiAddressToPte(KSEG0_BASE
+ (PageFrameIndex
<< PAGE_SHIFT
));
977 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
980 /* Check if the page is really unused */
981 PointerPde
= MiAddressToPde(KSEG0_BASE
+ (PageFrameIndex
<< PAGE_SHIFT
));
982 if (!Pfn1
->u3
.e2
.ReferenceCount
)
984 /* Mark it as being in-use */
985 Pfn1
->u4
.PteFrame
= PFN_FROM_PTE(PointerPde
);
986 Pfn1
->PteAddress
= PointerPte
;
987 Pfn1
->u2
.ShareCount
++;
988 Pfn1
->u3
.e2
.ReferenceCount
= 1;
989 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
990 Pfn1
->u3
.e1
.CacheAttribute
= MiNonCached
;
992 Pfn1
->PfnUsage
= MI_USAGE_BOOT_DRIVER
;
995 /* Check for RAM disk page */
996 if (MdBlock
->MemoryType
== LoaderXIPRom
)
998 /* Make it a pseudo-I/O ROM mapping */
1000 Pfn1
->u2
.ShareCount
= 0;
1001 Pfn1
->u3
.e2
.ReferenceCount
= 0;
1002 Pfn1
->u3
.e1
.PageLocation
= 0;
1003 Pfn1
->u3
.e1
.Rom
= 1;
1004 Pfn1
->u4
.InPageError
= 0;
1005 Pfn1
->u3
.e1
.PrototypePte
= 1;
1009 /* Advance page structures */
1017 /* Next descriptor entry */
1018 NextEntry
= MdBlock
->ListEntry
.Flink
;
1025 MiBuildPfnDatabaseSelf(VOID
)
1027 PMMPTE PointerPte
, LastPte
;
1030 /* Loop the PFN database page */
1031 PointerPte
= MiAddressToPte(MiGetPfnEntry(MmLowestPhysicalPage
));
1032 LastPte
= MiAddressToPte(MiGetPfnEntry(MmHighestPhysicalPage
));
1033 while (PointerPte
<= LastPte
)
1035 /* Make sure the page is valid */
1036 if (PointerPte
->u
.Hard
.Valid
== 1)
1038 /* Get the PFN entry and just mark it referenced */
1039 Pfn1
= MiGetPfnEntry(PointerPte
->u
.Hard
.PageFrameNumber
);
1040 Pfn1
->u2
.ShareCount
= 1;
1041 Pfn1
->u3
.e2
.ReferenceCount
= 1;
1043 Pfn1
->PfnUsage
= MI_USAGE_PFN_DATABASE
;
1055 MiInitializePfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
1057 /* Scan memory and start setting up PFN entries */
1058 MiBuildPfnDatabaseFromPages(LoaderBlock
);
1060 /* Add the zero page */
1061 MiBuildPfnDatabaseZeroPage();
1063 /* Scan the loader block and build the rest of the PFN database */
1064 MiBuildPfnDatabaseFromLoaderBlock(LoaderBlock
);
1066 /* Finally add the pages for the PFN database itself */
1067 MiBuildPfnDatabaseSelf();
1069 #endif /* !_M_AMD64 */
1074 MmFreeLoaderBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
1077 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
1079 PFN_NUMBER BasePage
, LoaderPages
;
1082 PPHYSICAL_MEMORY_RUN Buffer
, Entry
;
1084 /* Loop the descriptors in order to count them */
1086 NextMd
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
1087 while (NextMd
!= &LoaderBlock
->MemoryDescriptorListHead
)
1089 MdBlock
= CONTAINING_RECORD(NextMd
,
1090 MEMORY_ALLOCATION_DESCRIPTOR
,
1093 NextMd
= MdBlock
->ListEntry
.Flink
;
1096 /* Allocate a structure to hold the physical runs */
1097 Buffer
= ExAllocatePoolWithTag(NonPagedPool
,
1098 i
* sizeof(PHYSICAL_MEMORY_RUN
),
1100 ASSERT(Buffer
!= NULL
);
1103 /* Loop the descriptors again */
1104 NextMd
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
1105 while (NextMd
!= &LoaderBlock
->MemoryDescriptorListHead
)
1107 /* Check what kind this was */
1108 MdBlock
= CONTAINING_RECORD(NextMd
,
1109 MEMORY_ALLOCATION_DESCRIPTOR
,
1111 switch (MdBlock
->MemoryType
)
1113 /* Registry, NLS, and heap data */
1114 case LoaderRegistryData
:
1115 case LoaderOsloaderHeap
:
1117 /* Are all a candidate for deletion */
1118 Entry
->BasePage
= MdBlock
->BasePage
;
1119 Entry
->PageCount
= MdBlock
->PageCount
;
1122 /* We keep the rest */
1127 /* Move to the next descriptor */
1128 NextMd
= MdBlock
->ListEntry
.Flink
;
1131 /* Acquire the PFN lock */
1132 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1136 while (--Entry
>= Buffer
)
1138 /* See how many pages are in this run */
1139 i
= Entry
->PageCount
;
1140 BasePage
= Entry
->BasePage
;
1142 /* Loop each page */
1143 Pfn1
= MiGetPfnEntry(BasePage
);
1146 /* Check if it has references or is in any kind of list */
1147 if (!(Pfn1
->u3
.e2
.ReferenceCount
) && (!Pfn1
->u1
.Flink
))
1149 /* Set the new PTE address and put this page into the free list */
1150 Pfn1
->PteAddress
= (PMMPTE
)(BasePage
<< PAGE_SHIFT
);
1151 MiInsertPageInFreeList(BasePage
);
1156 /* It has a reference, so simply drop it */
1157 ASSERT(MI_IS_PHYSICAL_ADDRESS(MiPteToAddress(Pfn1
->PteAddress
)) == FALSE
);
1159 /* Drop a dereference on this page, which should delete it */
1160 Pfn1
->PteAddress
->u
.Long
= 0;
1161 MI_SET_PFN_DELETED(Pfn1
);
1162 MiDecrementShareCount(Pfn1
, BasePage
);
1166 /* Move to the next page */
1172 /* Release the PFN lock and flush the TLB */
1173 DPRINT1("Loader pages freed: %lx\n", LoaderPages
);
1174 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1177 /* Free our run structure */
1178 ExFreePoolWithTag(Buffer
, 'lMmM');
1184 MiAdjustWorkingSetManagerParameters(IN BOOLEAN Client
)
1186 /* This function needs to do more work, for now, we tune page minimums */
1188 /* Check for a system with around 64MB RAM or more */
1189 if (MmNumberOfPhysicalPages
>= (63 * _1MB
) / PAGE_SIZE
)
1191 /* Double the minimum amount of pages we consider for a "plenty free" scenario */
1192 MmPlentyFreePages
*= 2;
1199 MiNotifyMemoryEvents(VOID
)
1201 /* Are we in a low-memory situation? */
1202 if (MmAvailablePages
< MmLowMemoryThreshold
)
1204 /* Clear high, set low */
1205 if (KeReadStateEvent(MiHighMemoryEvent
)) KeClearEvent(MiHighMemoryEvent
);
1206 if (!KeReadStateEvent(MiLowMemoryEvent
)) KeSetEvent(MiLowMemoryEvent
, 0, FALSE
);
1208 else if (MmAvailablePages
< MmHighMemoryThreshold
)
1210 /* We are in between, clear both */
1211 if (KeReadStateEvent(MiHighMemoryEvent
)) KeClearEvent(MiHighMemoryEvent
);
1212 if (KeReadStateEvent(MiLowMemoryEvent
)) KeClearEvent(MiLowMemoryEvent
);
1216 /* Clear low, set high */
1217 if (KeReadStateEvent(MiLowMemoryEvent
)) KeClearEvent(MiLowMemoryEvent
);
1218 if (!KeReadStateEvent(MiHighMemoryEvent
)) KeSetEvent(MiHighMemoryEvent
, 0, FALSE
);
1225 MiCreateMemoryEvent(IN PUNICODE_STRING Name
,
1232 OBJECT_ATTRIBUTES ObjectAttributes
;
1233 SECURITY_DESCRIPTOR SecurityDescriptor
;
1236 Status
= RtlCreateSecurityDescriptor(&SecurityDescriptor
,
1237 SECURITY_DESCRIPTOR_REVISION
);
1238 if (!NT_SUCCESS(Status
)) return Status
;
1240 /* One ACL with 3 ACEs, containing each one SID */
1241 DaclLength
= sizeof(ACL
) +
1242 3 * sizeof(ACCESS_ALLOWED_ACE
) +
1243 RtlLengthSid(SeLocalSystemSid
) +
1244 RtlLengthSid(SeAliasAdminsSid
) +
1245 RtlLengthSid(SeWorldSid
);
1247 /* Allocate space for the DACL */
1248 Dacl
= ExAllocatePoolWithTag(PagedPool
, DaclLength
, 'lcaD');
1249 if (!Dacl
) return STATUS_INSUFFICIENT_RESOURCES
;
1251 /* Setup the ACL inside it */
1252 Status
= RtlCreateAcl(Dacl
, DaclLength
, ACL_REVISION
);
1253 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1255 /* Add query rights for everyone */
1256 Status
= RtlAddAccessAllowedAce(Dacl
,
1258 SYNCHRONIZE
| EVENT_QUERY_STATE
| READ_CONTROL
,
1260 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1262 /* Full rights for the admin */
1263 Status
= RtlAddAccessAllowedAce(Dacl
,
1267 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1269 /* As well as full rights for the system */
1270 Status
= RtlAddAccessAllowedAce(Dacl
,
1274 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1276 /* Set this DACL inside the SD */
1277 Status
= RtlSetDaclSecurityDescriptor(&SecurityDescriptor
,
1281 if (!NT_SUCCESS(Status
)) goto CleanUp
;
1283 /* Setup the event attributes, making sure it's a permanent one */
1284 InitializeObjectAttributes(&ObjectAttributes
,
1286 OBJ_KERNEL_HANDLE
| OBJ_PERMANENT
,
1288 &SecurityDescriptor
);
1290 /* Create the event */
1291 Status
= ZwCreateEvent(&EventHandle
,
1298 ExFreePoolWithTag(Dacl
, 'lcaD');
1300 /* Check if this is the success path */
1301 if (NT_SUCCESS(Status
))
1303 /* Add a reference to the object, then close the handle we had */
1304 Status
= ObReferenceObjectByHandle(EventHandle
,
1310 ZwClose (EventHandle
);
1320 MiInitializeMemoryEvents(VOID
)
1322 UNICODE_STRING LowString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\LowMemoryCondition");
1323 UNICODE_STRING HighString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\HighMemoryCondition");
1324 UNICODE_STRING LowPagedPoolString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\LowPagedPoolCondition");
1325 UNICODE_STRING HighPagedPoolString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\HighPagedPoolCondition");
1326 UNICODE_STRING LowNonPagedPoolString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\LowNonPagedPoolCondition");
1327 UNICODE_STRING HighNonPagedPoolString
= RTL_CONSTANT_STRING(L
"\\KernelObjects\\HighNonPagedPoolCondition");
1330 /* Check if we have a registry setting */
1331 if (MmLowMemoryThreshold
)
1333 /* Convert it to pages */
1334 MmLowMemoryThreshold
*= (_1MB
/ PAGE_SIZE
);
1338 /* The low memory threshold is hit when we don't consider that we have "plenty" of free pages anymore */
1339 MmLowMemoryThreshold
= MmPlentyFreePages
;
1341 /* More than one GB of memory? */
1342 if (MmNumberOfPhysicalPages
> 0x40000)
1344 /* Start at 32MB, and add another 16MB for each GB */
1345 MmLowMemoryThreshold
= (32 * _1MB
) / PAGE_SIZE
;
1346 MmLowMemoryThreshold
+= ((MmNumberOfPhysicalPages
- 0x40000) >> 7);
1348 else if (MmNumberOfPhysicalPages
> 0x8000)
1350 /* For systems with > 128MB RAM, add another 4MB for each 128MB */
1351 MmLowMemoryThreshold
+= ((MmNumberOfPhysicalPages
- 0x8000) >> 5);
1354 /* Don't let the minimum threshold go past 64MB */
1355 MmLowMemoryThreshold
= min(MmLowMemoryThreshold
, (64 * _1MB
) / PAGE_SIZE
);
1358 /* Check if we have a registry setting */
1359 if (MmHighMemoryThreshold
)
1361 /* Convert it into pages */
1362 MmHighMemoryThreshold
*= (_1MB
/ PAGE_SIZE
);
1366 /* Otherwise, the default is three times the low memory threshold */
1367 MmHighMemoryThreshold
= 3 * MmLowMemoryThreshold
;
1368 ASSERT(MmHighMemoryThreshold
> MmLowMemoryThreshold
);
1371 /* Make sure high threshold is actually higher than the low */
1372 MmHighMemoryThreshold
= max(MmHighMemoryThreshold
, MmLowMemoryThreshold
);
1374 /* Create the memory events for all the thresholds */
1375 Status
= MiCreateMemoryEvent(&LowString
, &MiLowMemoryEvent
);
1376 if (!NT_SUCCESS(Status
)) return FALSE
;
1377 Status
= MiCreateMemoryEvent(&HighString
, &MiHighMemoryEvent
);
1378 if (!NT_SUCCESS(Status
)) return FALSE
;
1379 Status
= MiCreateMemoryEvent(&LowPagedPoolString
, &MiLowPagedPoolEvent
);
1380 if (!NT_SUCCESS(Status
)) return FALSE
;
1381 Status
= MiCreateMemoryEvent(&HighPagedPoolString
, &MiHighPagedPoolEvent
);
1382 if (!NT_SUCCESS(Status
)) return FALSE
;
1383 Status
= MiCreateMemoryEvent(&LowNonPagedPoolString
, &MiLowNonPagedPoolEvent
);
1384 if (!NT_SUCCESS(Status
)) return FALSE
;
1385 Status
= MiCreateMemoryEvent(&HighNonPagedPoolString
, &MiHighNonPagedPoolEvent
);
1386 if (!NT_SUCCESS(Status
)) return FALSE
;
1388 /* Now setup the pool events */
1389 MiInitializePoolEvents();
1391 /* Set the initial event state */
1392 MiNotifyMemoryEvents();
1399 MiAddHalIoMappings(VOID
)
1402 PMMPDE PointerPde
, LastPde
;
1405 PFN_NUMBER PageFrameIndex
;
1407 /* HAL Heap address -- should be on a PDE boundary */
1408 BaseAddress
= (PVOID
)MM_HAL_VA_START
;
1409 ASSERT(MiAddressToPteOffset(BaseAddress
) == 0);
1411 /* Check how many PDEs the heap has */
1412 PointerPde
= MiAddressToPde(BaseAddress
);
1413 LastPde
= MiAddressToPde((PVOID
)MM_HAL_VA_END
);
1415 while (PointerPde
<= LastPde
)
1417 /* Does the HAL own this mapping? */
1418 if ((PointerPde
->u
.Hard
.Valid
== 1) &&
1419 (MI_IS_PAGE_LARGE(PointerPde
) == FALSE
))
1421 /* Get the PTE for it and scan each page */
1422 PointerPte
= MiAddressToPte(BaseAddress
);
1423 for (j
= 0 ; j
< PTE_COUNT
; j
++)
1425 /* Does the HAL own this page? */
1426 if (PointerPte
->u
.Hard
.Valid
== 1)
1428 /* Is the HAL using it for device or I/O mapped memory? */
1429 PageFrameIndex
= PFN_FROM_PTE(PointerPte
);
1430 if (!MiGetPfnEntry(PageFrameIndex
))
1432 /* FIXME: For PAT, we need to track I/O cache attributes for coherency */
1433 DPRINT1("HAL I/O Mapping at %p is unsafe\n", BaseAddress
);
1437 /* Move to the next page */
1438 BaseAddress
= (PVOID
)((ULONG_PTR
)BaseAddress
+ PAGE_SIZE
);
1444 /* Move to the next address */
1445 BaseAddress
= (PVOID
)((ULONG_PTR
)BaseAddress
+ PDE_MAPPED_VA
);
1448 /* Move to the next PDE */
1455 MmDumpArmPfnDatabase(IN BOOLEAN StatusOnly
)
1459 PCHAR Consumer
= "Unknown";
1461 ULONG ActivePages
= 0, FreePages
= 0, OtherPages
= 0;
1463 ULONG UsageBucket
[MI_USAGE_FREE_PAGE
+ 1] = {0};
1464 PCHAR MI_USAGE_TEXT
[MI_USAGE_FREE_PAGE
+ 1] =
1492 // Loop the PFN database
1494 KeRaiseIrql(HIGH_LEVEL
, &OldIrql
);
1495 for (i
= 0; i
<= MmHighestPhysicalPage
; i
++)
1497 Pfn1
= MiGetPfnEntry(i
);
1498 if (!Pfn1
) continue;
1500 ASSERT(Pfn1
->PfnUsage
<= MI_USAGE_FREE_PAGE
);
1503 // Get the page location
1505 switch (Pfn1
->u3
.e1
.PageLocation
)
1507 case ActiveAndValid
:
1509 Consumer
= "Active and Valid";
1513 case ZeroedPageList
:
1515 Consumer
= "Zero Page List";
1521 Consumer
= "Free Page List";
1527 Consumer
= "Other (ASSERT!)";
1533 /* Add into bucket */
1534 UsageBucket
[Pfn1
->PfnUsage
]++;
1538 // Pretty-print the page
1541 DbgPrint("0x%08p:\t%20s\t(%04d.%04d)\t[%16s - %16s])\n",
1544 Pfn1
->u3
.e2
.ReferenceCount
,
1545 Pfn1
->u2
.ShareCount
== LIST_HEAD
? 0xFFFF : Pfn1
->u2
.ShareCount
,
1547 MI_USAGE_TEXT
[Pfn1
->PfnUsage
],
1555 DbgPrint("Active: %5d pages\t[%6d KB]\n", ActivePages
, (ActivePages
<< PAGE_SHIFT
) / 1024);
1556 DbgPrint("Free: %5d pages\t[%6d KB]\n", FreePages
, (FreePages
<< PAGE_SHIFT
) / 1024);
1557 DbgPrint("-----------------------------------------\n");
1559 OtherPages
= UsageBucket
[MI_USAGE_BOOT_DRIVER
];
1560 DbgPrint("Boot Images: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1561 OtherPages
= UsageBucket
[MI_USAGE_DRIVER_PAGE
];
1562 DbgPrint("System Drivers: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1563 OtherPages
= UsageBucket
[MI_USAGE_PFN_DATABASE
];
1564 DbgPrint("PFN Database: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1565 OtherPages
= UsageBucket
[MI_USAGE_PAGE_TABLE
] + UsageBucket
[MI_USAGE_LEGACY_PAGE_DIRECTORY
];
1566 DbgPrint("Page Tables: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1567 OtherPages
= UsageBucket
[MI_USAGE_NONPAGED_POOL
] + UsageBucket
[MI_USAGE_NONPAGED_POOL_EXPANSION
];
1568 DbgPrint("NonPaged Pool: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1569 OtherPages
= UsageBucket
[MI_USAGE_PAGED_POOL
];
1570 DbgPrint("Paged Pool: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1571 OtherPages
= UsageBucket
[MI_USAGE_KERNEL_STACK
] + UsageBucket
[MI_USAGE_KERNEL_STACK_EXPANSION
];
1572 DbgPrint("Kernel Stack: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1573 OtherPages
= UsageBucket
[MI_USAGE_INIT_MEMORY
];
1574 DbgPrint("Init Memory: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1575 OtherPages
= UsageBucket
[MI_USAGE_SECTION
];
1576 DbgPrint("Sections: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1577 OtherPages
= UsageBucket
[MI_USAGE_CACHE
];
1578 DbgPrint("Cache: %5d pages\t[%6d KB]\n", OtherPages
, (OtherPages
<< PAGE_SHIFT
) / 1024);
1580 KeLowerIrql(OldIrql
);
1583 PPHYSICAL_MEMORY_DESCRIPTOR
1586 MmInitializeMemoryLimits(IN PLOADER_PARAMETER_BLOCK LoaderBlock
,
1587 IN PBOOLEAN IncludeType
)
1589 PLIST_ENTRY NextEntry
;
1590 ULONG Run
= 0, InitialRuns
;
1591 PFN_NUMBER NextPage
= -1, PageCount
= 0;
1592 PPHYSICAL_MEMORY_DESCRIPTOR Buffer
, NewBuffer
;
1593 PMEMORY_ALLOCATION_DESCRIPTOR MdBlock
;
1596 // Start with the maximum we might need
1598 InitialRuns
= MiNumberDescriptors
;
1601 // Allocate the maximum we'll ever need
1603 Buffer
= ExAllocatePoolWithTag(NonPagedPool
,
1604 sizeof(PHYSICAL_MEMORY_DESCRIPTOR
) +
1605 sizeof(PHYSICAL_MEMORY_RUN
) *
1608 if (!Buffer
) return NULL
;
1611 // For now that's how many runs we have
1613 Buffer
->NumberOfRuns
= InitialRuns
;
1616 // Now loop through the descriptors again
1618 NextEntry
= LoaderBlock
->MemoryDescriptorListHead
.Flink
;
1619 while (NextEntry
!= &LoaderBlock
->MemoryDescriptorListHead
)
1622 // Grab each one, and check if it's one we should include
1624 MdBlock
= CONTAINING_RECORD(NextEntry
,
1625 MEMORY_ALLOCATION_DESCRIPTOR
,
1627 if ((MdBlock
->MemoryType
< LoaderMaximum
) &&
1628 (IncludeType
[MdBlock
->MemoryType
]))
1631 // Add this to our running total
1633 PageCount
+= MdBlock
->PageCount
;
1636 // Check if the next page is described by the next descriptor
1638 if (MdBlock
->BasePage
== NextPage
)
1641 // Combine it into the same physical run
1643 ASSERT(MdBlock
->PageCount
!= 0);
1644 Buffer
->Run
[Run
- 1].PageCount
+= MdBlock
->PageCount
;
1645 NextPage
+= MdBlock
->PageCount
;
1650 // Otherwise just duplicate the descriptor's contents
1652 Buffer
->Run
[Run
].BasePage
= MdBlock
->BasePage
;
1653 Buffer
->Run
[Run
].PageCount
= MdBlock
->PageCount
;
1654 NextPage
= Buffer
->Run
[Run
].BasePage
+ Buffer
->Run
[Run
].PageCount
;
1657 // And in this case, increase the number of runs
1664 // Try the next descriptor
1666 NextEntry
= MdBlock
->ListEntry
.Flink
;
1670 // We should not have been able to go past our initial estimate
1672 ASSERT(Run
<= Buffer
->NumberOfRuns
);
1675 // Our guess was probably exaggerated...
1677 if (InitialRuns
> Run
)
1680 // Allocate a more accurately sized buffer
1682 NewBuffer
= ExAllocatePoolWithTag(NonPagedPool
,
1683 sizeof(PHYSICAL_MEMORY_DESCRIPTOR
) +
1684 sizeof(PHYSICAL_MEMORY_RUN
) *
1690 // Copy the old buffer into the new, then free it
1692 RtlCopyMemory(NewBuffer
->Run
,
1694 sizeof(PHYSICAL_MEMORY_RUN
) * Run
);
1695 ExFreePoolWithTag(Buffer
, 'lMmM');
1698 // Now use the new buffer
1705 // Write the final numbers, and return it
1707 Buffer
->NumberOfRuns
= Run
;
1708 Buffer
->NumberOfPages
= PageCount
;
1715 MiBuildPagedPool(VOID
)
1719 MMPDE TempPde
= ValidKernelPde
;
1720 PFN_NUMBER PageFrameIndex
;
1724 #if (_MI_PAGING_LEVELS >= 3)
1725 MMPPE TempPpe
= ValidKernelPpe
;
1727 #elif (_MI_PAGING_LEVELS == 2)
1728 MMPTE TempPte
= ValidKernelPte
;
1731 // Get the page frame number for the system page directory
1733 PointerPte
= MiAddressToPte(PDE_BASE
);
1734 ASSERT(PD_COUNT
== 1);
1735 MmSystemPageDirectory
[0] = PFN_FROM_PTE(PointerPte
);
1738 // Allocate a system PTE which will hold a copy of the page directory
1740 PointerPte
= MiReserveSystemPtes(1, SystemPteSpace
);
1742 MmSystemPagePtes
= MiPteToAddress(PointerPte
);
1745 // Make this system PTE point to the system page directory.
1746 // It is now essentially double-mapped. This will be used later for lazy
1747 // evaluation of PDEs accross process switches, similarly to how the Global
1748 // page directory array in the old ReactOS Mm is used (but in a less hacky
1751 TempPte
= ValidKernelPte
;
1752 ASSERT(PD_COUNT
== 1);
1753 TempPte
.u
.Hard
.PageFrameNumber
= MmSystemPageDirectory
[0];
1754 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
1757 // Let's get back to paged pool work: size it up.
1758 // By default, it should be twice as big as nonpaged pool.
1760 MmSizeOfPagedPoolInBytes
= 2 * MmMaximumNonPagedPoolInBytes
;
1761 if (MmSizeOfPagedPoolInBytes
> ((ULONG_PTR
)MmNonPagedSystemStart
-
1762 (ULONG_PTR
)MmPagedPoolStart
))
1765 // On the other hand, we have limited VA space, so make sure that the VA
1766 // for paged pool doesn't overflow into nonpaged pool VA. Otherwise, set
1767 // whatever maximum is possible.
1769 MmSizeOfPagedPoolInBytes
= (ULONG_PTR
)MmNonPagedSystemStart
-
1770 (ULONG_PTR
)MmPagedPoolStart
;
1774 // Get the size in pages and make sure paged pool is at least 32MB.
1776 Size
= MmSizeOfPagedPoolInBytes
;
1777 if (Size
< MI_MIN_INIT_PAGED_POOLSIZE
) Size
= MI_MIN_INIT_PAGED_POOLSIZE
;
1778 Size
= BYTES_TO_PAGES(Size
);
1781 // Now check how many PTEs will be required for these many pages.
1783 Size
= (Size
+ (1024 - 1)) / 1024;
1786 // Recompute the page-aligned size of the paged pool, in bytes and pages.
1788 MmSizeOfPagedPoolInBytes
= Size
* PAGE_SIZE
* 1024;
1789 MmSizeOfPagedPoolInPages
= MmSizeOfPagedPoolInBytes
>> PAGE_SHIFT
;
1792 // Let's be really sure this doesn't overflow into nonpaged system VA
1794 ASSERT((MmSizeOfPagedPoolInBytes
+ (ULONG_PTR
)MmPagedPoolStart
) <=
1795 (ULONG_PTR
)MmNonPagedSystemStart
);
1798 // This is where paged pool ends
1800 MmPagedPoolEnd
= (PVOID
)(((ULONG_PTR
)MmPagedPoolStart
+
1801 MmSizeOfPagedPoolInBytes
) - 1);
1804 // Lock the PFN database
1806 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1808 #if (_MI_PAGING_LEVELS >= 3)
1809 /* On these systems, there's no double-mapping, so instead, the PPEs
1810 * are setup to span the entire paged pool area, so there's no need for the
1812 for (PointerPpe
= MiAddressToPpe(MmPagedPoolStart
);
1813 PointerPpe
<= MiAddressToPpe(MmPagedPoolEnd
);
1816 /* Check if the PPE is already valid */
1817 if (!PointerPpe
->u
.Hard
.Valid
)
1819 /* It is not, so map a fresh zeroed page */
1820 TempPpe
.u
.Hard
.PageFrameNumber
= MiRemoveZeroPage(0);
1821 MI_WRITE_VALID_PPE(PointerPpe
, TempPpe
);
1827 // So now get the PDE for paged pool and zero it out
1829 PointerPde
= MiAddressToPde(MmPagedPoolStart
);
1830 RtlZeroMemory(PointerPde
,
1831 (1 + MiAddressToPde(MmPagedPoolEnd
) - PointerPde
) * sizeof(MMPDE
));
1834 // Next, get the first and last PTE
1836 PointerPte
= MiAddressToPte(MmPagedPoolStart
);
1837 MmPagedPoolInfo
.FirstPteForPagedPool
= PointerPte
;
1838 MmPagedPoolInfo
.LastPteForPagedPool
= MiAddressToPte(MmPagedPoolEnd
);
1840 /* Allocate a page and map the first paged pool PDE */
1841 MI_SET_USAGE(MI_USAGE_PAGED_POOL
);
1842 MI_SET_PROCESS2("Kernel");
1843 PageFrameIndex
= MiRemoveZeroPage(0);
1844 TempPde
.u
.Hard
.PageFrameNumber
= PageFrameIndex
;
1845 MI_WRITE_VALID_PDE(PointerPde
, TempPde
);
1846 #if (_MI_PAGING_LEVELS >= 3)
1847 /* Use the PPE of MmPagedPoolStart that was setup above */
1848 // Bla = PFN_FROM_PTE(PpeAddress(MmPagedPool...));
1850 /* Initialize the PFN entry for it */
1851 MiInitializePfnForOtherProcess(PageFrameIndex
,
1853 PFN_FROM_PTE(MiAddressToPpe(MmPagedPoolStart
)));
1855 /* Do it this way */
1856 // Bla = MmSystemPageDirectory[(PointerPde - (PMMPTE)PDE_BASE) / PDE_COUNT]
1858 /* Initialize the PFN entry for it */
1859 MiInitializePfnForOtherProcess(PageFrameIndex
,
1861 MmSystemPageDirectory
[(PointerPde
- (PMMPDE
)PDE_BASE
) / PDE_COUNT
]);
1865 // Release the PFN database lock
1867 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1870 // We only have one PDE mapped for now... at fault time, additional PDEs
1871 // will be allocated to handle paged pool growth. This is where they'll have
1874 MmPagedPoolInfo
.NextPdeForPagedPoolExpansion
= PointerPde
+ 1;
1877 // We keep track of each page via a bit, so check how big the bitmap will
1878 // have to be (make sure to align our page count such that it fits nicely
1879 // into a 4-byte aligned bitmap.
1881 // We'll also allocate the bitmap header itself part of the same buffer.
1884 ASSERT(Size
== MmSizeOfPagedPoolInPages
);
1885 BitMapSize
= (ULONG
)Size
;
1886 Size
= sizeof(RTL_BITMAP
) + (((Size
+ 31) / 32) * sizeof(ULONG
));
1889 // Allocate the allocation bitmap, which tells us which regions have not yet
1890 // been mapped into memory
1892 MmPagedPoolInfo
.PagedPoolAllocationMap
= ExAllocatePoolWithTag(NonPagedPool
,
1895 ASSERT(MmPagedPoolInfo
.PagedPoolAllocationMap
);
1898 // Initialize it such that at first, only the first page's worth of PTEs is
1899 // marked as allocated (incidentially, the first PDE we allocated earlier).
1901 RtlInitializeBitMap(MmPagedPoolInfo
.PagedPoolAllocationMap
,
1902 (PULONG
)(MmPagedPoolInfo
.PagedPoolAllocationMap
+ 1),
1904 RtlSetAllBits(MmPagedPoolInfo
.PagedPoolAllocationMap
);
1905 RtlClearBits(MmPagedPoolInfo
.PagedPoolAllocationMap
, 0, 1024);
1908 // We have a second bitmap, which keeps track of where allocations end.
1909 // Given the allocation bitmap and a base address, we can therefore figure
1910 // out which page is the last page of that allocation, and thus how big the
1911 // entire allocation is.
1913 MmPagedPoolInfo
.EndOfPagedPoolBitmap
= ExAllocatePoolWithTag(NonPagedPool
,
1916 ASSERT(MmPagedPoolInfo
.EndOfPagedPoolBitmap
);
1917 RtlInitializeBitMap(MmPagedPoolInfo
.EndOfPagedPoolBitmap
,
1918 (PULONG
)(MmPagedPoolInfo
.EndOfPagedPoolBitmap
+ 1),
1922 // Since no allocations have been made yet, there are no bits set as the end
1924 RtlClearAllBits(MmPagedPoolInfo
.EndOfPagedPoolBitmap
);
1927 // Initialize paged pool.
1929 InitializePool(PagedPool
, 0);
1931 /* Initialize special pool */
1932 MiInitializeSpecialPool();
1934 /* Default low threshold of 30MB or one fifth of paged pool */
1935 MiLowPagedPoolThreshold
= (30 * _1MB
) >> PAGE_SHIFT
;
1936 MiLowPagedPoolThreshold
= min(MiLowPagedPoolThreshold
, Size
/ 5);
1938 /* Default high threshold of 60MB or 25% */
1939 MiHighPagedPoolThreshold
= (60 * _1MB
) >> PAGE_SHIFT
;
1940 MiHighPagedPoolThreshold
= min(MiHighPagedPoolThreshold
, (Size
* 2) / 5);
1941 ASSERT(MiLowPagedPoolThreshold
< MiHighPagedPoolThreshold
);
1943 /* Setup the global session space */
1944 MiInitializeSystemSpaceMap(NULL
);
1950 MiDbgDumpMemoryDescriptors(VOID
)
1952 PLIST_ENTRY NextEntry
;
1953 PMEMORY_ALLOCATION_DESCRIPTOR Md
;
1954 PFN_NUMBER TotalPages
= 0;
1963 "FirmwareTemporary ",
1964 "FirmwarePermanent ",
1971 "ConsoleOutDriver ",
1973 "StartupKernelStack",
1974 "StartupPanicStack ",
1986 DPRINT1("Base\t\tLength\t\tType\n");
1987 for (NextEntry
= KeLoaderBlock
->MemoryDescriptorListHead
.Flink
;
1988 NextEntry
!= &KeLoaderBlock
->MemoryDescriptorListHead
;
1989 NextEntry
= NextEntry
->Flink
)
1991 Md
= CONTAINING_RECORD(NextEntry
, MEMORY_ALLOCATION_DESCRIPTOR
, ListEntry
);
1992 DPRINT1("%08lX\t%08lX\t%s\n", Md
->BasePage
, Md
->PageCount
, MemType
[Md
->MemoryType
]);
1993 TotalPages
+= Md
->PageCount
;
1996 DPRINT1("Total: %08lX (%d MB)\n", (ULONG
)TotalPages
, (ULONG
)(TotalPages
* PAGE_SIZE
) / 1024 / 1024);
2002 MmArmInitSystem(IN ULONG Phase
,
2003 IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
2006 BOOLEAN IncludeType
[LoaderMaximum
];
2008 PPHYSICAL_MEMORY_RUN Run
;
2009 PFN_NUMBER PageCount
;
2012 PMMPTE PointerPte
, TestPte
;
2016 /* Dump memory descriptors */
2017 if (MiDbgEnableMdDump
) MiDbgDumpMemoryDescriptors();
2020 // Instantiate memory that we don't consider RAM/usable
2021 // We use the same exclusions that Windows does, in order to try to be
2022 // compatible with WinLDR-style booting
2024 for (i
= 0; i
< LoaderMaximum
; i
++) IncludeType
[i
] = TRUE
;
2025 IncludeType
[LoaderBad
] = FALSE
;
2026 IncludeType
[LoaderFirmwarePermanent
] = FALSE
;
2027 IncludeType
[LoaderSpecialMemory
] = FALSE
;
2028 IncludeType
[LoaderBBTMemory
] = FALSE
;
2031 /* Count physical pages on the system */
2032 MiScanMemoryDescriptors(LoaderBlock
);
2034 /* Initialize the phase 0 temporary event */
2035 KeInitializeEvent(&MiTempEvent
, NotificationEvent
, FALSE
);
2037 /* Set all the events to use the temporary event for now */
2038 MiLowMemoryEvent
= &MiTempEvent
;
2039 MiHighMemoryEvent
= &MiTempEvent
;
2040 MiLowPagedPoolEvent
= &MiTempEvent
;
2041 MiHighPagedPoolEvent
= &MiTempEvent
;
2042 MiLowNonPagedPoolEvent
= &MiTempEvent
;
2043 MiHighNonPagedPoolEvent
= &MiTempEvent
;
2046 // Define the basic user vs. kernel address space separation
2048 MmSystemRangeStart
= (PVOID
)MI_DEFAULT_SYSTEM_RANGE_START
;
2049 MmUserProbeAddress
= (ULONG_PTR
)MI_USER_PROBE_ADDRESS
;
2050 MmHighestUserAddress
= (PVOID
)MI_HIGHEST_USER_ADDRESS
;
2052 /* Highest PTE and PDE based on the addresses above */
2053 MiHighestUserPte
= MiAddressToPte(MmHighestUserAddress
);
2054 MiHighestUserPde
= MiAddressToPde(MmHighestUserAddress
);
2055 #if (_MI_PAGING_LEVELS >= 3)
2056 MiHighestUserPpe
= MiAddressToPpe(MmHighestUserAddress
);
2057 #if (_MI_PAGING_LEVELS >= 4)
2058 MiHighestUserPxe
= MiAddressToPxe(MmHighestUserAddress
);
2062 // Get the size of the boot loader's image allocations and then round
2063 // that region up to a PDE size, so that any PDEs we might create for
2064 // whatever follows are separate from the PDEs that boot loader might've
2065 // already created (and later, we can blow all that away if we want to).
2067 MmBootImageSize
= KeLoaderBlock
->Extension
->LoaderPagesSpanned
;
2068 MmBootImageSize
*= PAGE_SIZE
;
2069 MmBootImageSize
= (MmBootImageSize
+ PDE_MAPPED_VA
- 1) & ~(PDE_MAPPED_VA
- 1);
2070 ASSERT((MmBootImageSize
% PDE_MAPPED_VA
) == 0);
2072 /* Initialize session space address layout */
2073 MiInitializeSessionSpaceLayout();
2075 /* Set the based section highest address */
2076 MmHighSectionBase
= (PVOID
)((ULONG_PTR
)MmHighestUserAddress
- 0x800000);
2079 /* The subection PTE format depends on things being 8-byte aligned */
2080 ASSERT((sizeof(CONTROL_AREA
) % 8) == 0);
2081 ASSERT((sizeof(SUBSECTION
) % 8) == 0);
2083 /* Prototype PTEs are assumed to be in paged pool, so check if the math works */
2084 PointerPte
= (PMMPTE
)MmPagedPoolStart
;
2085 MI_MAKE_PROTOTYPE_PTE(&TempPte
, PointerPte
);
2086 TestPte
= MiProtoPteToPte(&TempPte
);
2087 ASSERT(PointerPte
== TestPte
);
2089 /* Try the last nonpaged pool address */
2090 PointerPte
= (PMMPTE
)MI_NONPAGED_POOL_END
;
2091 MI_MAKE_PROTOTYPE_PTE(&TempPte
, PointerPte
);
2092 TestPte
= MiProtoPteToPte(&TempPte
);
2093 ASSERT(PointerPte
== TestPte
);
2095 /* Try a bunch of random addresses near the end of the address space */
2096 PointerPte
= (PMMPTE
)0xFFFC8000;
2097 for (j
= 0; j
< 20; j
+= 1)
2099 MI_MAKE_PROTOTYPE_PTE(&TempPte
, PointerPte
);
2100 TestPte
= MiProtoPteToPte(&TempPte
);
2101 ASSERT(PointerPte
== TestPte
);
2105 /* Subsection PTEs are always in nonpaged pool, pick a random address to try */
2106 PointerPte
= (PMMPTE
)0xFFAACBB8;
2107 MI_MAKE_SUBSECTION_PTE(&TempPte
, PointerPte
);
2108 TestPte
= MiSubsectionPteToSubsection(&TempPte
);
2109 ASSERT(PointerPte
== TestPte
);
2112 /* Loop all 8 standby lists */
2113 for (i
= 0; i
< 8; i
++)
2115 /* Initialize them */
2116 MmStandbyPageListByPriority
[i
].Total
= 0;
2117 MmStandbyPageListByPriority
[i
].ListName
= StandbyPageList
;
2118 MmStandbyPageListByPriority
[i
].Flink
= MM_EMPTY_LIST
;
2119 MmStandbyPageListByPriority
[i
].Blink
= MM_EMPTY_LIST
;
2122 /* Initialize the user mode image list */
2123 InitializeListHead(&MmLoadedUserImageList
);
2125 /* Initialize critical section timeout value (relative time is negative) */
2126 MmCriticalSectionTimeout
.QuadPart
= MmCritsectTimeoutSeconds
* (-10000000LL);
2128 /* Initialize the paged pool mutex and the section commit mutex */
2129 KeInitializeGuardedMutex(&MmPagedPoolMutex
);
2130 KeInitializeGuardedMutex(&MmSectionCommitMutex
);
2131 KeInitializeGuardedMutex(&MmSectionBasedMutex
);
2133 /* Initialize the Loader Lock */
2134 KeInitializeMutant(&MmSystemLoadLock
, FALSE
);
2136 /* Set the zero page event */
2137 KeInitializeEvent(&MmZeroingPageEvent
, SynchronizationEvent
, FALSE
);
2138 MmZeroingPageThreadActive
= FALSE
;
2140 /* Initialize the dead stack S-LIST */
2141 InitializeSListHead(&MmDeadStackSListHead
);
2144 // Check if this is a machine with less than 19MB of RAM
2146 PageCount
= MmNumberOfPhysicalPages
;
2147 if (PageCount
< MI_MIN_PAGES_FOR_SYSPTE_TUNING
)
2150 // Use the very minimum of system PTEs
2152 MmNumberOfSystemPtes
= 7000;
2159 MmNumberOfSystemPtes
= 11000;
2160 if (PageCount
> MI_MIN_PAGES_FOR_SYSPTE_BOOST
)
2163 // Double the amount of system PTEs
2165 MmNumberOfSystemPtes
<<= 1;
2167 if (PageCount
> MI_MIN_PAGES_FOR_SYSPTE_BOOST_BOOST
)
2170 // Double the amount of system PTEs
2172 MmNumberOfSystemPtes
<<= 1;
2176 DPRINT("System PTE count has been tuned to %d (%d bytes)\n",
2177 MmNumberOfSystemPtes
, MmNumberOfSystemPtes
* PAGE_SIZE
);
2179 /* Initialize the working set lock */
2180 ExInitializePushLock(&MmSystemCacheWs
.WorkingSetMutex
);
2182 /* Set commit limit */
2183 MmTotalCommitLimit
= 2 * _1GB
;
2184 MmTotalCommitLimitMaximum
= MmTotalCommitLimit
;
2186 /* Has the allocation fragment been setup? */
2187 if (!MmAllocationFragment
)
2189 /* Use the default value */
2190 MmAllocationFragment
= MI_ALLOCATION_FRAGMENT
;
2191 if (PageCount
< ((256 * _1MB
) / PAGE_SIZE
))
2193 /* On memory systems with less than 256MB, divide by 4 */
2194 MmAllocationFragment
= MI_ALLOCATION_FRAGMENT
/ 4;
2196 else if (PageCount
< (_1GB
/ PAGE_SIZE
))
2198 /* On systems with less than 1GB, divide by 2 */
2199 MmAllocationFragment
= MI_ALLOCATION_FRAGMENT
/ 2;
2204 /* Convert from 1KB fragments to pages */
2205 MmAllocationFragment
*= _1KB
;
2206 MmAllocationFragment
= ROUND_TO_PAGES(MmAllocationFragment
);
2208 /* Don't let it past the maximum */
2209 MmAllocationFragment
= min(MmAllocationFragment
,
2210 MI_MAX_ALLOCATION_FRAGMENT
);
2212 /* Don't let it too small either */
2213 MmAllocationFragment
= max(MmAllocationFragment
,
2214 MI_MIN_ALLOCATION_FRAGMENT
);
2217 /* Check for kernel stack size that's too big */
2218 if (MmLargeStackSize
> (KERNEL_LARGE_STACK_SIZE
/ _1KB
))
2220 /* Sanitize to default value */
2221 MmLargeStackSize
= KERNEL_LARGE_STACK_SIZE
;
2225 /* Take the registry setting, and convert it into bytes */
2226 MmLargeStackSize
*= _1KB
;
2228 /* Now align it to a page boundary */
2229 MmLargeStackSize
= PAGE_ROUND_UP(MmLargeStackSize
);
2232 ASSERT(MmLargeStackSize
<= KERNEL_LARGE_STACK_SIZE
);
2233 ASSERT((MmLargeStackSize
& (PAGE_SIZE
- 1)) == 0);
2235 /* Make sure it's not too low */
2236 if (MmLargeStackSize
< KERNEL_STACK_SIZE
) MmLargeStackSize
= KERNEL_STACK_SIZE
;
2239 /* Compute color information (L2 cache-separated paging lists) */
2240 MiComputeColorInformation();
2242 // Calculate the number of bytes for the PFN database
2243 // then add the color tables and convert to pages
2244 MxPfnAllocation
= (MmHighestPhysicalPage
+ 1) * sizeof(MMPFN
);
2245 MxPfnAllocation
+= (MmSecondaryColors
* sizeof(MMCOLOR_TABLES
) * 2);
2246 MxPfnAllocation
>>= PAGE_SHIFT
;
2248 // We have to add one to the count here, because in the process of
2249 // shifting down to the page size, we actually ended up getting the
2250 // lower aligned size (so say, 0x5FFFF bytes is now 0x5F pages).
2251 // Later on, we'll shift this number back into bytes, which would cause
2252 // us to end up with only 0x5F000 bytes -- when we actually want to have
2256 /* Initialize the platform-specific parts */
2257 MiInitMachineDependent(LoaderBlock
);
2260 // Build the physical memory block
2262 MmPhysicalMemoryBlock
= MmInitializeMemoryLimits(LoaderBlock
,
2266 // Allocate enough buffer for the PFN bitmap
2267 // Align it up to a 32-bit boundary
2269 Bitmap
= ExAllocatePoolWithTag(NonPagedPool
,
2270 (((MmHighestPhysicalPage
+ 1) + 31) / 32) * 4,
2277 KeBugCheckEx(INSTALL_MORE_MEMORY
,
2278 MmNumberOfPhysicalPages
,
2279 MmLowestPhysicalPage
,
2280 MmHighestPhysicalPage
,
2285 // Initialize it and clear all the bits to begin with
2287 RtlInitializeBitMap(&MiPfnBitMap
,
2289 (ULONG
)MmHighestPhysicalPage
+ 1);
2290 RtlClearAllBits(&MiPfnBitMap
);
2293 // Loop physical memory runs
2295 for (i
= 0; i
< MmPhysicalMemoryBlock
->NumberOfRuns
; i
++)
2300 Run
= &MmPhysicalMemoryBlock
->Run
[i
];
2301 DPRINT("PHYSICAL RAM [0x%08p to 0x%08p]\n",
2302 Run
->BasePage
<< PAGE_SHIFT
,
2303 (Run
->BasePage
+ Run
->PageCount
) << PAGE_SHIFT
);
2306 // Make sure it has pages inside it
2311 // Set the bits in the PFN bitmap
2313 RtlSetBits(&MiPfnBitMap
, (ULONG
)Run
->BasePage
, (ULONG
)Run
->PageCount
);
2317 /* Look for large page cache entries that need caching */
2318 MiSyncCachedRanges();
2320 /* Loop for HAL Heap I/O device mappings that need coherency tracking */
2321 MiAddHalIoMappings();
2323 /* Set the initial resident page count */
2324 MmResidentAvailablePages
= MmAvailablePages
- 32;
2326 /* Initialize large page structures on PAE/x64, and MmProcessList on x86 */
2327 MiInitializeLargePageSupport();
2329 /* Check if the registry says any drivers should be loaded with large pages */
2330 MiInitializeDriverLargePageList();
2332 /* Relocate the boot drivers into system PTE space and fixup their PFNs */
2333 MiReloadBootLoadedDrivers(LoaderBlock
);
2335 /* FIXME: Call out into Driver Verifier for initialization */
2337 /* Check how many pages the system has */
2338 if (MmNumberOfPhysicalPages
<= ((13 * _1MB
) / PAGE_SIZE
))
2340 /* Set small system */
2341 MmSystemSize
= MmSmallSystem
;
2342 MmMaximumDeadKernelStacks
= 0;
2344 else if (MmNumberOfPhysicalPages
<= ((19 * _1MB
) / PAGE_SIZE
))
2346 /* Set small system and add 100 pages for the cache */
2347 MmSystemSize
= MmSmallSystem
;
2348 MmSystemCacheWsMinimum
+= 100;
2349 MmMaximumDeadKernelStacks
= 2;
2353 /* Set medium system and add 400 pages for the cache */
2354 MmSystemSize
= MmMediumSystem
;
2355 MmSystemCacheWsMinimum
+= 400;
2356 MmMaximumDeadKernelStacks
= 5;
2359 /* Check for less than 24MB */
2360 if (MmNumberOfPhysicalPages
< ((24 * _1MB
) / PAGE_SIZE
))
2362 /* No more than 32 pages */
2363 MmSystemCacheWsMinimum
= 32;
2366 /* Check for more than 32MB */
2367 if (MmNumberOfPhysicalPages
>= ((32 * _1MB
) / PAGE_SIZE
))
2369 /* Check for product type being "Wi" for WinNT */
2370 if (MmProductType
== '\0i\0W')
2372 /* Then this is a large system */
2373 MmSystemSize
= MmLargeSystem
;
2377 /* For servers, we need 64MB to consider this as being large */
2378 if (MmNumberOfPhysicalPages
>= ((64 * _1MB
) / PAGE_SIZE
))
2380 /* Set it as large */
2381 MmSystemSize
= MmLargeSystem
;
2386 /* Check for more than 33 MB */
2387 if (MmNumberOfPhysicalPages
> ((33 * _1MB
) / PAGE_SIZE
))
2389 /* Add another 500 pages to the cache */
2390 MmSystemCacheWsMinimum
+= 500;
2393 /* Now setup the shared user data fields */
2394 ASSERT(SharedUserData
->NumberOfPhysicalPages
== 0);
2395 SharedUserData
->NumberOfPhysicalPages
= MmNumberOfPhysicalPages
;
2396 SharedUserData
->LargePageMinimum
= 0;
2398 /* Check for workstation (Wi for WinNT) */
2399 if (MmProductType
== '\0i\0W')
2401 /* Set Windows NT Workstation product type */
2402 SharedUserData
->NtProductType
= NtProductWinNt
;
2407 /* Check for LanMan server (La for LanmanNT) */
2408 if (MmProductType
== '\0a\0L')
2410 /* This is a domain controller */
2411 SharedUserData
->NtProductType
= NtProductLanManNt
;
2415 /* Otherwise it must be a normal server (Se for ServerNT) */
2416 SharedUserData
->NtProductType
= NtProductServer
;
2419 /* Set the product type, and make the system more aggressive with low memory */
2421 MmMinimumFreePages
= 81;
2424 /* Update working set tuning parameters */
2425 MiAdjustWorkingSetManagerParameters(!MmProductType
);
2427 /* Finetune the page count by removing working set and NP expansion */
2428 MmResidentAvailablePages
-= MiExpansionPoolPagesInitialCharge
;
2429 MmResidentAvailablePages
-= MmSystemCacheWsMinimum
;
2430 MmResidentAvailableAtInit
= MmResidentAvailablePages
;
2431 if (MmResidentAvailablePages
<= 0)
2433 /* This should not happen */
2434 DPRINT1("System cache working set too big\n");
2438 /* Initialize the system cache */
2439 //MiInitializeSystemCache(MmSystemCacheWsMinimum, MmAvailablePages);
2441 /* Update the commit limit */
2442 MmTotalCommitLimit
= MmAvailablePages
;
2443 if (MmTotalCommitLimit
> 1024) MmTotalCommitLimit
-= 1024;
2444 MmTotalCommitLimitMaximum
= MmTotalCommitLimit
;
2446 /* Size up paged pool and build the shadow system page directory */
2449 /* Debugger physical memory support is now ready to be used */
2450 MmDebugPte
= MiAddressToPte(MiDebugMapping
);
2452 /* Initialize the loaded module list */
2453 MiInitializeLoadedModuleList(LoaderBlock
);
2457 // Always return success for now