[CMAKE]
[reactos.git] / drivers / bus / pcix / pci.h
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/bus/pci/pci.h
5 * PURPOSE: Main Header File
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 #include <initguid.h>
10 #include <ntifs.h>
11 #include <ntagp.h>
12 #include <wdmguid.h>
13 #include <wchar.h>
14 #include <acpiioct.h>
15 #include <drivers/pci/pci.h>
16 #include <drivers/acpi/acpi.h>
17 #include "halfuncs.h"
18 #include "rtlfuncs.h"
19 #include "vffuncs.h"
20 #include "bugcodes.h"
21
22 //
23 // Tag used in all pool allocations (Pci Bus)
24 //
25 #define PCI_POOL_TAG 'BicP'
26
27 //
28 // Checks if the specified FDO is the FDO for the Root PCI Bus
29 //
30 #define PCI_IS_ROOT_FDO(x) ((x)->BusRootFdoExtension == x)
31
32 //
33 // Assertions to make sure we are dealing with the right kind of extension
34 //
35 #define ASSERT_FDO(x) ASSERT((x)->ExtensionType == PciFdoExtensionType);
36 #define ASSERT_PDO(x) ASSERT((x)->ExtensionType == PciPdoExtensionType);
37
38 //
39 // PCI Hack Entry Name Lengths
40 //
41 #define PCI_HACK_ENTRY_SIZE sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
42 #define PCI_HACK_ENTRY_REV_SIZE sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
43 #define PCI_HACK_ENTRY_SUBSYS_SIZE sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
44 #define PCI_HACK_ENTRY_FULL_SIZE sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
45
46 //
47 // PCI Hack Entry Flags
48 //
49 #define PCI_HACK_HAS_REVISION_INFO 0x01
50 #define PCI_HACK_HAS_SUBSYSTEM_INFO 0x02
51
52 //
53 // PCI Interface Flags
54 //
55 #define PCI_INTERFACE_PDO 0x01
56 #define PCI_INTERFACE_FDO 0x02
57 #define PCI_INTERFACE_ROOT 0x04
58
59 //
60 // PCI Skip Function Flags
61 //
62 #define PCI_SKIP_DEVICE_ENUMERATION 0x01
63 #define PCI_SKIP_RESOURCE_ENUMERATION 0x02
64
65 //
66 // PCI Apply Hack Flags
67 //
68 #define PCI_HACK_FIXUP_BEFORE_CONFIGURATION 0x00
69 #define PCI_HACK_FIXUP_AFTER_CONFIGURATION 0x01
70 #define PCI_HACK_FIXUP_BEFORE_UPDATE 0x03
71
72 //
73 // PCI Debugging Device Support
74 //
75 #define MAX_DEBUGGING_DEVICES_SUPPORTED 0x04
76
77 //
78 // PCI Driver Verifier Failures
79 //
80 #define PCI_VERIFIER_CODES 0x04
81
82 //
83 // PCI ID Buffer ANSI Strings
84 //
85 #define MAX_ANSI_STRINGS 0x08
86
87 //
88 // Device Extension, Interface, Translator and Arbiter Signatures
89 //
90 typedef enum _PCI_SIGNATURE
91 {
92 PciPdoExtensionType = 'icP0',
93 PciFdoExtensionType = 'icP1',
94 PciArb_Io = 'icP2',
95 PciArb_Memory = 'icP3',
96 PciArb_Interrupt = 'icP4',
97 PciArb_BusNumber = 'icP5',
98 PciTrans_Interrupt = 'icP6',
99 PciInterface_BusHandler = 'icP7',
100 PciInterface_IntRouteHandler = 'icP8',
101 PciInterface_PciCb = 'icP9',
102 PciInterface_LegacyDeviceDetection = 'icP:',
103 PciInterface_PmeHandler = 'icP;',
104 PciInterface_DevicePresent = 'icP<',
105 PciInterface_NativeIde = 'icP=',
106 PciInterface_AgpTarget = 'icP>',
107 PciInterface_Location = 'icP?'
108 } PCI_SIGNATURE, *PPCI_SIGNATURE;
109
110 //
111 // Driver-handled PCI Device Types
112 //
113 typedef enum _PCI_DEVICE_TYPES
114 {
115 PciTypeInvalid,
116 PciTypeHostBridge,
117 PciTypePciBridge,
118 PciTypeCardbusBridge,
119 PciTypeDevice
120 } PCI_DEVICE_TYPES;
121
122 //
123 // Device Extension Logic States
124 //
125 typedef enum _PCI_STATE
126 {
127 PciNotStarted,
128 PciStarted,
129 PciDeleted,
130 PciStopped,
131 PciSurpriseRemoved,
132 PciSynchronizedOperation,
133 PciMaxObjectState
134 } PCI_STATE;
135
136 //
137 // IRP Dispatch Logic Style
138 //
139 typedef enum _PCI_DISPATCH_STYLE
140 {
141 IRP_COMPLETE,
142 IRP_DOWNWARD,
143 IRP_UPWARD,
144 IRP_DISPATCH,
145 } PCI_DISPATCH_STYLE;
146
147 //
148 // PCI Hack Entry Information
149 //
150 typedef struct _PCI_HACK_ENTRY
151 {
152 USHORT VendorID;
153 USHORT DeviceID;
154 USHORT SubVendorID;
155 USHORT SubSystemID;
156 ULONGLONG HackFlags;
157 USHORT RevisionID;
158 UCHAR Flags;
159 } PCI_HACK_ENTRY, *PPCI_HACK_ENTRY;
160
161 //
162 // Power State Information for Device Extension
163 //
164 typedef struct _PCI_POWER_STATE
165 {
166 SYSTEM_POWER_STATE CurrentSystemState;
167 DEVICE_POWER_STATE CurrentDeviceState;
168 SYSTEM_POWER_STATE SystemWakeLevel;
169 DEVICE_POWER_STATE DeviceWakeLevel;
170 DEVICE_POWER_STATE SystemStateMapping[7];
171 PIRP WaitWakeIrp;
172 PVOID SavedCancelRoutine;
173 LONG Paging;
174 LONG Hibernate;
175 LONG CrashDump;
176 } PCI_POWER_STATE, *PPCI_POWER_STATE;
177
178 //
179 // Internal PCI Lock Structure
180 //
181 typedef struct _PCI_LOCK
182 {
183 LONG Atom;
184 BOOLEAN OldIrql;
185 } PCI_LOCK, *PPCI_LOCK;
186
187 //
188 // Device Extension for a Bus FDO
189 //
190 typedef struct _PCI_FDO_EXTENSION
191 {
192 SINGLE_LIST_ENTRY List;
193 ULONG ExtensionType;
194 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
195 BOOLEAN DeviceState;
196 BOOLEAN TentativeNextState;
197 KEVENT SecondaryExtLock;
198 PDEVICE_OBJECT PhysicalDeviceObject;
199 PDEVICE_OBJECT FunctionalDeviceObject;
200 PDEVICE_OBJECT AttachedDeviceObject;
201 KEVENT ChildListLock;
202 struct _PCI_PDO_EXTENSION *ChildPdoList;
203 struct _PCI_FDO_EXTENSION *BusRootFdoExtension;
204 struct _PCI_FDO_EXTENSION *ParentFdoExtension;
205 struct _PCI_PDO_EXTENSION *ChildBridgePdoList;
206 PPCI_BUS_INTERFACE_STANDARD PciBusInterface;
207 BOOLEAN MaxSubordinateBus;
208 BUS_HANDLER *BusHandler;
209 BOOLEAN BaseBus;
210 BOOLEAN Fake;
211 BOOLEAN ChildDelete;
212 BOOLEAN Scanned;
213 BOOLEAN ArbitersInitialized;
214 BOOLEAN BrokenVideoHackApplied;
215 BOOLEAN Hibernated;
216 PCI_POWER_STATE PowerState;
217 SINGLE_LIST_ENTRY SecondaryExtension;
218 LONG ChildWaitWakeCount;
219 PPCI_COMMON_CONFIG PreservedConfig;
220 PCI_LOCK Lock;
221 struct
222 {
223 BOOLEAN Acquired;
224 BOOLEAN CacheLineSize;
225 BOOLEAN LatencyTimer;
226 BOOLEAN EnablePERR;
227 BOOLEAN EnableSERR;
228 } HotPlugParameters;
229 LONG BusHackFlags;
230 } PCI_FDO_EXTENSION, *PPCI_FDO_EXTENSION;
231
232 typedef struct _PCI_FUNCTION_RESOURCES
233 {
234 IO_RESOURCE_DESCRIPTOR Limit[7];
235 CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7];
236 } PCI_FUNCTION_RESOURCES, *PPCI_FUNCTION_RESOURCES;
237
238 typedef union _PCI_HEADER_TYPE_DEPENDENT
239 {
240 struct
241 {
242 UCHAR Spare[4];
243 } type0;
244 struct
245 {
246 UCHAR PrimaryBus;
247 UCHAR SecondaryBus;
248 UCHAR SubordinateBus;
249 UCHAR SubtractiveDecode:1;
250 UCHAR IsaBitSet:1;
251 UCHAR VgaBitSet:1;
252 UCHAR WeChangedBusNumbers:1;
253 UCHAR IsaBitRequired:1;
254 } type1;
255 struct
256 {
257 UCHAR Spare[4];
258 } type2;
259 } PCI_HEADER_TYPE_DEPENDENT, *PPCI_HEADER_TYPE_DEPENDENT;
260
261 typedef struct _PCI_PDO_EXTENSION
262 {
263 PVOID Next;
264 ULONG ExtensionType;
265 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
266 BOOLEAN DeviceState;
267 BOOLEAN TentativeNextState;
268
269 KEVENT SecondaryExtLock;
270 PCI_SLOT_NUMBER Slot;
271 PDEVICE_OBJECT PhysicalDeviceObject;
272 PPCI_FDO_EXTENSION ParentFdoExtension;
273 SINGLE_LIST_ENTRY SecondaryExtension;
274 LONG BusInterfaceReferenceCount;
275 LONG AgpInterfaceReferenceCount;
276 USHORT VendorId;
277 USHORT DeviceId;
278 USHORT SubsystemVendorId;
279 USHORT SubsystemId;
280 BOOLEAN RevisionId;
281 BOOLEAN ProgIf;
282 BOOLEAN SubClass;
283 BOOLEAN BaseClass;
284 BOOLEAN AdditionalResourceCount;
285 BOOLEAN AdjustedInterruptLine;
286 BOOLEAN InterruptPin;
287 BOOLEAN RawInterruptLine;
288 BOOLEAN CapabilitiesPtr;
289 BOOLEAN SavedLatencyTimer;
290 BOOLEAN SavedCacheLineSize;
291 BOOLEAN HeaderType;
292 BOOLEAN NotPresent;
293 BOOLEAN ReportedMissing;
294 BOOLEAN ExpectedWritebackFailure;
295 BOOLEAN NoTouchPmeEnable;
296 BOOLEAN LegacyDriver;
297 BOOLEAN UpdateHardware;
298 BOOLEAN MovedDevice;
299 BOOLEAN DisablePowerDown;
300 BOOLEAN NeedsHotPlugConfiguration;
301 BOOLEAN IDEInNativeMode;
302 BOOLEAN BIOSAllowsIDESwitchToNativeMode;
303 BOOLEAN IoSpaceUnderNativeIdeControl;
304 BOOLEAN OnDebugPath;
305 BOOLEAN IoSpaceNotRequired;
306 PCI_POWER_STATE PowerState;
307 PCI_HEADER_TYPE_DEPENDENT Dependent;
308 ULONGLONG HackFlags;
309 PCI_FUNCTION_RESOURCES *Resources;
310 PCI_FDO_EXTENSION *BridgeFdoExtension;
311 struct _PCI_PDO_EXTENSION *NextBridge;
312 struct _PCI_PDO_EXTENSION *NextHashEntry;
313 PCI_LOCK Lock;
314 PCI_PMC PowerCapabilities;
315 BOOLEAN TargetAgpCapabilityId;
316 USHORT CommandEnables;
317 USHORT InitialCommand;
318 } PCI_PDO_EXTENSION, *PPCI_PDO_EXTENSION;
319
320 //
321 // IRP Dispatch Function Type
322 //
323 typedef NTSTATUS (NTAPI *PCI_DISPATCH_FUNCTION)(
324 IN PIRP Irp,
325 IN PIO_STACK_LOCATION IoStackLocation,
326 IN PVOID DeviceExtension
327 );
328
329 //
330 // IRP Dispatch Minor Table
331 //
332 typedef struct _PCI_MN_DISPATCH_TABLE
333 {
334 PCI_DISPATCH_STYLE DispatchStyle;
335 PCI_DISPATCH_FUNCTION DispatchFunction;
336 } PCI_MN_DISPATCH_TABLE, *PPCI_MN_DISPATCH_TABLE;
337
338 //
339 // IRP Dispatch Major Table
340 //
341 typedef struct _PCI_MJ_DISPATCH_TABLE
342 {
343 ULONG PnpIrpMaximumMinorFunction;
344 PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable;
345 ULONG PowerIrpMaximumMinorFunction;
346 PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable;
347 PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle;
348 PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction;
349 PCI_DISPATCH_STYLE OtherIrpDispatchStyle;
350 PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction;
351 } PCI_MJ_DISPATCH_TABLE, *PPCI_MJ_DISPATCH_TABLE;
352
353 //
354 // Generic PCI Interface Constructor and Initializer
355 //
356 struct _PCI_INTERFACE;
357 typedef NTSTATUS (NTAPI *PCI_INTERFACE_CONSTRUCTOR)(
358 IN PVOID DeviceExtension,
359 IN PVOID Instance,
360 IN PVOID InterfaceData,
361 IN USHORT Version,
362 IN USHORT Size,
363 IN PINTERFACE Interface
364 );
365
366 typedef NTSTATUS (NTAPI *PCI_INTERFACE_INITIALIZER)(
367 IN PVOID Instance
368 );
369
370 //
371 // Generic PCI Interface (Interface, Translator, Arbiter)
372 //
373 typedef struct _PCI_INTERFACE
374 {
375 CONST GUID *InterfaceType;
376 USHORT MinSize;
377 USHORT MinVersion;
378 USHORT MaxVersion;
379 USHORT Flags;
380 LONG ReferenceCount;
381 PCI_SIGNATURE Signature;
382 PCI_INTERFACE_CONSTRUCTOR Constructor;
383 PCI_INTERFACE_INITIALIZER Initializer;
384 } PCI_INTERFACE, *PPCI_INTERFACE;
385
386 //
387 // Generic Secondary Extension Instance Header (Interface, Translator, Arbiter)
388 //
389 typedef struct PCI_SECONDARY_EXTENSION
390 {
391 SINGLE_LIST_ENTRY List;
392 PCI_SIGNATURE ExtensionType;
393 PVOID Destructor;
394 } PCI_SECONDARY_EXTENSION, *PPCI_SECONDARY_EXTENSION;
395
396 //
397 // PCI Arbiter Instance
398 //
399 typedef struct PCI_ARBITER_INSTANCE
400 {
401 PCI_SECONDARY_EXTENSION Header;
402 PPCI_INTERFACE Interface;
403 PPCI_FDO_EXTENSION BusFdoExtension;
404 WCHAR InstanceName[24];
405 //ARBITER_INSTANCE CommonInstance; FIXME: Need Arbiter Headers
406 } PCI_ARBITER_INSTANCE, *PPCI_ARBITER_INSTANCE;
407
408 //
409 // PCI Verifier Data
410 //
411 typedef struct _PCI_VERIFIER_DATA
412 {
413 ULONG FailureCode;
414 VF_FAILURE_CLASS FailureClass;
415 ULONG AssertionControl;
416 PCHAR DebuggerMessageText;
417 } PCI_VERIFIER_DATA, *PPCI_VERIFIER_DATA;
418
419 //
420 // PCI ID Buffer Descriptor
421 //
422 typedef struct _PCI_ID_BUFFER
423 {
424 ULONG Count;
425 ANSI_STRING Strings[MAX_ANSI_STRINGS];
426 ULONG StringSize[MAX_ANSI_STRINGS];
427 ULONG TotalLength;
428 PCHAR CharBuffer;
429 CHAR BufferData[256];
430 } PCI_ID_BUFFER, *PPCI_ID_BUFFER;
431
432 //
433 // PCI Configuration Callbacks
434 //
435 struct _PCI_CONFIGURATOR_CONTEXT;
436
437 typedef VOID (NTAPI *PCI_CONFIGURATOR_INITIALIZE)(
438 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
439 );
440
441 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESTORE_CURRENT)(
442 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
443 );
444
445 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_LIMITS)(
446 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
447 );
448
449 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS)(
450 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
451 );
452
453 typedef VOID (NTAPI *PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS)(
454 IN PPCI_PDO_EXTENSION PdoExtension,
455 IN PPCI_COMMON_HEADER PciData
456 );
457
458 typedef VOID (NTAPI *PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS)(
459 IN struct _PCI_CONFIGURATOR_CONTEXT* Context,
460 IN PPCI_COMMON_HEADER PciData,
461 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
462 );
463
464 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESET_DEVICE)(
465 IN PPCI_PDO_EXTENSION PdoExtension,
466 IN PPCI_COMMON_HEADER PciData
467 );
468
469 //
470 // PCI Configurator
471 //
472 typedef struct _PCI_CONFIGURATOR
473 {
474 PCI_CONFIGURATOR_INITIALIZE Initialize;
475 PCI_CONFIGURATOR_RESTORE_CURRENT RestoreCurrent;
476 PCI_CONFIGURATOR_SAVE_LIMITS SaveLimits;
477 PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS SaveCurrentSettings;
478 PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS ChangeResourceSettings;
479 PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS GetAdditionalResourceDescriptors;
480 PCI_CONFIGURATOR_RESET_DEVICE ResetDevice;
481 } PCI_CONFIGURATOR, *PPCI_CONFIGURATOR;
482
483 //
484 // PCI Configurator Context
485 //
486 typedef struct _PCI_CONFIGURATOR_CONTEXT
487 {
488 PPCI_PDO_EXTENSION PdoExtension;
489 PPCI_COMMON_HEADER Current;
490 PPCI_COMMON_HEADER PciData;
491 PPCI_CONFIGURATOR Configurator;
492 USHORT SecondaryStatus;
493 USHORT Status;
494 USHORT Command;
495 } PCI_CONFIGURATOR_CONTEXT, *PPCI_CONFIGURATOR_CONTEXT;
496
497 //
498 // PCI IPI Function
499 //
500 typedef VOID (NTAPI *PCI_IPI_FUNCTION)(
501 IN PVOID Reserved,
502 IN PVOID Context
503 );
504
505 //
506 // PCI IPI Context
507 //
508 typedef struct _PCI_IPI_CONTEXT
509 {
510 LONG RunCount;
511 ULONG Barrier;
512 PVOID DeviceExtension;
513 PCI_IPI_FUNCTION Function;
514 PVOID Context;
515 } PCI_IPI_CONTEXT, *PPCI_IPI_CONTEXT;
516
517 //
518 // IRP Dispatch Routines
519 //
520 NTSTATUS
521 NTAPI
522 PciDispatchIrp(
523 IN PDEVICE_OBJECT DeviceObject,
524 IN PIRP Irp
525 );
526
527 NTSTATUS
528 NTAPI
529 PciIrpNotSupported(
530 IN PIRP Irp,
531 IN PIO_STACK_LOCATION IoStackLocation,
532 IN PPCI_FDO_EXTENSION DeviceExtension
533 );
534
535 NTSTATUS
536 NTAPI
537 PciPassIrpFromFdoToPdo(
538 IN PPCI_FDO_EXTENSION DeviceExtension,
539 IN PIRP Irp
540 );
541
542 NTSTATUS
543 NTAPI
544 PciCallDownIrpStack(
545 IN PPCI_FDO_EXTENSION DeviceExtension,
546 IN PIRP Irp
547 );
548
549 NTSTATUS
550 NTAPI
551 PciIrpInvalidDeviceRequest(
552 IN PIRP Irp,
553 IN PIO_STACK_LOCATION IoStackLocation,
554 IN PPCI_FDO_EXTENSION DeviceExtension
555 );
556
557 //
558 // Power Routines
559 //
560 NTSTATUS
561 NTAPI
562 PciFdoWaitWake(
563 IN PIRP Irp,
564 IN PIO_STACK_LOCATION IoStackLocation,
565 IN PPCI_FDO_EXTENSION DeviceExtension
566 );
567
568 NTSTATUS
569 NTAPI
570 PciFdoSetPowerState(
571 IN PIRP Irp,
572 IN PIO_STACK_LOCATION IoStackLocation,
573 IN PPCI_FDO_EXTENSION DeviceExtension
574 );
575
576 NTSTATUS
577 NTAPI
578 PciFdoIrpQueryPower(
579 IN PIRP Irp,
580 IN PIO_STACK_LOCATION IoStackLocation,
581 IN PPCI_FDO_EXTENSION DeviceExtension
582 );
583
584 NTSTATUS
585 NTAPI
586 PciSetPowerManagedDevicePowerState(
587 IN PPCI_PDO_EXTENSION DeviceExtension,
588 IN DEVICE_POWER_STATE DeviceState,
589 IN BOOLEAN IrpSet
590 );
591
592 //
593 // Bus FDO Routines
594 //
595 NTSTATUS
596 NTAPI
597 PciAddDevice(
598 IN PDRIVER_OBJECT DriverObject,
599 IN PDEVICE_OBJECT PhysicalDeviceObject
600 );
601
602 NTSTATUS
603 NTAPI
604 PciFdoIrpStartDevice(
605 IN PIRP Irp,
606 IN PIO_STACK_LOCATION IoStackLocation,
607 IN PPCI_FDO_EXTENSION DeviceExtension
608 );
609
610 NTSTATUS
611 NTAPI
612 PciFdoIrpQueryRemoveDevice(
613 IN PIRP Irp,
614 IN PIO_STACK_LOCATION IoStackLocation,
615 IN PPCI_FDO_EXTENSION DeviceExtension
616 );
617
618 NTSTATUS
619 NTAPI
620 PciFdoIrpRemoveDevice(
621 IN PIRP Irp,
622 IN PIO_STACK_LOCATION IoStackLocation,
623 IN PPCI_FDO_EXTENSION DeviceExtension
624 );
625
626 NTSTATUS
627 NTAPI
628 PciFdoIrpCancelRemoveDevice(
629 IN PIRP Irp,
630 IN PIO_STACK_LOCATION IoStackLocation,
631 IN PPCI_FDO_EXTENSION DeviceExtension
632 );
633
634 NTSTATUS
635 NTAPI
636 PciFdoIrpStopDevice(
637 IN PIRP Irp,
638 IN PIO_STACK_LOCATION IoStackLocation,
639 IN PPCI_FDO_EXTENSION DeviceExtension
640 );
641
642 NTSTATUS
643 NTAPI
644 PciFdoIrpQueryStopDevice(
645 IN PIRP Irp,
646 IN PIO_STACK_LOCATION IoStackLocation,
647 IN PPCI_FDO_EXTENSION DeviceExtension
648 );
649
650 NTSTATUS
651 NTAPI
652 PciFdoIrpCancelStopDevice(
653 IN PIRP Irp,
654 IN PIO_STACK_LOCATION IoStackLocation,
655 IN PPCI_FDO_EXTENSION DeviceExtension
656 );
657
658 NTSTATUS
659 NTAPI
660 PciFdoIrpQueryDeviceRelations(
661 IN PIRP Irp,
662 IN PIO_STACK_LOCATION IoStackLocation,
663 IN PPCI_FDO_EXTENSION DeviceExtension
664 );
665
666 NTSTATUS
667 NTAPI
668 PciFdoIrpQueryInterface(
669 IN PIRP Irp,
670 IN PIO_STACK_LOCATION IoStackLocation,
671 IN PPCI_FDO_EXTENSION DeviceExtension
672 );
673
674 NTSTATUS
675 NTAPI
676 PciFdoIrpQueryCapabilities(
677 IN PIRP Irp,
678 IN PIO_STACK_LOCATION IoStackLocation,
679 IN PPCI_FDO_EXTENSION DeviceExtension
680 );
681
682 NTSTATUS
683 NTAPI
684 PciFdoIrpDeviceUsageNotification(
685 IN PIRP Irp,
686 IN PIO_STACK_LOCATION IoStackLocation,
687 IN PPCI_FDO_EXTENSION DeviceExtension
688 );
689
690 NTSTATUS
691 NTAPI
692 PciFdoIrpSurpriseRemoval(
693 IN PIRP Irp,
694 IN PIO_STACK_LOCATION IoStackLocation,
695 IN PPCI_FDO_EXTENSION DeviceExtension
696 );
697
698 NTSTATUS
699 NTAPI
700 PciFdoIrpQueryLegacyBusInformation(
701 IN PIRP Irp,
702 IN PIO_STACK_LOCATION IoStackLocation,
703 IN PPCI_FDO_EXTENSION DeviceExtension
704 );
705
706 //
707 // Device PDO Routines
708 //
709 NTSTATUS
710 NTAPI
711 PciPdoCreate(
712 IN PPCI_FDO_EXTENSION DeviceExtension,
713 IN PCI_SLOT_NUMBER Slot,
714 OUT PDEVICE_OBJECT *PdoDeviceObject
715 );
716
717 NTSTATUS
718 NTAPI
719 PciPdoWaitWake(
720 IN PIRP Irp,
721 IN PIO_STACK_LOCATION IoStackLocation,
722 IN PPCI_PDO_EXTENSION DeviceExtension
723 );
724
725 NTSTATUS
726 NTAPI
727 PciPdoSetPowerState(
728 IN PIRP Irp,
729 IN PIO_STACK_LOCATION IoStackLocation,
730 IN PPCI_PDO_EXTENSION DeviceExtension
731 );
732
733 NTSTATUS
734 NTAPI
735 PciPdoIrpQueryPower(
736 IN PIRP Irp,
737 IN PIO_STACK_LOCATION IoStackLocation,
738 IN PPCI_PDO_EXTENSION DeviceExtension
739 );
740
741 NTSTATUS
742 NTAPI
743 PciPdoIrpStartDevice(
744 IN PIRP Irp,
745 IN PIO_STACK_LOCATION IoStackLocation,
746 IN PPCI_PDO_EXTENSION DeviceExtension
747 );
748
749 NTSTATUS
750 NTAPI
751 PciPdoIrpQueryRemoveDevice(
752 IN PIRP Irp,
753 IN PIO_STACK_LOCATION IoStackLocation,
754 IN PPCI_PDO_EXTENSION DeviceExtension
755 );
756
757 NTSTATUS
758 NTAPI
759 PciPdoIrpRemoveDevice(
760 IN PIRP Irp,
761 IN PIO_STACK_LOCATION IoStackLocation,
762 IN PPCI_PDO_EXTENSION DeviceExtension
763 );
764
765 NTSTATUS
766 NTAPI
767 PciPdoIrpCancelRemoveDevice(
768 IN PIRP Irp,
769 IN PIO_STACK_LOCATION IoStackLocation,
770 IN PPCI_PDO_EXTENSION DeviceExtension
771 );
772
773 NTSTATUS
774 NTAPI
775 PciPdoIrpStopDevice(
776 IN PIRP Irp,
777 IN PIO_STACK_LOCATION IoStackLocation,
778 IN PPCI_PDO_EXTENSION DeviceExtension
779 );
780
781 NTSTATUS
782 NTAPI
783 PciPdoIrpQueryStopDevice(
784 IN PIRP Irp,
785 IN PIO_STACK_LOCATION IoStackLocation,
786 IN PPCI_PDO_EXTENSION DeviceExtension
787 );
788
789 NTSTATUS
790 NTAPI
791 PciPdoIrpCancelStopDevice(
792 IN PIRP Irp,
793 IN PIO_STACK_LOCATION IoStackLocation,
794 IN PPCI_PDO_EXTENSION DeviceExtension
795 );
796
797 NTSTATUS
798 NTAPI
799 PciPdoIrpQueryDeviceRelations(
800 IN PIRP Irp,
801 IN PIO_STACK_LOCATION IoStackLocation,
802 IN PPCI_PDO_EXTENSION DeviceExtension
803 );
804
805 NTSTATUS
806 NTAPI
807 PciPdoIrpQueryInterface(
808 IN PIRP Irp,
809 IN PIO_STACK_LOCATION IoStackLocation,
810 IN PPCI_PDO_EXTENSION DeviceExtension
811 );
812
813 NTSTATUS
814 NTAPI
815 PciPdoIrpQueryCapabilities(
816 IN PIRP Irp,
817 IN PIO_STACK_LOCATION IoStackLocation,
818 IN PPCI_PDO_EXTENSION DeviceExtension
819 );
820
821 NTSTATUS
822 NTAPI
823 PciPdoIrpQueryResources(
824 IN PIRP Irp,
825 IN PIO_STACK_LOCATION IoStackLocation,
826 IN PPCI_PDO_EXTENSION DeviceExtension
827 );
828
829 NTSTATUS
830 NTAPI
831 PciPdoIrpQueryResourceRequirements(
832 IN PIRP Irp,
833 IN PIO_STACK_LOCATION IoStackLocation,
834 IN PPCI_PDO_EXTENSION DeviceExtension
835 );
836
837 NTSTATUS
838 NTAPI
839 PciPdoIrpQueryDeviceText(
840 IN PIRP Irp,
841 IN PIO_STACK_LOCATION IoStackLocation,
842 IN PPCI_PDO_EXTENSION DeviceExtension
843 );
844
845 NTSTATUS
846 NTAPI
847 PciPdoIrpReadConfig(
848 IN PIRP Irp,
849 IN PIO_STACK_LOCATION IoStackLocation,
850 IN PPCI_PDO_EXTENSION DeviceExtension
851 );
852
853 NTSTATUS
854 NTAPI
855 PciPdoIrpWriteConfig(
856 IN PIRP Irp,
857 IN PIO_STACK_LOCATION IoStackLocation,
858 IN PPCI_PDO_EXTENSION DeviceExtension
859 );
860
861 NTSTATUS
862 NTAPI
863 PciPdoIrpQueryId(
864 IN PIRP Irp,
865 IN PIO_STACK_LOCATION IoStackLocation,
866 IN PPCI_PDO_EXTENSION DeviceExtension
867 );
868
869 NTSTATUS
870 NTAPI
871 PciPdoIrpQueryDeviceState(
872 IN PIRP Irp,
873 IN PIO_STACK_LOCATION IoStackLocation,
874 IN PPCI_PDO_EXTENSION DeviceExtension
875 );
876
877 NTSTATUS
878 NTAPI
879 PciPdoIrpQueryBusInformation(
880 IN PIRP Irp,
881 IN PIO_STACK_LOCATION IoStackLocation,
882 IN PPCI_PDO_EXTENSION DeviceExtension
883 );
884
885 NTSTATUS
886 NTAPI
887 PciPdoIrpDeviceUsageNotification(
888 IN PIRP Irp,
889 IN PIO_STACK_LOCATION IoStackLocation,
890 IN PPCI_PDO_EXTENSION DeviceExtension
891 );
892
893 NTSTATUS
894 NTAPI
895 PciPdoIrpSurpriseRemoval(
896 IN PIRP Irp,
897 IN PIO_STACK_LOCATION IoStackLocation,
898 IN PPCI_PDO_EXTENSION DeviceExtension
899 );
900
901 NTSTATUS
902 NTAPI
903 PciPdoIrpQueryLegacyBusInformation(
904 IN PIRP Irp,
905 IN PIO_STACK_LOCATION IoStackLocation,
906 IN PPCI_PDO_EXTENSION DeviceExtension
907 );
908
909
910 //
911 // HAL Callback/Hook Routines
912 //
913 VOID
914 NTAPI
915 PciHookHal(
916 VOID
917 );
918
919 //
920 // PCI Verifier Routines
921 //
922 VOID
923 NTAPI
924 PciVerifierInit(
925 IN PDRIVER_OBJECT DriverObject
926 );
927
928 PPCI_VERIFIER_DATA
929 NTAPI
930 PciVerifierRetrieveFailureData(
931 IN ULONG FailureCode
932 );
933
934 //
935 // Utility Routines
936 //
937 BOOLEAN
938 NTAPI
939 PciStringToUSHORT(
940 IN PWCHAR String,
941 OUT PUSHORT Value
942 );
943
944 BOOLEAN
945 NTAPI
946 PciIsDatacenter(
947 VOID
948 );
949
950 NTSTATUS
951 NTAPI
952 PciBuildDefaultExclusionLists(
953 VOID
954 );
955
956 BOOLEAN
957 NTAPI
958 PciUnicodeStringStrStr(
959 IN PUNICODE_STRING InputString,
960 IN PCUNICODE_STRING EqualString,
961 IN BOOLEAN CaseInSensitive
962 );
963
964 BOOLEAN
965 NTAPI
966 PciOpenKey(
967 IN PWCHAR KeyName,
968 IN HANDLE RootKey,
969 IN ACCESS_MASK DesiredAccess,
970 OUT PHANDLE KeyHandle,
971 OUT PNTSTATUS KeyStatus
972 );
973
974 NTSTATUS
975 NTAPI
976 PciGetRegistryValue(
977 IN PWCHAR ValueName,
978 IN PWCHAR KeyName,
979 IN HANDLE RootHandle,
980 IN ULONG Type,
981 OUT PVOID *OutputBuffer,
982 OUT PULONG OutputLength
983 );
984
985 PPCI_FDO_EXTENSION
986 NTAPI
987 PciFindParentPciFdoExtension(
988 IN PDEVICE_OBJECT DeviceObject,
989 IN PKEVENT Lock
990 );
991
992 VOID
993 NTAPI
994 PciInsertEntryAtTail(
995 IN PSINGLE_LIST_ENTRY ListHead,
996 IN PPCI_FDO_EXTENSION DeviceExtension,
997 IN PKEVENT Lock
998 );
999
1000 NTSTATUS
1001 NTAPI
1002 PciGetDeviceProperty(
1003 IN PDEVICE_OBJECT DeviceObject,
1004 IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
1005 OUT PVOID *OutputBuffer
1006 );
1007
1008 NTSTATUS
1009 NTAPI
1010 PciSendIoctl(
1011 IN PDEVICE_OBJECT DeviceObject,
1012 IN ULONG IoControlCode,
1013 IN PVOID InputBuffer,
1014 IN ULONG InputBufferLength,
1015 IN PVOID OutputBuffer,
1016 IN ULONG OutputBufferLength
1017 );
1018
1019 VOID
1020 NTAPI
1021 PcipLinkSecondaryExtension(
1022 IN PSINGLE_LIST_ENTRY List,
1023 IN PVOID Lock,
1024 IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
1025 IN PCI_SIGNATURE ExtensionType,
1026 IN PVOID Destructor
1027 );
1028
1029 PPCI_SECONDARY_EXTENSION
1030 NTAPI
1031 PciFindNextSecondaryExtension(
1032 IN PSINGLE_LIST_ENTRY ListHead,
1033 IN PCI_SIGNATURE ExtensionType
1034 );
1035
1036 ULONGLONG
1037 NTAPI
1038 PciGetHackFlags(
1039 IN USHORT VendorId,
1040 IN USHORT DeviceId,
1041 IN USHORT SubVendorId,
1042 IN USHORT SubSystemId,
1043 IN UCHAR RevisionId
1044 );
1045
1046 PPCI_PDO_EXTENSION
1047 NTAPI
1048 PciFindPdoByFunction(
1049 IN PPCI_FDO_EXTENSION DeviceExtension,
1050 IN ULONG FunctionNumber,
1051 IN PPCI_COMMON_HEADER PciData
1052 );
1053
1054 BOOLEAN
1055 NTAPI
1056 PciIsCriticalDeviceClass(
1057 IN UCHAR BaseClass,
1058 IN UCHAR SubClass
1059 );
1060
1061 BOOLEAN
1062 NTAPI
1063 PciIsDeviceOnDebugPath(
1064 IN PPCI_PDO_EXTENSION DeviceExtension
1065 );
1066
1067 NTSTATUS
1068 NTAPI
1069 PciGetBiosConfig(
1070 IN PPCI_PDO_EXTENSION DeviceExtension,
1071 OUT PPCI_COMMON_HEADER PciData
1072 );
1073
1074 NTSTATUS
1075 NTAPI
1076 PciSaveBiosConfig(
1077 IN PPCI_PDO_EXTENSION DeviceExtension,
1078 OUT PPCI_COMMON_HEADER PciData
1079 );
1080
1081 UCHAR
1082 NTAPI
1083 PciReadDeviceCapability(
1084 IN PPCI_PDO_EXTENSION DeviceExtension,
1085 IN UCHAR Offset,
1086 IN ULONG CapabilityId,
1087 OUT PPCI_CAPABILITIES_HEADER Buffer,
1088 IN ULONG Length
1089 );
1090
1091 BOOLEAN
1092 NTAPI
1093 PciCanDisableDecodes(
1094 IN PPCI_PDO_EXTENSION DeviceExtension,
1095 IN PPCI_COMMON_HEADER Config,
1096 IN ULONGLONG HackFlags,
1097 IN BOOLEAN ForPowerDown
1098 );
1099
1100 PCI_DEVICE_TYPES
1101 NTAPI
1102 PciClassifyDeviceType(
1103 IN PPCI_PDO_EXTENSION PdoExtension
1104 );
1105
1106 ULONG_PTR
1107 NTAPI
1108 PciExecuteCriticalSystemRoutine(
1109 IN ULONG_PTR IpiContext
1110 );
1111
1112 BOOLEAN
1113 NTAPI
1114 PciCreateIoDescriptorFromBarLimit(
1115 PIO_RESOURCE_DESCRIPTOR ResourceDescriptor,
1116 IN PULONG BarArray,
1117 IN BOOLEAN Rom
1118 );
1119
1120 BOOLEAN
1121 NTAPI
1122 PciIsSlotPresentInParentMethod(
1123 IN PPCI_PDO_EXTENSION PdoExtension,
1124 IN ULONG Method
1125 );
1126
1127 VOID
1128 NTAPI
1129 PciDecodeEnable(
1130 IN PPCI_PDO_EXTENSION PdoExtension,
1131 IN BOOLEAN Enable,
1132 OUT PUSHORT Command
1133 );
1134
1135 NTSTATUS
1136 NTAPI
1137 PciQueryBusInformation(
1138 IN PPCI_PDO_EXTENSION PdoExtension,
1139 IN PPNP_BUS_INFORMATION* Buffer
1140 );
1141
1142 NTSTATUS
1143 NTAPI
1144 PciQueryCapabilities(
1145 IN PPCI_PDO_EXTENSION PdoExtension,
1146 IN OUT PDEVICE_CAPABILITIES DeviceCapability
1147 );
1148
1149 PCM_PARTIAL_RESOURCE_DESCRIPTOR
1150 NTAPI
1151 PciNextPartialDescriptor(
1152 PCM_PARTIAL_RESOURCE_DESCRIPTOR CmDescriptor
1153 );
1154
1155 //
1156 // Configuration Routines
1157 //
1158 NTSTATUS
1159 NTAPI
1160 PciGetConfigHandlers(
1161 IN PPCI_FDO_EXTENSION FdoExtension
1162 );
1163
1164 VOID
1165 NTAPI
1166 PciReadSlotConfig(
1167 IN PPCI_FDO_EXTENSION DeviceExtension,
1168 IN PCI_SLOT_NUMBER Slot,
1169 IN PVOID Buffer,
1170 IN ULONG Offset,
1171 IN ULONG Length
1172 );
1173
1174 VOID
1175 NTAPI
1176 PciWriteDeviceConfig(
1177 IN PPCI_PDO_EXTENSION DeviceExtension,
1178 IN PVOID Buffer,
1179 IN ULONG Offset,
1180 IN ULONG Length
1181 );
1182
1183 VOID
1184 NTAPI
1185 PciReadDeviceConfig(
1186 IN PPCI_PDO_EXTENSION DeviceExtension,
1187 IN PVOID Buffer,
1188 IN ULONG Offset,
1189 IN ULONG Length
1190 );
1191
1192 UCHAR
1193 NTAPI
1194 PciGetAdjustedInterruptLine(
1195 IN PPCI_PDO_EXTENSION PdoExtension
1196 );
1197
1198 //
1199 // State Machine Logic Transition Routines
1200 //
1201 VOID
1202 NTAPI
1203 PciInitializeState(
1204 IN PPCI_FDO_EXTENSION DeviceExtension
1205 );
1206
1207 NTSTATUS
1208 NTAPI
1209 PciBeginStateTransition(
1210 IN PPCI_FDO_EXTENSION DeviceExtension,
1211 IN PCI_STATE NewState
1212 );
1213
1214 NTSTATUS
1215 NTAPI
1216 PciCancelStateTransition(
1217 IN PPCI_FDO_EXTENSION DeviceExtension,
1218 IN PCI_STATE NewState
1219 );
1220
1221 VOID
1222 NTAPI
1223 PciCommitStateTransition(
1224 IN PPCI_FDO_EXTENSION DeviceExtension,
1225 IN PCI_STATE NewState
1226 );
1227
1228 //
1229 // Arbiter Support
1230 //
1231 NTSTATUS
1232 NTAPI
1233 PciInitializeArbiters(
1234 IN PPCI_FDO_EXTENSION FdoExtension
1235 );
1236
1237 NTSTATUS
1238 NTAPI
1239 PciInitializeArbiterRanges(
1240 IN PPCI_FDO_EXTENSION DeviceExtension,
1241 IN PCM_RESOURCE_LIST Resources
1242 );
1243
1244 //
1245 // Debug Helpers
1246 //
1247 BOOLEAN
1248 NTAPI
1249 PciDebugIrpDispatchDisplay(
1250 IN PIO_STACK_LOCATION IoStackLocation,
1251 IN PPCI_FDO_EXTENSION DeviceExtension,
1252 IN USHORT MaxMinor
1253 );
1254
1255 VOID
1256 NTAPI
1257 PciDebugDumpCommonConfig(
1258 IN PPCI_COMMON_HEADER PciData
1259 );
1260
1261 VOID
1262 NTAPI
1263 PciDebugDumpQueryCapabilities(
1264 IN PDEVICE_CAPABILITIES DeviceCaps
1265 );
1266
1267 VOID
1268 NTAPI
1269 PciDebugPrintIoResReqList(
1270 IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements
1271 );
1272
1273 VOID
1274 NTAPI
1275 PciDebugPrintCmResList(
1276 IN PCM_RESOURCE_LIST ResourceList
1277 );
1278
1279 VOID
1280 NTAPI
1281 PciDebugPrintPartialResource(
1282 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource
1283 );
1284
1285 //
1286 // Interface Support
1287 //
1288 NTSTATUS
1289 NTAPI
1290 PciQueryInterface(
1291 IN PPCI_FDO_EXTENSION DeviceExtension,
1292 IN CONST GUID* InterfaceType,
1293 IN ULONG Size,
1294 IN ULONG Version,
1295 IN PVOID InterfaceData,
1296 IN PINTERFACE Interface,
1297 IN BOOLEAN LastChance
1298 );
1299
1300 NTSTATUS
1301 NTAPI
1302 PciPmeInterfaceInitializer(
1303 IN PVOID Instance
1304 );
1305
1306 NTSTATUS
1307 NTAPI
1308 routeintrf_Initializer(
1309 IN PVOID Instance
1310 );
1311
1312 NTSTATUS
1313 NTAPI
1314 arbusno_Initializer(
1315 IN PVOID Instance
1316 );
1317
1318 NTSTATUS
1319 NTAPI
1320 agpintrf_Initializer(
1321 IN PVOID Instance
1322 );
1323
1324 NTSTATUS
1325 NTAPI
1326 tranirq_Initializer(
1327 IN PVOID Instance
1328 );
1329
1330 NTSTATUS
1331 NTAPI
1332 busintrf_Initializer(
1333 IN PVOID Instance
1334 );
1335
1336 NTSTATUS
1337 NTAPI
1338 armem_Initializer(
1339 IN PVOID Instance
1340 );
1341
1342 NTSTATUS
1343 NTAPI
1344 ario_Initializer(
1345 IN PVOID Instance
1346 );
1347
1348 NTSTATUS
1349 NTAPI
1350 locintrf_Initializer(
1351 IN PVOID Instance
1352 );
1353
1354 NTSTATUS
1355 NTAPI
1356 pcicbintrf_Initializer(
1357 IN PVOID Instance
1358 );
1359
1360 NTSTATUS
1361 NTAPI
1362 lddintrf_Initializer(
1363 IN PVOID Instance
1364 );
1365
1366 NTSTATUS
1367 NTAPI
1368 devpresent_Initializer(
1369 IN PVOID Instance
1370 );
1371
1372 NTSTATUS
1373 NTAPI
1374 agpintrf_Constructor(
1375 IN PVOID DeviceExtension,
1376 IN PVOID Instance,
1377 IN PVOID InterfaceData,
1378 IN USHORT Version,
1379 IN USHORT Size,
1380 IN PINTERFACE Interface
1381 );
1382
1383 NTSTATUS
1384 NTAPI
1385 arbusno_Constructor(
1386 IN PVOID DeviceExtension,
1387 IN PVOID Instance,
1388 IN PVOID InterfaceData,
1389 IN USHORT Version,
1390 IN USHORT Size,
1391 IN PINTERFACE Interface
1392 );
1393
1394 NTSTATUS
1395 NTAPI
1396 tranirq_Constructor(
1397 IN PVOID DeviceExtension,
1398 IN PVOID Instance,
1399 IN PVOID InterfaceData,
1400 IN USHORT Version,
1401 IN USHORT Size,
1402 IN PINTERFACE Interface
1403 );
1404
1405 NTSTATUS
1406 NTAPI
1407 armem_Constructor(
1408 IN PVOID DeviceExtension,
1409 IN PVOID Instance,
1410 IN PVOID InterfaceData,
1411 IN USHORT Version,
1412 IN USHORT Size,
1413 IN PINTERFACE Interface
1414 );
1415
1416 NTSTATUS
1417 NTAPI
1418 busintrf_Constructor(
1419 IN PVOID DeviceExtension,
1420 IN PVOID Instance,
1421 IN PVOID InterfaceData,
1422 IN USHORT Version,
1423 IN USHORT Size,
1424 IN PINTERFACE Interface
1425 );
1426
1427 NTSTATUS
1428 NTAPI
1429 ario_Constructor(
1430 IN PVOID DeviceExtension,
1431 IN PVOID Instance,
1432 IN PVOID InterfaceData,
1433 IN USHORT Version,
1434 IN USHORT Size,
1435 IN PINTERFACE Interface
1436 );
1437
1438 VOID
1439 NTAPI
1440 ario_ApplyBrokenVideoHack(
1441 IN PPCI_FDO_EXTENSION FdoExtension
1442 );
1443
1444 NTSTATUS
1445 NTAPI
1446 pcicbintrf_Constructor(
1447 IN PVOID DeviceExtension,
1448 IN PVOID Instance,
1449 IN PVOID InterfaceData,
1450 IN USHORT Version,
1451 IN USHORT Size,
1452 IN PINTERFACE Interface
1453 );
1454
1455 NTSTATUS
1456 NTAPI
1457 lddintrf_Constructor(
1458 IN PVOID DeviceExtension,
1459 IN PVOID Instance,
1460 IN PVOID InterfaceData,
1461 IN USHORT Version,
1462 IN USHORT Size,
1463 IN PINTERFACE Interface
1464 );
1465
1466 NTSTATUS
1467 NTAPI
1468 locintrf_Constructor(
1469 IN PVOID DeviceExtension,
1470 IN PVOID Instance,
1471 IN PVOID InterfaceData,
1472 IN USHORT Version,
1473 IN USHORT Size,
1474 IN PINTERFACE Interface
1475 );
1476
1477 NTSTATUS
1478 NTAPI
1479 PciPmeInterfaceConstructor(
1480 IN PVOID DeviceExtension,
1481 IN PVOID Instance,
1482 IN PVOID InterfaceData,
1483 IN USHORT Version,
1484 IN USHORT Size,
1485 IN PINTERFACE Interface
1486 );
1487
1488 NTSTATUS
1489 NTAPI
1490 routeintrf_Constructor(
1491 IN PVOID DeviceExtension,
1492 IN PVOID Instance,
1493 IN PVOID InterfaceData,
1494 IN USHORT Version,
1495 IN USHORT Size,
1496 IN PINTERFACE Interface
1497 );
1498
1499 NTSTATUS
1500 NTAPI
1501 devpresent_Constructor(
1502 IN PVOID DeviceExtension,
1503 IN PVOID Instance,
1504 IN PVOID InterfaceData,
1505 IN USHORT Version,
1506 IN USHORT Size,
1507 IN PINTERFACE Interface
1508 );
1509
1510 //
1511 // PCI Enumeration and Resources
1512 //
1513 NTSTATUS
1514 NTAPI
1515 PciQueryDeviceRelations(
1516 IN PPCI_FDO_EXTENSION DeviceExtension,
1517 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1518 );
1519
1520 NTSTATUS
1521 NTAPI
1522 PciQueryResources(
1523 IN PPCI_PDO_EXTENSION PdoExtension,
1524 OUT PCM_RESOURCE_LIST *Buffer
1525 );
1526
1527 NTSTATUS
1528 NTAPI
1529 PciQueryTargetDeviceRelations(
1530 IN PPCI_PDO_EXTENSION PdoExtension,
1531 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1532 );
1533
1534 NTSTATUS
1535 NTAPI
1536 PciQueryEjectionRelations(
1537 IN PPCI_PDO_EXTENSION PdoExtension,
1538 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1539 );
1540
1541 NTSTATUS
1542 NTAPI
1543 PciQueryRequirements(
1544 IN PPCI_PDO_EXTENSION PdoExtension,
1545 IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList
1546 );
1547
1548 BOOLEAN
1549 NTAPI
1550 PciComputeNewCurrentSettings(
1551 IN PPCI_PDO_EXTENSION PdoExtension,
1552 IN PCM_RESOURCE_LIST ResourceList
1553 );
1554
1555 NTSTATUS
1556 NTAPI
1557 PciSetResources(
1558 IN PPCI_PDO_EXTENSION PdoExtension,
1559 IN BOOLEAN DoReset,
1560 IN BOOLEAN SomethingSomethingDarkSide
1561 );
1562
1563 //
1564 // Identification Functions
1565 //
1566 PWCHAR
1567 NTAPI
1568 PciGetDeviceDescriptionMessage(
1569 IN UCHAR BaseClass,
1570 IN UCHAR SubClass
1571 );
1572
1573 NTSTATUS
1574 NTAPI
1575 PciQueryDeviceText(
1576 IN PPCI_PDO_EXTENSION PdoExtension,
1577 IN DEVICE_TEXT_TYPE QueryType,
1578 IN ULONG Locale,
1579 OUT PWCHAR *Buffer
1580 );
1581
1582 NTSTATUS
1583 NTAPI
1584 PciQueryId(
1585 IN PPCI_PDO_EXTENSION DeviceExtension,
1586 IN BUS_QUERY_ID_TYPE QueryType,
1587 OUT PWCHAR *Buffer
1588 );
1589
1590 //
1591 // CardBUS Support
1592 //
1593 VOID
1594 NTAPI
1595 Cardbus_MassageHeaderForLimitsDetermination(
1596 IN PPCI_CONFIGURATOR_CONTEXT Context
1597 );
1598
1599 VOID
1600 NTAPI
1601 Cardbus_SaveCurrentSettings(
1602 IN PPCI_CONFIGURATOR_CONTEXT Context
1603 );
1604
1605 VOID
1606 NTAPI
1607 Cardbus_SaveLimits(
1608 IN PPCI_CONFIGURATOR_CONTEXT Context
1609 );
1610
1611 VOID
1612 NTAPI
1613 Cardbus_RestoreCurrent(
1614 IN PPCI_CONFIGURATOR_CONTEXT Context
1615 );
1616
1617 VOID
1618 NTAPI
1619 Cardbus_GetAdditionalResourceDescriptors(
1620 IN PPCI_CONFIGURATOR_CONTEXT Context,
1621 IN PPCI_COMMON_HEADER PciData,
1622 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1623 );
1624
1625 VOID
1626 NTAPI
1627 Cardbus_ResetDevice(
1628 IN PPCI_PDO_EXTENSION PdoExtension,
1629 IN PPCI_COMMON_HEADER PciData
1630 );
1631
1632 VOID
1633 NTAPI
1634 Cardbus_ChangeResourceSettings(
1635 IN PPCI_PDO_EXTENSION PdoExtension,
1636 IN PPCI_COMMON_HEADER PciData
1637 );
1638
1639 //
1640 // PCI Device Support
1641 //
1642 VOID
1643 NTAPI
1644 Device_MassageHeaderForLimitsDetermination(
1645 IN PPCI_CONFIGURATOR_CONTEXT Context
1646 );
1647
1648 VOID
1649 NTAPI
1650 Device_SaveCurrentSettings(
1651 IN PPCI_CONFIGURATOR_CONTEXT Context
1652 );
1653
1654 VOID
1655 NTAPI
1656 Device_SaveLimits(
1657 IN PPCI_CONFIGURATOR_CONTEXT Context
1658 );
1659
1660 VOID
1661 NTAPI
1662 Device_RestoreCurrent(
1663 IN PPCI_CONFIGURATOR_CONTEXT Context
1664 );
1665
1666 VOID
1667 NTAPI
1668 Device_GetAdditionalResourceDescriptors(
1669 IN PPCI_CONFIGURATOR_CONTEXT Context,
1670 IN PPCI_COMMON_HEADER PciData,
1671 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1672 );
1673
1674 VOID
1675 NTAPI
1676 Device_ResetDevice(
1677 IN PPCI_PDO_EXTENSION PdoExtension,
1678 IN PPCI_COMMON_HEADER PciData
1679 );
1680
1681 VOID
1682 NTAPI
1683 Device_ChangeResourceSettings(
1684 IN PPCI_PDO_EXTENSION PdoExtension,
1685 IN PPCI_COMMON_HEADER PciData
1686 );
1687
1688 //
1689 // PCI-to-PCI Bridge Device Support
1690 //
1691 VOID
1692 NTAPI
1693 PPBridge_MassageHeaderForLimitsDetermination(
1694 IN PPCI_CONFIGURATOR_CONTEXT Context
1695 );
1696
1697 VOID
1698 NTAPI
1699 PPBridge_SaveCurrentSettings(
1700 IN PPCI_CONFIGURATOR_CONTEXT Context
1701 );
1702
1703 VOID
1704 NTAPI
1705 PPBridge_SaveLimits(
1706 IN PPCI_CONFIGURATOR_CONTEXT Context
1707 );
1708
1709 VOID
1710 NTAPI
1711 PPBridge_RestoreCurrent(
1712 IN PPCI_CONFIGURATOR_CONTEXT Context
1713 );
1714
1715 VOID
1716 NTAPI
1717 PPBridge_GetAdditionalResourceDescriptors(
1718 IN PPCI_CONFIGURATOR_CONTEXT Context,
1719 IN PPCI_COMMON_HEADER PciData,
1720 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1721 );
1722
1723 VOID
1724 NTAPI
1725 PPBridge_ResetDevice(
1726 IN PPCI_PDO_EXTENSION PdoExtension,
1727 IN PPCI_COMMON_HEADER PciData
1728 );
1729
1730 VOID
1731 NTAPI
1732 PPBridge_ChangeResourceSettings(
1733 IN PPCI_PDO_EXTENSION PdoExtension,
1734 IN PPCI_COMMON_HEADER PciData
1735 );
1736
1737 //
1738 // External Resources
1739 //
1740 extern SINGLE_LIST_ENTRY PciFdoExtensionListHead;
1741 extern KEVENT PciGlobalLock;
1742 extern PPCI_INTERFACE PciInterfaces[];
1743 extern PCI_INTERFACE ArbiterInterfaceBusNumber;
1744 extern PCI_INTERFACE ArbiterInterfaceMemory;
1745 extern PCI_INTERFACE ArbiterInterfaceIo;
1746 extern PCI_INTERFACE BusHandlerInterface;
1747 extern PCI_INTERFACE PciRoutingInterface;
1748 extern PCI_INTERFACE PciCardbusPrivateInterface;
1749 extern PCI_INTERFACE PciLegacyDeviceDetectionInterface;
1750 extern PCI_INTERFACE PciPmeInterface;
1751 extern PCI_INTERFACE PciDevicePresentInterface;
1752 //extern PCI_INTERFACE PciNativeIdeInterface;
1753 extern PCI_INTERFACE PciLocationInterface;
1754 extern PCI_INTERFACE AgpTargetInterface;
1755 extern PCI_INTERFACE TranslatorInterfaceInterrupt;
1756 extern PDRIVER_OBJECT PciDriverObject;
1757 extern PWATCHDOG_TABLE WdTable;
1758 extern PPCI_HACK_ENTRY PciHackTable;
1759 extern BOOLEAN PciAssignBusNumbers;
1760 extern BOOLEAN PciEnableNativeModeATA;
1761 extern PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable;
1762 extern BOOLEAN PciRunningDatacenter;
1763
1764 /* Exported by NTOS, should this go in the NDK? */
1765 extern NTSYSAPI BOOLEAN InitSafeBootMode;
1766
1767 /* EOF */