reactos/drivers/bus/pcix/pci.h

   1 /*
   2  * PROJECT:         ReactOS PCI Bus Driver
   3  * LICENSE:         BSD - See COPYING.ARM in the top level directory
   4  * FILE:            drivers/bus/pci/pci.h
   5  * PURPOSE:         Main Header File
   6  * PROGRAMMERS:     ReactOS Portable Systems Group
   7  */
   8
   9 #include <initguid.h>
  10 #include <ntifs.h>
  11 #include <ntagp.h>
  12 #include <wdmguid.h>
  13 #include <wchar.h>
  14 #include <acpiioct.h>
  15 #include <drivers/pci/pci.h>
  16 #include <drivers/acpi/acpi.h>
  17 #include "halfuncs.h"
  18 #include "rtlfuncs.h"
  19 #include "vffuncs.h"
  20 #include "bugcodes.h"
  21
  22 //
  23 // Tag used in all pool allocations (Pci Bus)
  24 //
  25 #define PCI_POOL_TAG    'BicP'
  26
  27 //
  28 // Checks if the specified FDO is the FDO for the Root PCI Bus
  29 //
  30 #define PCI_IS_ROOT_FDO(x)                  ((x)->BusRootFdoExtension == x)
  31
  32 //
  33 // Assertions to make sure we are dealing with the right kind of extension
  34 //
  35 #define ASSERT_FDO(x)                       ASSERT((x)->ExtensionType == PciFdoExtensionType);
  36 #define ASSERT_PDO(x)                       ASSERT((x)->ExtensionType == PciPdoExtensionType);
  37
  38 //
  39 // PCI Hack Entry Name Lengths
  40 //
  41 #define PCI_HACK_ENTRY_SIZE                 sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
  42 #define PCI_HACK_ENTRY_REV_SIZE             sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
  43 #define PCI_HACK_ENTRY_SUBSYS_SIZE          sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
  44 #define PCI_HACK_ENTRY_FULL_SIZE            sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
  45
  46 //
  47 // PCI Hack Entry Flags
  48 //
  49 #define PCI_HACK_HAS_REVISION_INFO          0x01
  50 #define PCI_HACK_HAS_SUBSYSTEM_INFO         0x02
  51
  52 //
  53 // PCI Interface Flags
  54 //
  55 #define PCI_INTERFACE_PDO                   0x01
  56 #define PCI_INTERFACE_FDO                   0x02
  57 #define PCI_INTERFACE_ROOT                  0x04
  58
  59 //
  60 // PCI Skip Function Flags
  61 //
  62 #define PCI_SKIP_DEVICE_ENUMERATION         0x01
  63 #define PCI_SKIP_RESOURCE_ENUMERATION       0x02
  64
  65 //
  66 // PCI Apply Hack Flags
  67 //
  68 #define PCI_HACK_FIXUP_BEFORE_CONFIGURATION 0x00
  69 #define PCI_HACK_FIXUP_AFTER_CONFIGURATION  0x01
  70 #define PCI_HACK_FIXUP_BEFORE_UPDATE        0x03
  71
  72 //
  73 // PCI Debugging Device Support
  74 //
  75 #define MAX_DEBUGGING_DEVICES_SUPPORTED     0x04
  76
  77 //
  78 // PCI Driver Verifier Failures
  79 //
  80 #define PCI_VERIFIER_CODES                  0x04
  81
  82 //
  83 // Device Extension, Interface, Translator and Arbiter Signatures
  84 //
  85 typedef enum _PCI_SIGNATURE
  86 {
  87     PciPdoExtensionType = 'icP0',
  88     PciFdoExtensionType = 'icP1',
  89     PciArb_Io = 'icP2',
  90     PciArb_Memory = 'icP3',
  91     PciArb_Interrupt = 'icP4',
  92     PciArb_BusNumber = 'icP5',
  93     PciTrans_Interrupt = 'icP6',
  94     PciInterface_BusHandler = 'icP7',
  95     PciInterface_IntRouteHandler = 'icP8',
  96     PciInterface_PciCb = 'icP9',
  97     PciInterface_LegacyDeviceDetection = 'icP:',
  98     PciInterface_PmeHandler = 'icP;',
  99     PciInterface_DevicePresent = 'icP<',
 100     PciInterface_NativeIde = 'icP=',
 101     PciInterface_AgpTarget = 'icP>',
 102     PciInterface_Location  = 'icP?'
 103 } PCI_SIGNATURE, *PPCI_SIGNATURE;
 104
 105 //
 106 // Device Extension Logic States
 107 //
 108 typedef enum _PCI_STATE
 109 {
 110     PciNotStarted,
 111     PciStarted,
 112     PciDeleted,
 113     PciStopped,
 114     PciSurpriseRemoved,
 115     PciSynchronizedOperation,
 116     PciMaxObjectState
 117 } PCI_STATE;
 118
 119 //
 120 // IRP Dispatch Logic Style
 121 //
 122 typedef enum _PCI_DISPATCH_STYLE
 123 {
 124     IRP_COMPLETE,
 125     IRP_DOWNWARD,
 126     IRP_UPWARD,
 127     IRP_DISPATCH,
 128 } PCI_DISPATCH_STYLE;
 129
 130 //
 131 // PCI Hack Entry Information
 132 //
 133 typedef struct _PCI_HACK_ENTRY
 134 {
 135     USHORT VendorID;
 136     USHORT DeviceID;
 137     USHORT SubVendorID;
 138     USHORT SubSystemID;
 139     ULONGLONG HackFlags;
 140     USHORT RevisionID;
 141     UCHAR Flags;
 142 } PCI_HACK_ENTRY, *PPCI_HACK_ENTRY;
 143
 144 //
 145 // Power State Information for Device Extension
 146 //
 147 typedef struct _PCI_POWER_STATE
 148 {
 149     SYSTEM_POWER_STATE CurrentSystemState;
 150     DEVICE_POWER_STATE CurrentDeviceState;
 151     SYSTEM_POWER_STATE SystemWakeLevel;
 152     DEVICE_POWER_STATE DeviceWakeLevel;
 153     DEVICE_POWER_STATE SystemStateMapping[7];
 154     PIRP WaitWakeIrp;
 155     PVOID SavedCancelRoutine;
 156     LONG Paging;
 157     LONG Hibernate;
 158     LONG CrashDump;
 159 } PCI_POWER_STATE, *PPCI_POWER_STATE;
 160
 161 //
 162 // Internal PCI Lock Structure
 163 //
 164 typedef struct _PCI_LOCK
 165 {
 166     LONG Atom;
 167     BOOLEAN OldIrql;
 168 } PCI_LOCK, *PPCI_LOCK;
 169
 170 //
 171 // Device Extension for a Bus FDO
 172 //
 173 typedef struct _PCI_FDO_EXTENSION
 174 {
 175     SINGLE_LIST_ENTRY List;
 176     ULONG ExtensionType;
 177     struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
 178     BOOLEAN DeviceState;
 179     BOOLEAN TentativeNextState;
 180     KEVENT SecondaryExtLock;
 181     PDEVICE_OBJECT PhysicalDeviceObject;
 182     PDEVICE_OBJECT FunctionalDeviceObject;
 183     PDEVICE_OBJECT AttachedDeviceObject;
 184     KEVENT ChildListLock;
 185     struct _PCI_PDO_EXTENSION *ChildPdoList;
 186     struct _PCI_FDO_EXTENSION *BusRootFdoExtension;
 187     struct _PCI_FDO_EXTENSION *ParentFdoExtension;
 188     struct _PCI_PDO_EXTENSION *ChildBridgePdoList;
 189     PPCI_BUS_INTERFACE_STANDARD PciBusInterface;
 190     BOOLEAN MaxSubordinateBus;
 191     BUS_HANDLER *BusHandler;
 192     BOOLEAN BaseBus;
 193     BOOLEAN Fake;
 194     BOOLEAN ChildDelete;
 195     BOOLEAN Scanned;
 196     BOOLEAN ArbitersInitialized;
 197     BOOLEAN BrokenVideoHackApplied;
 198     BOOLEAN Hibernated;
 199     PCI_POWER_STATE PowerState;
 200     SINGLE_LIST_ENTRY SecondaryExtension;
 201     LONG ChildWaitWakeCount;
 202     PPCI_COMMON_CONFIG PreservedConfig;
 203     PCI_LOCK Lock;
 204     struct
 205     {
 206         BOOLEAN Acquired;
 207         BOOLEAN CacheLineSize;
 208         BOOLEAN LatencyTimer;
 209         BOOLEAN EnablePERR;
 210         BOOLEAN EnableSERR;
 211     } HotPlugParameters;
 212     LONG BusHackFlags;
 213 } PCI_FDO_EXTENSION, *PPCI_FDO_EXTENSION;
 214
 215 typedef struct _PCI_FUNCTION_RESOURCES
 216 {
 217     IO_RESOURCE_DESCRIPTOR Limit[7];
 218     CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7];
 219 } PCI_FUNCTION_RESOURCES, *PPCI_FUNCTION_RESOURCES;
 220
 221 typedef union _PCI_HEADER_TYPE_DEPENDENT
 222 {
 223     struct
 224     {
 225         UCHAR Spare[4];
 226     } type0;
 227     struct
 228     {
 229         UCHAR PrimaryBus;
 230         UCHAR SecondaryBus;
 231         UCHAR SubordinateBus;
 232         UCHAR SubtractiveDecode:1;
 233         UCHAR IsaBitSet:1;
 234         UCHAR VgaBitSet:1;
 235         UCHAR WeChangedBusNumbers:1;
 236         UCHAR IsaBitRequired:1;
 237     } type1;
 238     struct
 239     {
 240         UCHAR Spare[4];
 241     } type2;
 242 } PCI_HEADER_TYPE_DEPENDENT, *PPCI_HEADER_TYPE_DEPENDENT;
 243
 244 typedef struct _PCI_PDO_EXTENSION
 245 {
 246     PVOID Next;
 247     ULONG ExtensionType;
 248     struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
 249     BOOLEAN DeviceState;
 250     BOOLEAN TentativeNextState;
 251
 252     KEVENT SecondaryExtLock;
 253     PCI_SLOT_NUMBER Slot;
 254     PDEVICE_OBJECT PhysicalDeviceObject;
 255     PPCI_FDO_EXTENSION ParentFdoExtension;
 256     SINGLE_LIST_ENTRY SecondaryExtension;
 257     LONG BusInterfaceReferenceCount;
 258     LONG AgpInterfaceReferenceCount;
 259     USHORT VendorId;
 260     USHORT DeviceId;
 261     USHORT SubsystemVendorId;
 262     USHORT SubsystemId;
 263     BOOLEAN RevisionId;
 264     BOOLEAN ProgIf;
 265     BOOLEAN SubClass;
 266     BOOLEAN BaseClass;
 267     BOOLEAN AdditionalResourceCount;
 268     BOOLEAN AdjustedInterruptLine;
 269     BOOLEAN InterruptPin;
 270     BOOLEAN RawInterruptLine;
 271     BOOLEAN CapabilitiesPtr;
 272     BOOLEAN SavedLatencyTimer;
 273     BOOLEAN SavedCacheLineSize;
 274     BOOLEAN HeaderType;
 275     BOOLEAN NotPresent;
 276     BOOLEAN ReportedMissing;
 277     BOOLEAN ExpectedWritebackFailure;
 278     BOOLEAN NoTouchPmeEnable;
 279     BOOLEAN LegacyDriver;
 280     BOOLEAN UpdateHardware;
 281     BOOLEAN MovedDevice;
 282     BOOLEAN DisablePowerDown;
 283     BOOLEAN NeedsHotPlugConfiguration;
 284     BOOLEAN SwitchedIDEToNativeMode;
 285     BOOLEAN BIOSAllowsIDESwitchToNativeMode;
 286     BOOLEAN IoSpaceUnderNativeIdeControl;
 287     BOOLEAN OnDebugPath;
 288     PCI_POWER_STATE PowerState;
 289     PCI_HEADER_TYPE_DEPENDENT Dependent;
 290     ULONGLONG HackFlags;
 291     PCI_FUNCTION_RESOURCES *Resources;
 292     PCI_FDO_EXTENSION *BridgeFdoExtension;
 293     struct _PCI_PDO_EXTENSION *NextBridge;
 294     struct _PCI_PDO_EXTENSION *NextHashEntry;
 295     PCI_LOCK Lock;
 296     PCI_PMC PowerCapabilities;
 297     BOOLEAN TargetAgpCapabilityId;
 298     USHORT CommandEnables;
 299     USHORT InitialCommand;
 300 } PCI_PDO_EXTENSION, *PPCI_PDO_EXTENSION;
 301
 302 //
 303 // IRP Dispatch Function Type
 304 //
 305 typedef NTSTATUS (NTAPI *PCI_DISPATCH_FUNCTION)(
 306     IN PIRP Irp,
 307     IN PIO_STACK_LOCATION IoStackLocation,
 308     IN PVOID DeviceExtension
 309 );
 310
 311 //
 312 // IRP Dispatch Minor Table
 313 //
 314 typedef struct _PCI_MN_DISPATCH_TABLE
 315 {
 316     PCI_DISPATCH_STYLE DispatchStyle;
 317     PCI_DISPATCH_FUNCTION DispatchFunction;
 318 } PCI_MN_DISPATCH_TABLE, *PPCI_MN_DISPATCH_TABLE;
 319
 320 //
 321 // IRP Dispatch Major Table
 322 //
 323 typedef struct _PCI_MJ_DISPATCH_TABLE
 324 {
 325     ULONG PnpIrpMaximumMinorFunction;
 326     PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable;
 327     ULONG PowerIrpMaximumMinorFunction;
 328     PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable;
 329     PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle;
 330     PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction;
 331     PCI_DISPATCH_STYLE OtherIrpDispatchStyle;
 332     PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction;
 333 } PCI_MJ_DISPATCH_TABLE, *PPCI_MJ_DISPATCH_TABLE;
 334
 335 //
 336 // Generic PCI Interface Constructor and Initializer
 337 //
 338 struct _PCI_INTERFACE;
 339 typedef NTSTATUS (NTAPI *PCI_INTERFACE_CONSTRUCTOR)(
 340     IN PVOID DeviceExtension,
 341     IN PVOID Instance,
 342     IN PVOID InterfaceData,
 343     IN USHORT Version,
 344     IN USHORT Size,
 345     IN PINTERFACE Interface
 346 );
 347
 348 typedef NTSTATUS (NTAPI *PCI_INTERFACE_INITIALIZER)(
 349     IN PVOID Instance
 350 );
 351
 352 //
 353 // Generic PCI Interface (Interface, Translator, Arbiter)
 354 //
 355 typedef struct _PCI_INTERFACE
 356 {
 357     CONST GUID *InterfaceType;
 358     USHORT MinSize;
 359     USHORT MinVersion;
 360     USHORT MaxVersion;
 361     USHORT Flags;
 362     LONG ReferenceCount;
 363     PCI_SIGNATURE Signature;
 364     PCI_INTERFACE_CONSTRUCTOR Constructor;
 365     PCI_INTERFACE_INITIALIZER Initializer;
 366 } PCI_INTERFACE, *PPCI_INTERFACE;
 367
 368 //
 369 // Generic Secondary Extension Instance Header (Interface, Translator, Arbiter)
 370 //
 371 typedef struct PCI_SECONDARY_EXTENSION
 372 {
 373     SINGLE_LIST_ENTRY List;
 374     PCI_SIGNATURE ExtensionType;
 375     PVOID Destructor;
 376 } PCI_SECONDARY_EXTENSION, *PPCI_SECONDARY_EXTENSION;
 377
 378 //
 379 // PCI Arbiter Instance
 380 //
 381 typedef struct PCI_ARBITER_INSTANCE
 382 {
 383     PCI_SECONDARY_EXTENSION Header;
 384     PPCI_INTERFACE Interface;
 385     PPCI_FDO_EXTENSION BusFdoExtension;
 386     WCHAR InstanceName[24];
 387     //ARBITER_INSTANCE CommonInstance; FIXME: Need Arbiter Headers
 388 } PCI_ARBITER_INSTANCE, *PPCI_ARBITER_INSTANCE;
 389
 390 //
 391 // PCI Verifier Data
 392 //
 393 typedef struct _PCI_VERIFIER_DATA
 394 {
 395     ULONG FailureCode;
 396     VF_FAILURE_CLASS FailureClass;
 397     ULONG AssertionControl;
 398     PCHAR DebuggerMessageText;
 399 } PCI_VERIFIER_DATA, *PPCI_VERIFIER_DATA;
 400
 401 //
 402 // PCI Configuration Callbacks
 403 //
 404 struct _PCI_CONFIGURATOR_CONTEXT;
 405
 406 typedef VOID (NTAPI *PCI_CONFIGURATOR_INITIALIZE)(
 407     IN struct _PCI_CONFIGURATOR_CONTEXT* Context
 408 );
 409
 410 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESTORE_CURRENT)(
 411     IN struct _PCI_CONFIGURATOR_CONTEXT* Context
 412 );
 413
 414 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_LIMITS)(
 415     IN struct _PCI_CONFIGURATOR_CONTEXT* Context
 416 );
 417
 418 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS)(
 419     IN struct _PCI_CONFIGURATOR_CONTEXT* Context
 420 );
 421
 422 typedef VOID (NTAPI *PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS)(
 423     IN struct _PCI_CONFIGURATOR_CONTEXT* Context
 424 );
 425
 426 typedef VOID (NTAPI *PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS)(
 427     IN struct _PCI_CONFIGURATOR_CONTEXT* Context,
 428     IN PPCI_COMMON_HEADER PciData,
 429     IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
 430 );
 431
 432 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESET_DEVICE)(
 433     IN struct _PCI_CONFIGURATOR_CONTEXT* Context
 434 );
 435
 436 //
 437 // PCI Configurator
 438 //
 439 typedef struct _PCI_CONFIGURATOR
 440 {
 441     PCI_CONFIGURATOR_INITIALIZE Initialize;
 442     PCI_CONFIGURATOR_RESTORE_CURRENT RestoreCurrent;
 443     PCI_CONFIGURATOR_SAVE_LIMITS SaveLimits;
 444     PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS SaveCurrentSettings;
 445     PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS ChangeResourceSettings;
 446     PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS GetAdditionalResourceDescriptors;
 447     PCI_CONFIGURATOR_RESET_DEVICE ResetDevice;
 448 } PCI_CONFIGURATOR, *PPCI_CONFIGURATOR;
 449
 450 //
 451 // PCI Configurator Context
 452 //
 453 typedef struct _PCI_CONFIGURATOR_CONTEXT
 454 {
 455     PPCI_PDO_EXTENSION PdoExtension;
 456     PPCI_COMMON_HEADER Current;
 457     PPCI_COMMON_HEADER PciData;
 458     PPCI_CONFIGURATOR Configurator;
 459     USHORT SecondaryStatus;
 460     USHORT Status;
 461     USHORT Command;
 462 } PCI_CONFIGURATOR_CONTEXT, *PPCI_CONFIGURATOR_CONTEXT;
 463
 464 //
 465 // PCI IPI Function
 466 //
 467 typedef VOID (NTAPI *PCI_IPI_FUNCTION)(
 468     IN PVOID Reserved,
 469     IN PPCI_CONFIGURATOR_CONTEXT Context
 470 );
 471
 472 //
 473 // PCI IPI Context
 474 //
 475 typedef struct _PCI_IPI_CONTEXT
 476 {
 477     LONG RunCount;
 478     ULONG Barrier;
 479     PPCI_PDO_EXTENSION PdoExtension;
 480     PCI_IPI_FUNCTION Function;
 481     PVOID Context;
 482 } PCI_IPI_CONTEXT, *PPCI_IPI_CONTEXT;
 483
 484 //
 485 // IRP Dispatch Routines
 486 //
 487 NTSTATUS
 488 NTAPI
 489 PciDispatchIrp(
 490     IN PDEVICE_OBJECT DeviceObject,
 491     IN PIRP Irp
 492 );
 493
 494 NTSTATUS
 495 NTAPI
 496 PciIrpNotSupported(
 497     IN PIRP Irp,
 498     IN PIO_STACK_LOCATION IoStackLocation,
 499     IN PPCI_FDO_EXTENSION DeviceExtension
 500 );
 501
 502 NTSTATUS
 503 NTAPI
 504 PciPassIrpFromFdoToPdo(
 505     IN PPCI_FDO_EXTENSION DeviceExtension,
 506     IN PIRP Irp
 507 );
 508
 509 NTSTATUS
 510 NTAPI
 511 PciCallDownIrpStack(
 512     IN PPCI_FDO_EXTENSION DeviceExtension,
 513     IN PIRP Irp
 514 );
 515
 516 NTSTATUS
 517 NTAPI
 518 PciIrpInvalidDeviceRequest(
 519     IN PIRP Irp,
 520     IN PIO_STACK_LOCATION IoStackLocation,
 521     IN PPCI_FDO_EXTENSION DeviceExtension
 522 );
 523
 524 //
 525 // Power Routines
 526 //
 527 NTSTATUS
 528 NTAPI
 529 PciFdoWaitWake(
 530     IN PIRP Irp,
 531     IN PIO_STACK_LOCATION IoStackLocation,
 532     IN PPCI_FDO_EXTENSION DeviceExtension
 533 );
 534
 535 NTSTATUS
 536 NTAPI
 537 PciFdoSetPowerState(
 538     IN PIRP Irp,
 539     IN PIO_STACK_LOCATION IoStackLocation,
 540     IN PPCI_FDO_EXTENSION DeviceExtension
 541 );
 542
 543 NTSTATUS
 544 NTAPI
 545 PciFdoIrpQueryPower(
 546     IN PIRP Irp,
 547     IN PIO_STACK_LOCATION IoStackLocation,
 548     IN PPCI_FDO_EXTENSION DeviceExtension
 549 );
 550
 551 NTSTATUS
 552 NTAPI
 553 PciSetPowerManagedDevicePowerState(
 554     IN PPCI_PDO_EXTENSION DeviceExtension,
 555     IN DEVICE_POWER_STATE DeviceState,
 556     IN BOOLEAN IrpSet
 557 );
 558
 559 //
 560 // Bus FDO Routines
 561 //
 562 NTSTATUS
 563 NTAPI
 564 PciAddDevice(
 565     IN PDRIVER_OBJECT DriverObject,
 566     IN PDEVICE_OBJECT PhysicalDeviceObject
 567 );
 568
 569 NTSTATUS
 570 NTAPI
 571 PciFdoIrpStartDevice(
 572     IN PIRP Irp,
 573     IN PIO_STACK_LOCATION IoStackLocation,
 574     IN PPCI_FDO_EXTENSION DeviceExtension
 575 );
 576
 577 NTSTATUS
 578 NTAPI
 579 PciFdoIrpQueryRemoveDevice(
 580     IN PIRP Irp,
 581     IN PIO_STACK_LOCATION IoStackLocation,
 582     IN PPCI_FDO_EXTENSION DeviceExtension
 583 );
 584
 585 NTSTATUS
 586 NTAPI
 587 PciFdoIrpRemoveDevice(
 588     IN PIRP Irp,
 589     IN PIO_STACK_LOCATION IoStackLocation,
 590     IN PPCI_FDO_EXTENSION DeviceExtension
 591 );
 592
 593 NTSTATUS
 594 NTAPI
 595 PciFdoIrpCancelRemoveDevice(
 596     IN PIRP Irp,
 597     IN PIO_STACK_LOCATION IoStackLocation,
 598     IN PPCI_FDO_EXTENSION DeviceExtension
 599 );
 600
 601 NTSTATUS
 602 NTAPI
 603 PciFdoIrpStopDevice(
 604     IN PIRP Irp,
 605     IN PIO_STACK_LOCATION IoStackLocation,
 606     IN PPCI_FDO_EXTENSION DeviceExtension
 607 );
 608
 609 NTSTATUS
 610 NTAPI
 611 PciFdoIrpQueryStopDevice(
 612     IN PIRP Irp,
 613     IN PIO_STACK_LOCATION IoStackLocation,
 614     IN PPCI_FDO_EXTENSION DeviceExtension
 615 );
 616
 617 NTSTATUS
 618 NTAPI
 619 PciFdoIrpCancelStopDevice(
 620     IN PIRP Irp,
 621     IN PIO_STACK_LOCATION IoStackLocation,
 622     IN PPCI_FDO_EXTENSION DeviceExtension
 623 );
 624
 625 NTSTATUS
 626 NTAPI
 627 PciFdoIrpQueryDeviceRelations(
 628     IN PIRP Irp,
 629     IN PIO_STACK_LOCATION IoStackLocation,
 630     IN PPCI_FDO_EXTENSION DeviceExtension
 631 );
 632
 633 NTSTATUS
 634 NTAPI
 635 PciFdoIrpQueryInterface(
 636     IN PIRP Irp,
 637     IN PIO_STACK_LOCATION IoStackLocation,
 638     IN PPCI_FDO_EXTENSION DeviceExtension
 639 );
 640
 641 NTSTATUS
 642 NTAPI
 643 PciFdoIrpQueryCapabilities(
 644     IN PIRP Irp,
 645     IN PIO_STACK_LOCATION IoStackLocation,
 646     IN PPCI_FDO_EXTENSION DeviceExtension
 647 );
 648
 649 NTSTATUS
 650 NTAPI
 651 PciFdoIrpDeviceUsageNotification(
 652     IN PIRP Irp,
 653     IN PIO_STACK_LOCATION IoStackLocation,
 654     IN PPCI_FDO_EXTENSION DeviceExtension
 655 );
 656
 657 NTSTATUS
 658 NTAPI
 659 PciFdoIrpSurpriseRemoval(
 660     IN PIRP Irp,
 661     IN PIO_STACK_LOCATION IoStackLocation,
 662     IN PPCI_FDO_EXTENSION DeviceExtension
 663 );
 664
 665 NTSTATUS
 666 NTAPI
 667 PciFdoIrpQueryLegacyBusInformation(
 668     IN PIRP Irp,
 669     IN PIO_STACK_LOCATION IoStackLocation,
 670     IN PPCI_FDO_EXTENSION DeviceExtension
 671 );
 672
 673 //
 674 // Device PDO Routines
 675 //
 676 NTSTATUS
 677 NTAPI
 678 PciPdoCreate(
 679     IN PPCI_FDO_EXTENSION DeviceExtension,
 680     IN PCI_SLOT_NUMBER Slot,
 681     OUT PDEVICE_OBJECT *PdoDeviceObject
 682 );
 683
 684 NTSTATUS
 685 NTAPI
 686 PciPdoWaitWake(
 687     IN PIRP Irp,
 688     IN PIO_STACK_LOCATION IoStackLocation,
 689     IN PPCI_PDO_EXTENSION DeviceExtension
 690 );
 691
 692 NTSTATUS
 693 NTAPI
 694 PciPdoSetPowerState(
 695     IN PIRP Irp,
 696     IN PIO_STACK_LOCATION IoStackLocation,
 697     IN PPCI_PDO_EXTENSION DeviceExtension
 698 );
 699
 700 NTSTATUS
 701 NTAPI
 702 PciPdoIrpQueryPower(
 703     IN PIRP Irp,
 704     IN PIO_STACK_LOCATION IoStackLocation,
 705     IN PPCI_PDO_EXTENSION DeviceExtension
 706 );
 707
 708 NTSTATUS
 709 NTAPI
 710 PciPdoIrpStartDevice(
 711     IN PIRP Irp,
 712     IN PIO_STACK_LOCATION IoStackLocation,
 713     IN PPCI_PDO_EXTENSION DeviceExtension
 714 );
 715
 716 NTSTATUS
 717 NTAPI
 718 PciPdoIrpQueryRemoveDevice(
 719     IN PIRP Irp,
 720     IN PIO_STACK_LOCATION IoStackLocation,
 721     IN PPCI_PDO_EXTENSION DeviceExtension
 722 );
 723
 724 NTSTATUS
 725 NTAPI
 726 PciPdoIrpRemoveDevice(
 727     IN PIRP Irp,
 728     IN PIO_STACK_LOCATION IoStackLocation,
 729     IN PPCI_PDO_EXTENSION DeviceExtension
 730 );
 731
 732 NTSTATUS
 733 NTAPI
 734 PciPdoIrpCancelRemoveDevice(
 735     IN PIRP Irp,
 736     IN PIO_STACK_LOCATION IoStackLocation,
 737     IN PPCI_PDO_EXTENSION DeviceExtension
 738 );
 739
 740 NTSTATUS
 741 NTAPI
 742 PciPdoIrpStopDevice(
 743     IN PIRP Irp,
 744     IN PIO_STACK_LOCATION IoStackLocation,
 745     IN PPCI_PDO_EXTENSION DeviceExtension
 746 );
 747
 748 NTSTATUS
 749 NTAPI
 750 PciPdoIrpQueryStopDevice(
 751     IN PIRP Irp,
 752     IN PIO_STACK_LOCATION IoStackLocation,
 753     IN PPCI_PDO_EXTENSION DeviceExtension
 754 );
 755
 756 NTSTATUS
 757 NTAPI
 758 PciPdoIrpCancelStopDevice(
 759     IN PIRP Irp,
 760     IN PIO_STACK_LOCATION IoStackLocation,
 761     IN PPCI_PDO_EXTENSION DeviceExtension
 762 );
 763
 764 NTSTATUS
 765 NTAPI
 766 PciPdoIrpQueryDeviceRelations(
 767     IN PIRP Irp,
 768     IN PIO_STACK_LOCATION IoStackLocation,
 769     IN PPCI_PDO_EXTENSION DeviceExtension
 770 );
 771
 772 NTSTATUS
 773 NTAPI
 774 PciPdoIrpQueryInterface(
 775     IN PIRP Irp,
 776     IN PIO_STACK_LOCATION IoStackLocation,
 777     IN PPCI_PDO_EXTENSION DeviceExtension
 778 );
 779
 780 NTSTATUS
 781 NTAPI
 782 PciPdoIrpQueryCapabilities(
 783     IN PIRP Irp,
 784     IN PIO_STACK_LOCATION IoStackLocation,
 785     IN PPCI_PDO_EXTENSION DeviceExtension
 786 );
 787
 788 NTSTATUS
 789 NTAPI
 790 PciPdoIrpQueryResources(
 791     IN PIRP Irp,
 792     IN PIO_STACK_LOCATION IoStackLocation,
 793     IN PPCI_PDO_EXTENSION DeviceExtension
 794 );
 795
 796 NTSTATUS
 797 NTAPI
 798 PciPdoIrpQueryResourceRequirements(
 799     IN PIRP Irp,
 800     IN PIO_STACK_LOCATION IoStackLocation,
 801     IN PPCI_PDO_EXTENSION DeviceExtension
 802 );
 803
 804 NTSTATUS
 805 NTAPI
 806 PciPdoIrpQueryDeviceText(
 807     IN PIRP Irp,
 808     IN PIO_STACK_LOCATION IoStackLocation,
 809     IN PPCI_PDO_EXTENSION DeviceExtension
 810 );
 811
 812 NTSTATUS
 813 NTAPI
 814 PciPdoIrpReadConfig(
 815     IN PIRP Irp,
 816     IN PIO_STACK_LOCATION IoStackLocation,
 817     IN PPCI_PDO_EXTENSION DeviceExtension
 818 );
 819
 820 NTSTATUS
 821 NTAPI
 822 PciPdoIrpWriteConfig(
 823     IN PIRP Irp,
 824     IN PIO_STACK_LOCATION IoStackLocation,
 825     IN PPCI_PDO_EXTENSION DeviceExtension
 826 );
 827
 828 NTSTATUS
 829 NTAPI
 830 PciPdoIrpQueryId(
 831     IN PIRP Irp,
 832     IN PIO_STACK_LOCATION IoStackLocation,
 833     IN PPCI_PDO_EXTENSION DeviceExtension
 834 );
 835
 836 NTSTATUS
 837 NTAPI
 838 PciPdoIrpQueryDeviceState(
 839     IN PIRP Irp,
 840     IN PIO_STACK_LOCATION IoStackLocation,
 841     IN PPCI_PDO_EXTENSION DeviceExtension
 842 );
 843
 844 NTSTATUS
 845 NTAPI
 846 PciPdoIrpQueryBusInformation(
 847     IN PIRP Irp,
 848     IN PIO_STACK_LOCATION IoStackLocation,
 849     IN PPCI_PDO_EXTENSION DeviceExtension
 850 );
 851
 852 NTSTATUS
 853 NTAPI
 854 PciPdoIrpDeviceUsageNotification(
 855     IN PIRP Irp,
 856     IN PIO_STACK_LOCATION IoStackLocation,
 857     IN PPCI_PDO_EXTENSION DeviceExtension
 858 );
 859
 860 NTSTATUS
 861 NTAPI
 862 PciPdoIrpSurpriseRemoval(
 863     IN PIRP Irp,
 864     IN PIO_STACK_LOCATION IoStackLocation,
 865     IN PPCI_PDO_EXTENSION DeviceExtension
 866 );
 867
 868 NTSTATUS
 869 NTAPI
 870 PciPdoIrpQueryLegacyBusInformation(
 871     IN PIRP Irp,
 872     IN PIO_STACK_LOCATION IoStackLocation,
 873     IN PPCI_PDO_EXTENSION DeviceExtension
 874 );
 875
 876
 877 //
 878 // HAL Callback/Hook Routines
 879 //
 880 VOID
 881 NTAPI
 882 PciHookHal(
 883     VOID
 884 );
 885
 886 //
 887 // PCI Verifier Routines
 888 //
 889 VOID
 890 NTAPI
 891 PciVerifierInit(
 892     IN PDRIVER_OBJECT DriverObject
 893 );
 894
 895 PPCI_VERIFIER_DATA
 896 NTAPI
 897 PciVerifierRetrieveFailureData(
 898     IN ULONG FailureCode
 899 );
 900
 901 //
 902 // Utility Routines
 903 //
 904 BOOLEAN
 905 NTAPI
 906 PciStringToUSHORT(
 907     IN PWCHAR String,
 908     OUT PUSHORT Value
 909 );
 910
 911 BOOLEAN
 912 NTAPI
 913 PciIsDatacenter(
 914     VOID
 915 );
 916
 917 NTSTATUS
 918 NTAPI
 919 PciBuildDefaultExclusionLists(
 920     VOID
 921 );
 922
 923 BOOLEAN
 924 NTAPI
 925 PciUnicodeStringStrStr(
 926     IN PUNICODE_STRING InputString,
 927     IN PCUNICODE_STRING EqualString,
 928     IN BOOLEAN CaseInSensitive
 929 );
 930
 931 BOOLEAN
 932 NTAPI
 933 PciOpenKey(
 934     IN PWCHAR KeyName,
 935     IN HANDLE RootKey,
 936     IN ACCESS_MASK DesiredAccess,
 937     OUT PHANDLE KeyHandle,
 938     OUT PNTSTATUS KeyStatus
 939 );
 940
 941 NTSTATUS
 942 NTAPI
 943 PciGetRegistryValue(
 944     IN PWCHAR ValueName,
 945     IN PWCHAR KeyName,
 946     IN HANDLE RootHandle,
 947     IN ULONG Type,
 948     OUT PVOID *OutputBuffer,
 949     OUT PULONG OutputLength
 950 );
 951
 952 PPCI_FDO_EXTENSION
 953 NTAPI
 954 PciFindParentPciFdoExtension(
 955     IN PDEVICE_OBJECT DeviceObject,
 956     IN PKEVENT Lock
 957 );
 958
 959 VOID
 960 NTAPI
 961 PciInsertEntryAtTail(
 962     IN PSINGLE_LIST_ENTRY ListHead,
 963     IN PPCI_FDO_EXTENSION DeviceExtension,
 964     IN PKEVENT Lock
 965 );
 966
 967 NTSTATUS
 968 NTAPI
 969 PciGetDeviceProperty(
 970     IN PDEVICE_OBJECT DeviceObject,
 971     IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
 972     OUT PVOID *OutputBuffer
 973 );
 974
 975 NTSTATUS
 976 NTAPI
 977 PciSendIoctl(
 978     IN PDEVICE_OBJECT DeviceObject,
 979     IN ULONG IoControlCode,
 980     IN PVOID InputBuffer,
 981     IN ULONG InputBufferLength,
 982     IN PVOID OutputBuffer,
 983     IN ULONG OutputBufferLength
 984 );
 985
 986 VOID
 987 NTAPI
 988 PcipLinkSecondaryExtension(
 989     IN PSINGLE_LIST_ENTRY List,
 990     IN PVOID Lock,
 991     IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
 992     IN PCI_SIGNATURE ExtensionType,
 993     IN PVOID Destructor
 994 );
 995
 996 PPCI_SECONDARY_EXTENSION
 997 NTAPI
 998 PciFindNextSecondaryExtension(
 999     IN PSINGLE_LIST_ENTRY ListHead,
1000     IN PCI_SIGNATURE ExtensionType
1001 );
1002
1003 ULONGLONG
1004 NTAPI
1005 PciGetHackFlags(
1006     IN USHORT VendorId,
1007     IN USHORT DeviceId,
1008     IN USHORT SubVendorId,
1009     IN USHORT SubSystemId,
1010     IN UCHAR RevisionId
1011 );
1012
1013 PPCI_PDO_EXTENSION
1014 NTAPI
1015 PciFindPdoByFunction(
1016     IN PPCI_FDO_EXTENSION DeviceExtension,
1017     IN ULONG FunctionNumber,
1018     IN PPCI_COMMON_HEADER PciData
1019 );
1020
1021 BOOLEAN
1022 NTAPI
1023 PciIsCriticalDeviceClass(
1024     IN UCHAR BaseClass,
1025     IN UCHAR SubClass
1026 );
1027
1028 BOOLEAN
1029 NTAPI
1030 PciIsDeviceOnDebugPath(
1031     IN PPCI_PDO_EXTENSION DeviceExtension
1032 );
1033
1034 NTSTATUS
1035 NTAPI
1036 PciGetBiosConfig(
1037     IN PPCI_PDO_EXTENSION DeviceExtension,
1038     OUT PPCI_COMMON_HEADER PciData
1039 );
1040
1041 NTSTATUS
1042 NTAPI
1043 PciSaveBiosConfig(
1044     IN PPCI_PDO_EXTENSION DeviceExtension,
1045     OUT PPCI_COMMON_HEADER PciData
1046 );
1047
1048 UCHAR
1049 NTAPI
1050 PciReadDeviceCapability(
1051     IN PPCI_PDO_EXTENSION DeviceExtension,
1052     IN UCHAR Offset,
1053     IN ULONG CapabilityId,
1054     OUT PPCI_CAPABILITIES_HEADER Buffer,
1055     IN ULONG Length
1056 );
1057
1058 BOOLEAN
1059 NTAPI
1060 PciCanDisableDecodes(
1061     IN PPCI_PDO_EXTENSION DeviceExtension,
1062     IN PPCI_COMMON_HEADER Config,
1063     IN ULONGLONG HackFlags,
1064     IN BOOLEAN ForPowerDown
1065 );
1066
1067 ULONG_PTR
1068 NTAPI
1069 PciExecuteCriticalSystemRoutine(
1070     IN ULONG_PTR IpiContext
1071 );
1072
1073 BOOLEAN
1074 NTAPI
1075 PciCreateIoDescriptorFromBarLimit(
1076     PIO_RESOURCE_DESCRIPTOR ResourceDescriptor,
1077     IN PULONG BarArray,
1078     IN BOOLEAN Rom
1079 );
1080
1081 BOOLEAN
1082 NTAPI
1083 PciIsSlotPresentInParentMethod(
1084     IN PPCI_PDO_EXTENSION PdoExtension,
1085     IN ULONG Method
1086 );
1087
1088 VOID
1089 NTAPI
1090 PciDecodeEnable(
1091     IN PPCI_PDO_EXTENSION PdoExtension,
1092     IN BOOLEAN Enable,
1093     OUT PUSHORT Command
1094 );
1095
1096 //
1097 // Configuration Routines
1098 //
1099 NTSTATUS
1100 NTAPI
1101 PciGetConfigHandlers(
1102     IN PPCI_FDO_EXTENSION FdoExtension
1103 );
1104
1105 VOID
1106 NTAPI
1107 PciReadSlotConfig(
1108     IN PPCI_FDO_EXTENSION DeviceExtension,
1109     IN PCI_SLOT_NUMBER Slot,
1110     IN PVOID Buffer,
1111     IN ULONG Offset,
1112     IN ULONG Length
1113 );
1114
1115 VOID
1116 NTAPI
1117 PciWriteDeviceConfig(
1118     IN PPCI_PDO_EXTENSION DeviceExtension,
1119     IN PVOID Buffer,
1120     IN ULONG Offset,
1121     IN ULONG Length
1122 );
1123
1124 VOID
1125 NTAPI
1126 PciReadDeviceConfig(
1127     IN PPCI_PDO_EXTENSION DeviceExtension,
1128     IN PVOID Buffer,
1129     IN ULONG Offset,
1130     IN ULONG Length
1131 );
1132
1133 UCHAR
1134 NTAPI
1135 PciGetAdjustedInterruptLine(
1136     IN PPCI_PDO_EXTENSION PdoExtension
1137 );
1138
1139 //
1140 // State Machine Logic Transition Routines
1141 //
1142 VOID
1143 NTAPI
1144 PciInitializeState(
1145     IN PPCI_FDO_EXTENSION DeviceExtension
1146 );
1147
1148 NTSTATUS
1149 NTAPI
1150 PciBeginStateTransition(
1151     IN PPCI_FDO_EXTENSION DeviceExtension,
1152     IN PCI_STATE NewState
1153 );
1154
1155 NTSTATUS
1156 NTAPI
1157 PciCancelStateTransition(
1158     IN PPCI_FDO_EXTENSION DeviceExtension,
1159     IN PCI_STATE NewState
1160 );
1161
1162 VOID
1163 NTAPI
1164 PciCommitStateTransition(
1165     IN PPCI_FDO_EXTENSION DeviceExtension,
1166     IN PCI_STATE NewState
1167 );
1168
1169 //
1170 // Arbiter Support
1171 //
1172 NTSTATUS
1173 NTAPI
1174 PciInitializeArbiters(
1175     IN PPCI_FDO_EXTENSION FdoExtension
1176 );
1177
1178 NTSTATUS
1179 NTAPI
1180 PciInitializeArbiterRanges(
1181     IN PPCI_FDO_EXTENSION DeviceExtension,
1182     IN PCM_RESOURCE_LIST Resources
1183 );
1184
1185 //
1186 // Debug Helpers
1187 //
1188 BOOLEAN
1189 NTAPI
1190 PciDebugIrpDispatchDisplay(
1191     IN PIO_STACK_LOCATION IoStackLocation,
1192     IN PPCI_FDO_EXTENSION DeviceExtension,
1193     IN USHORT MaxMinor
1194 );
1195
1196 VOID
1197 NTAPI
1198 PciDebugDumpCommonConfig(
1199     IN PPCI_COMMON_HEADER PciData
1200 );
1201
1202 //
1203 // Interface Support
1204 //
1205 NTSTATUS
1206 NTAPI
1207 PciQueryInterface(
1208     IN PPCI_FDO_EXTENSION DeviceExtension,
1209     IN CONST GUID* InterfaceType,
1210     IN ULONG Size,
1211     IN ULONG Version,
1212     IN PVOID InterfaceData,
1213     IN PINTERFACE Interface,
1214     IN BOOLEAN LastChance
1215 );
1216
1217 NTSTATUS
1218 NTAPI
1219 PciPmeInterfaceInitializer(
1220     IN PVOID Instance
1221 );
1222
1223 NTSTATUS
1224 NTAPI
1225 routeintrf_Initializer(
1226     IN PVOID Instance
1227 );
1228
1229 NTSTATUS
1230 NTAPI
1231 arbusno_Initializer(
1232     IN PVOID Instance
1233 );
1234
1235 NTSTATUS
1236 NTAPI
1237 agpintrf_Initializer(
1238     IN PVOID Instance
1239 );
1240
1241 NTSTATUS
1242 NTAPI
1243 tranirq_Initializer(
1244     IN PVOID Instance
1245 );
1246
1247 NTSTATUS
1248 NTAPI
1249 busintrf_Initializer(
1250     IN PVOID Instance
1251 );
1252
1253 NTSTATUS
1254 NTAPI
1255 armem_Initializer(
1256     IN PVOID Instance
1257 );
1258
1259 NTSTATUS
1260 NTAPI
1261 ario_Initializer(
1262     IN PVOID Instance
1263 );
1264
1265 NTSTATUS
1266 NTAPI
1267 locintrf_Initializer(
1268     IN PVOID Instance
1269 );
1270
1271 NTSTATUS
1272 NTAPI
1273 pcicbintrf_Initializer(
1274     IN PVOID Instance
1275 );
1276
1277 NTSTATUS
1278 NTAPI
1279 lddintrf_Initializer(
1280     IN PVOID Instance
1281 );
1282
1283 NTSTATUS
1284 NTAPI
1285 devpresent_Initializer(
1286     IN PVOID Instance
1287 );
1288
1289 NTSTATUS
1290 NTAPI
1291 agpintrf_Constructor(
1292     IN PVOID DeviceExtension,
1293     IN PVOID Instance,
1294     IN PVOID InterfaceData,
1295     IN USHORT Version,
1296     IN USHORT Size,
1297     IN PINTERFACE Interface
1298 );
1299
1300 NTSTATUS
1301 NTAPI
1302 arbusno_Constructor(
1303     IN PVOID DeviceExtension,
1304     IN PVOID Instance,
1305     IN PVOID InterfaceData,
1306     IN USHORT Version,
1307     IN USHORT Size,
1308     IN PINTERFACE Interface
1309 );
1310
1311 NTSTATUS
1312 NTAPI
1313 tranirq_Constructor(
1314     IN PVOID DeviceExtension,
1315     IN PVOID Instance,
1316     IN PVOID InterfaceData,
1317     IN USHORT Version,
1318     IN USHORT Size,
1319     IN PINTERFACE Interface
1320 );
1321
1322 NTSTATUS
1323 NTAPI
1324 armem_Constructor(
1325     IN PVOID DeviceExtension,
1326     IN PVOID Instance,
1327     IN PVOID InterfaceData,
1328     IN USHORT Version,
1329     IN USHORT Size,
1330     IN PINTERFACE Interface
1331 );
1332
1333 NTSTATUS
1334 NTAPI
1335 busintrf_Constructor(
1336     IN PVOID DeviceExtension,
1337     IN PVOID Instance,
1338     IN PVOID InterfaceData,
1339     IN USHORT Version,
1340     IN USHORT Size,
1341     IN PINTERFACE Interface
1342 );
1343
1344 NTSTATUS
1345 NTAPI
1346 ario_Constructor(
1347     IN PVOID DeviceExtension,
1348     IN PVOID Instance,
1349     IN PVOID InterfaceData,
1350     IN USHORT Version,
1351     IN USHORT Size,
1352     IN PINTERFACE Interface
1353 );
1354
1355 VOID
1356 NTAPI
1357 ario_ApplyBrokenVideoHack(
1358     IN PPCI_FDO_EXTENSION FdoExtension
1359 );
1360
1361 NTSTATUS
1362 NTAPI
1363 pcicbintrf_Constructor(
1364     IN PVOID DeviceExtension,
1365     IN PVOID Instance,
1366     IN PVOID InterfaceData,
1367     IN USHORT Version,
1368     IN USHORT Size,
1369     IN PINTERFACE Interface
1370 );
1371
1372 NTSTATUS
1373 NTAPI
1374 lddintrf_Constructor(
1375     IN PVOID DeviceExtension,
1376     IN PVOID Instance,
1377     IN PVOID InterfaceData,
1378     IN USHORT Version,
1379     IN USHORT Size,
1380     IN PINTERFACE Interface
1381 );
1382
1383 NTSTATUS
1384 NTAPI
1385 locintrf_Constructor(
1386     IN PVOID DeviceExtension,
1387     IN PVOID Instance,
1388     IN PVOID InterfaceData,
1389     IN USHORT Version,
1390     IN USHORT Size,
1391     IN PINTERFACE Interface
1392 );
1393
1394 NTSTATUS
1395 NTAPI
1396 PciPmeInterfaceConstructor(
1397     IN PVOID DeviceExtension,
1398     IN PVOID Instance,
1399     IN PVOID InterfaceData,
1400     IN USHORT Version,
1401     IN USHORT Size,
1402     IN PINTERFACE Interface
1403 );
1404
1405 NTSTATUS
1406 NTAPI
1407 routeintrf_Constructor(
1408     IN PVOID DeviceExtension,
1409     IN PVOID Instance,
1410     IN PVOID InterfaceData,
1411     IN USHORT Version,
1412     IN USHORT Size,
1413     IN PINTERFACE Interface
1414 );
1415
1416 NTSTATUS
1417 NTAPI
1418 devpresent_Constructor(
1419     IN PVOID DeviceExtension,
1420     IN PVOID Instance,
1421     IN PVOID InterfaceData,
1422     IN USHORT Version,
1423     IN USHORT Size,
1424     IN PINTERFACE Interface
1425 );
1426
1427 //
1428 // PCI Enumeration and Resources
1429 //
1430 NTSTATUS
1431 NTAPI
1432 PciQueryDeviceRelations(
1433     IN PPCI_FDO_EXTENSION DeviceExtension,
1434     IN OUT PDEVICE_RELATIONS *pDeviceRelations
1435 );
1436
1437 //
1438 // Identification Functions
1439 //
1440 PWCHAR
1441 NTAPI
1442 PciGetDeviceDescriptionMessage(
1443     IN UCHAR BaseClass,
1444     IN UCHAR SubClass
1445 );
1446
1447 //
1448 // CardBUS Support
1449 //
1450 VOID
1451 NTAPI
1452 Cardbus_MassageHeaderForLimitsDetermination(
1453     IN PPCI_CONFIGURATOR_CONTEXT Context
1454 );
1455
1456 VOID
1457 NTAPI
1458 Cardbus_SaveCurrentSettings(
1459     IN PPCI_CONFIGURATOR_CONTEXT Context
1460 );
1461
1462 VOID
1463 NTAPI
1464 Cardbus_SaveLimits(
1465     IN PPCI_CONFIGURATOR_CONTEXT Context
1466 );
1467
1468 VOID
1469 NTAPI
1470 Cardbus_RestoreCurrent(
1471     IN PPCI_CONFIGURATOR_CONTEXT Context
1472 );
1473
1474 VOID
1475 NTAPI
1476 Cardbus_GetAdditionalResourceDescriptors(
1477     IN PPCI_CONFIGURATOR_CONTEXT Context,
1478     IN PPCI_COMMON_HEADER PciData,
1479     IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1480 );
1481
1482 VOID
1483 NTAPI
1484 Cardbus_ResetDevice(
1485     IN PPCI_CONFIGURATOR_CONTEXT Context
1486 );
1487
1488 VOID
1489 NTAPI
1490 Cardbus_ChangeResourceSettings(
1491     IN PPCI_CONFIGURATOR_CONTEXT Context
1492 );
1493
1494 //
1495 // PCI Device Support
1496 //
1497 VOID
1498 NTAPI
1499 Device_MassageHeaderForLimitsDetermination(
1500     IN PPCI_CONFIGURATOR_CONTEXT Context
1501 );
1502
1503 VOID
1504 NTAPI
1505 Device_SaveCurrentSettings(
1506     IN PPCI_CONFIGURATOR_CONTEXT Context
1507 );
1508
1509 VOID
1510 NTAPI
1511 Device_SaveLimits(
1512     IN PPCI_CONFIGURATOR_CONTEXT Context
1513 );
1514
1515 VOID
1516 NTAPI
1517 Device_RestoreCurrent(
1518     IN PPCI_CONFIGURATOR_CONTEXT Context
1519 );
1520
1521 VOID
1522 NTAPI
1523 Device_GetAdditionalResourceDescriptors(
1524     IN PPCI_CONFIGURATOR_CONTEXT Context,
1525     IN PPCI_COMMON_HEADER PciData,
1526     IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1527 );
1528
1529 VOID
1530 NTAPI
1531 Device_ResetDevice(
1532     IN PPCI_CONFIGURATOR_CONTEXT Context
1533 );
1534
1535 VOID
1536 NTAPI
1537 Device_ChangeResourceSettings(
1538     IN PPCI_CONFIGURATOR_CONTEXT Context
1539 );
1540
1541 //
1542 // PCI-to-PCI Bridge Device Support
1543 //
1544 VOID
1545 NTAPI
1546 PPBridge_MassageHeaderForLimitsDetermination(
1547     IN PPCI_CONFIGURATOR_CONTEXT Context
1548 );
1549
1550 VOID
1551 NTAPI
1552 PPBridge_SaveCurrentSettings(
1553     IN PPCI_CONFIGURATOR_CONTEXT Context
1554 );
1555
1556 VOID
1557 NTAPI
1558 PPBridge_SaveLimits(
1559     IN PPCI_CONFIGURATOR_CONTEXT Context
1560 );
1561
1562 VOID
1563 NTAPI
1564 PPBridge_RestoreCurrent(
1565     IN PPCI_CONFIGURATOR_CONTEXT Context
1566 );
1567
1568 VOID
1569 NTAPI
1570 PPBridge_GetAdditionalResourceDescriptors(
1571     IN PPCI_CONFIGURATOR_CONTEXT Context,
1572     IN PPCI_COMMON_HEADER PciData,
1573     IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1574 );
1575
1576 VOID
1577 NTAPI
1578 PPBridge_ResetDevice(
1579     IN PPCI_CONFIGURATOR_CONTEXT Context
1580 );
1581
1582 VOID
1583 NTAPI
1584 PPBridge_ChangeResourceSettings(
1585     IN PPCI_CONFIGURATOR_CONTEXT Context
1586 );
1587
1588 //
1589 // External Resources
1590 //
1591 extern SINGLE_LIST_ENTRY PciFdoExtensionListHead;
1592 extern KEVENT PciGlobalLock;
1593 extern PPCI_INTERFACE PciInterfaces[];
1594 extern PCI_INTERFACE ArbiterInterfaceBusNumber;
1595 extern PCI_INTERFACE ArbiterInterfaceMemory;
1596 extern PCI_INTERFACE ArbiterInterfaceIo;
1597 extern PCI_INTERFACE BusHandlerInterface;
1598 extern PCI_INTERFACE PciRoutingInterface;
1599 extern PCI_INTERFACE PciCardbusPrivateInterface;
1600 extern PCI_INTERFACE PciLegacyDeviceDetectionInterface;
1601 extern PCI_INTERFACE PciPmeInterface;
1602 extern PCI_INTERFACE PciDevicePresentInterface;
1603 //extern PCI_INTERFACE PciNativeIdeInterface;
1604 extern PCI_INTERFACE PciLocationInterface;
1605 extern PCI_INTERFACE AgpTargetInterface;
1606 extern PCI_INTERFACE TranslatorInterfaceInterrupt;
1607 extern PDRIVER_OBJECT PciDriverObject;
1608 extern PWATCHDOG_TABLE WdTable;
1609 extern PPCI_HACK_ENTRY PciHackTable;
1610 extern BOOLEAN PciEnableNativeModeATA;
1611
1612 /* Exported by NTOS, should this go in the NDK? */
1613 extern NTSYSAPI BOOLEAN InitSafeBootMode;
1614
1615 /* EOF */